Datasheet VND5E025AK-E Datasheet (ST)

Features

VND5E025AK-E

Double channel high-side driver with analog current sense

for automotive applications

Max transient supply voltage V

Operating voltage range V

Max on-state resistance (per ch.) R

Current limitation (typ) I

Off-state supply current I

1. Typical value with all loads connected.

■ General

– Inrush current active management by

power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC

european directive
– Very low current sense leakage

■ Diagnostic functions

– Proportional load current sense
– High current sense precision for wide

currents range
– Current sense disable
– Off-state open- load detection
– Output short to V
– Overload and short to ground (power

limitation) indication
– Thermal shutdown indication

■ Protections

– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

CC

– Overtemperature shutdown with auto

restart (thermal shutdown)

detection

CC

CC

CC

ON

LIMH

S

41 V

4.5 to 28 V

25 mΩ

60 A

(1)

2µA

PowerSSO-24

– Reverse battery protected
– Electrostatic discharge protection

Applications

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

Description

The VND5E025AK-E is a double channel high­side driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
PowerSSO-24 package. The VND5E025AK-E is
designed to drive 12 V automotive grounded
loads delivering protection, diagnostics and an
easy 3 V and 5 V CMOS compatible interface with
any microcontroller.

The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with auto
restart and overvoltage active clamp. A dedicated
analog current sense pin is associated with every
output channel in order to provide enhanced
diagnostic functions including fast detection of
overload and short-circuit to ground through
power limitation indication, overtemperature
indication, short-circuit to V
on-state and off-state open-load detection. The
current sensing and diagnostic feedback of the
whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices.

diagnosis and

CC

May 2010 Doc ID 14618 Rev 4 1/38

www.st.com

1

Contents VND5E025AK-E

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 25

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 25

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 26

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

3.4.1 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . . 28

3.5 Maximum demagnetization energy (VCC= 13.5 V) . . . . . . . . . . . . . . . . . 29

4 Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

2/38 Doc ID 14618 Rev 4

VND5E025AK-E List of tables

List of tables

Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Switching (V

Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Current sense (8 V < V
Table 10. Open-load detection (8 V < V

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 16. PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

=13V; Tj= 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

CC

< 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

< 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CC

Doc ID 14618 Rev 4 3/38

List of figures VND5E025AK-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 5. Openload off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 7. Delay response time between rising edge of output current and rising edge of current

sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 9. I

OUT/ISENSE

Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 15. Short to V
Figure 16. T

evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

J

Figure 17. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 20. Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 21. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 23. On-state resistance vs T
Figure 24. On-state resistance vs V

Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 26. I

LIMH

vs T

Figure 27. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 30. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 31. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 32. Application schematic

Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 34. Maximum turn-off current versus inductance (for each channel)
Figure 35. PowerSSO-24 PC board

Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel on). . . . . . . . . 30

Figure 37. PowerSSO-24 thermal impedance junction to ambient single pulse (one channel on) . . . 31
Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-24

Figure 39. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 40. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

vs I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

CC

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

OUT

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

(1)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

(1)

(1)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

. . . . . . . . . . . . . . . . . . 29

(1)

. . . . . . . . . . . . . . . . . 31

4/38 Doc ID 14618 Rev 4

VND5E025AK-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V

CC

Signal Clamp

IN1

IN2

CS_
DIS

CS1

CS2

Undervoltage

Control & Diagnostic 1

DRIVER

Over

temp.

V

SENSEH

LOGIC

Table 1. Pin functions

Name Function

V

CC

Battery connection.

Limitation

Current

Limitation

OFF State
Open load

Current

Sense

OVERLOAD PROTECTION

(ACTIVE POWER LIMITATION)

Power
Clamp

V

ON

CH 1

GND

Channels 2

CONTROL & DIAGNOSTIC

CH 2

OUT2

OUT1

OUTPUT

1,2

GND

INPUT

1,2

CURRENT SENSE

Power output.

Ground connection. Must be reverse battery protected by an external
diode / resistor network.

Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.

Analog current sense pin; delivers a current proportional to the load

1,2

current.

CS_DIS Active high CMOS compatible pin to disable the current sense pin.

Doc ID 14618 Rev 4 5/38

Block diagram and pin description VND5E025AK-E

Figure 2. Configuration diagram (top view)

V

CC

GND

N.C.

INPUT2

N.C.

INPUT1

N.C.

CURRENT SENSE1

N.C.

CURRENT SENSE2

CS_DIS.

V

CC

1
2
3
4
5
6
7
8
9
10
11
12

24
23
22
21
20
19
18
17
16
15
14
13

OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1

TAB = V

Table 2. Suggested connections for unused and not connected pins

CC

Connection / pin Current sense N.C. Output Input CS_DIS

Floating Not allowed X X X X

To ground

Through 1kΩ

resistor

X

Through 22kΩ

resistor

Through 10kΩ

resistor

Through 10kΩ

resistor

6/38 Doc ID 14618 Rev 4

VND5E025AK-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

CC

I

I

CSD

V

CSD

V

IN1

V

IN2

I

IN1

I

IN2

CS_DIS

INPUT1

INPUT2

GND

OUTPUT1

CURRENT
SENSE1

OUTPUT2

CURRENT
SENSE2

I

GND

OUT1

I

SENSE1

I

OUT2

I

SENSE2

V

V

SENSE2

OUT2

V

SENSE1

V

Fn

V

OUT1

V

CC

Note: V

Fn

= V

- VCC during reverse battery condition.

OUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

CC

-V

-I

GND

I

OUT

- I

OUT

I

IN

CSD

-I

CSENSE

V

CSENSE

DC supply voltage 41

Reverse DC supply voltage 0.3

CC

DC reverse ground pin current 200 mA

DC output current Internally limited

Reverse DC output current 24

DC input current

DC current sense disable input current

DC reverse CS pin current 200

Current sense maximum voltage VCC- 41 to +V

-1 to 10

CC

V

A

mAI

V

Doc ID 14618 Rev 4 7/38

Electrical specifications VND5E025AK-E

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Maximum switching energy (single pulse)

E

MAX

(L = 0.8 mH; R

= I

limL

(Typ.))

I

OUT

=0Ω; V

L

= 13.5 V; T

bat

jstart

= 150 °C;

140 mJ

Electrostatic discharge
(Human Body Model: R = 1.5 kΩ; C = 100 pF)

4000
2000
4000
5000
5000

V
V
V
V
V

°C

V

V

ESD

ESD

T

T

– Input
– Current sense
–CS_DIS
– Output
–V

CC

Charge device model (CDM-AEC-Q100-011) 750 V

Junction operating temperature - 40 to 150

j

Storage temperature - 55 to 150

stg

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Max value Unit

R

thj-case

R

thj-amb

Thermal resistance junction-case (with one channel ON) 1.35

Thermal resistance junction-ambient See Figure 36

2.3 Electrical characteristics

Values specified in this section are for 8 V<VCC<28V; -40°C<Tj<150 °C, unless otherwise
stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

USDhyst

R

V

clamp

Operating supply

CC

voltage

Undervoltage shutdown 3.5 4.5

USD

Undervoltage shutdown
hysteresis

On-state resistance

ON

Clamp voltage IS= 20 mA 41 46 52 V

(1)

4.5 13 28

I

=3A; Tj=25°C 25

OUT

=3A; Tj=150°C 50

OUT

=3A; VCC=5V; Tj=25°C 35

I

OUT

°C/W

VV

0.5

mΩI

8/38 Doc ID 14618 Rev 4

VND5E025AK-E Electrical specifications

Table 5. Power section (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

I

L(off1)

V

Supply current

S

Off-state output
current

Output - VCC diode

F

voltage

(1)

(1)

Off-state; V
V

IN=VOUT=VSENSE=VCSD

On-state; VCC=13V; VIN=5V;
I

=0A

OUT

VIN=V

OUT

Tj=25°C

V

IN=VOUT

= 125 °C

T

j

-I

=4 A; Tj=150°C 0.7 V

OUT

=13V; Tj=25°C;

CC

=0V; VCC=13V;

=0V; VCC=13V;

=0V

(2)5 (2)

2

36mA

00.013

05

1. For each channel.

2. PowerMOS leakage included.

Table 6. Switching (VCC=13V; Tj=25°C)

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

d(on)

t

d(off)

/dt)onTurn-On voltage slope

(dV

OUT

/dt)

(dV

OUT

W

ON

W

OFF

Turn-On delay time

Turn-Off delay time 40

RL=4.3 Ω
(see Figure 6)

See Figure 27

=4.3 Ω

R

Turn-Off voltage slope See Figure 28

off

L

Switching energy losses
during t

Switching energy losses
during t

ON

W

RL=4.3 Ω
(see Figure 6)

OFF

W

20

0.6

0.35

µA

µA

µs

V/µs

mJ

Doc ID 14618 Rev 4 9/38

Electrical specifications VND5E025AK-E

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

IL

I

IL

V

IH

I

IH

V

I(hyst)

ICL

V

CSDL

I

CSDL

V

CSDH

I

CSDH

V

CSD(hyst)

V

CSCL

Table 8. Protections and diagnostics

Input low level voltage 0.9 V

Low level input current VIN=0.9V 1 µA

Input high level voltage 2.1 V

High level input current VIN=2.1V 10 µA

Input hysteresis voltage 0.25

Input clamp voltage

IN

I

=-1mA -0.7

IN

VV

I

=1mA 5.5 7

CS_DIS low level voltage 0.9

Low level CS_DIS current V

=0.9V 1 µA

CSD

CS_DIS high level voltage 2.1 V

High level CS_DIS current V

=2.1V 10 µA

CSD

CS_DIS hysteresis voltage 0.25

I

CS_DIS clamp voltage

=1mA 5.5 7

CSD

=-1mA -0.7

I

CSD

(1)

V

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

= 13 V 43 60

I

LIMH

I

LIML

T

TSD

T

T

T

HYST

V

DEMAG

V

RS

ON

DC short circuit current

Short circuit current
during thermal cycling

Shutdown temperature 150 175 200

Reset temperature TRS+1 TRS+5

R

Thermal reset of STATUS 135

Thermal hysteresis
(T

TSD-TR

)

Turn-Off output voltage
clamp

Output voltage drop
limitation

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

CC

5V<V

CC

<28V

VCC=13V;
TR<Tj<T

I

OUT

TSD

=2A; VIN=0;

L=6 mH

=0.1A;

I

OUT

= -40 °C to +150 °C

T

j

(see Figure 8)

15

7

-41 VCC-46 VCC-52 V

V

CC

25 mV

85

A

°C

10/38 Doc ID 14618 Rev 4

VND5E025AK-E Electrical specifications

Table 9. Current sense (8 V < VCC<18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

dK

K

LED

K

K

1/K1

K

0

1

(1)

2

I

OUT/ISENSE

I

OUT/ISENSE

I

OUT/ISENSE

Current sense
ratio drift

I

OUT/ISENSE

= 0.05 A; V

OUT

Tj= -40 °C to 150 °C

I

=0.5A; V

OUT

= -40 °C to 150 °C

T

j

I

=2 A; V

OUT

=0V;

V

CSD

SENSE

SENSE

Tj= -40 °C to 150 °C

=25°C to 150°C

T

j

=2 A; V

I

OUT

V

CSD

= -40 °C to 150 °C

T

j

I

=3 A; V

OUT

V

CSD

= -40 °C to 150 °C

T

j

SENSE

=0V;

SENSE

=0V;

Tj= 25 °C to150 °C

SENSE

=4 V;

=4 V;

=4V;

= 0.5 V; V

= 0.5 V; V

CSD

CSD

=0V;

=0V;

1240 3350 4960

1860 3150 4600

2100

3100

4400

2250

3100

3850

-13 13 %

2200

3000

4100

2450

3000

3550

dK

2/K2

dK

3/K3

I

SENSE

=3 A; V

Current sense

(1)

ratio drift

K

3

(1)

I

OUT/ISENSE

Current sense
ratio drift

Analog sense
leakage

0

I

OUT

Tj= -40 °C to 150 °C

I

= 10 A; V

OUT

V

=0V;

CSD

= -40°C to 150°C

T

j

= 25°C to 150°C

T

j

= 10 A; V

I

OUT

= -40°C to 150°C

T

j

=0A; V

I

OUT

=5V; VIN=0V; Tj= -40°C to 150°C

V

CSD

V

=0V; VIN=5V; Tj= -40 °C to 150 °C

CSD

SENSE

SENSE

SENSE

SENSE

=4V; V

=4V;

=4V; V

=0V;

CSD

CSD

=0V;

=0V;

-12 12 %

2550

2850

3280

2650

2850

3180

-6 +6 %

0
0

1
2

µA
µA

current

I

=2A; V

OUT

V

=5V; VIN=5V; Tj= -40°C to 150°C

CSD

SENSE

=0V;

0

1

µA

Open-load on-

= 5 V, 8 V < VCC<18V

I

OL

state current
detection
threshold

V

IN

I

SENSE

= 5 µA

530mA

Max analog

V

SENSE

sense output

I

OUT

=3 A; V

=0V 5

CSD

voltage

Analog sense

V

SENSEH

output voltage
in fault
condition

(1)

VCC=13V; R

=3.9kΩ 8

SENSE

V

Doc ID 14618 Rev 4 11/38

Electrical specifications VND5E025AK-E

Table 9. Current sense (8 V < VCC< 18 V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Analog sense

I

SENSEH

output current
in fault
condition

(2)

VCC=13V; V

=5V 9 mA

SENSE

Delay

t

DSENSE1H

response time
from falling
edge of

SENSE

<4V, 0.5<I

= 90% of I

V
I

SENSE

(see Figure 4)

SENSEMAX

OUT

<10A

CS_DIS pin

Delay

t

DSENSE1L

response time
from rising
edge of

SENSE

<4V, 0.5<I

=10% of I

V
I

SENSE

(see Figure 4)

<10A

OUT

SENSEMAX

CS_DIS pin

Delay

t

DSENSE2H

response time
from rising
edge of INPUT

SENSE

<4V, 0.5<I

= 90% of I

V
I

SENSE

(see Figure 4)

SENSEMAX

OUT

<10A

pin

Delay

Δt

DSENSE2H

response time
between rising
edge of output
current and
rising edge of

V
I

SENSE

I

OUT

(see Figure 7)

SENSE

=90% of I

=90% of I

<4V,

SENSEMAX,

OUTMAX

, I

OUTMAX

=3A

current sense

Delay

t

DSENSE2L

response time
from falling
edge of INPUT

SENSE

<4V, 0.5<I

=10% of I

V
I

SENSE

(see Figure 4)

<10A

OUT

SENSEMAX

pin

1. Fault condition includes: power limitation, overtemperature and open-load off-state detection.

30 100

520

80 300

µs

110

70 250

Table 10. Open-load detection (8 V < VCC<18V)

Symbol Parameter Test condition Min. Typ. Max. Unit

V

t

DSTKON

I

L(off2)r

Open-load off-state

OL

voltage detection threshold

Output short circuit to V
detection delay at turn-off

Off-state output current at
V

= 4V

OUT

V

CC

See Figure 5 180 1200 µs

V
V

12/38 Doc ID 14618 Rev 4

=0V 2

IN

=0V; V

IN

rising from 0 V to 4 V

OUT

SENSE

=0V

See

Figure 5

4V

-120 0 µA

VND5E025AK-E Electrical specifications

Table 10. Open-load detection (8 V < VCC< 18 V) (continued)

Symbol Parameter Test condition Min. Typ. Max. Unit

=0V; V

I

L(off2)f

Off-state output current at
V

= 2 V

OUT

V
V

IN

OUT

SENSE=VSENSEH

falling from VCC to 2 V

-50 90 µA

Delay response from

= 4 V; VIN= 0 V

V

OUT

V

SENSE

= 90 % of V

SENSEH

20 µs

td_vol

output rising edge to

SENSE

rising edge in

V
openload

Figure 4. Current sense delay characteristics

INPUT

CS_DIS

LOAD CURRENT

SENSE CURRENT

t

DSENSE2H

t

DSENSE1L

Figure 5. Openload off-state delay timing

OUTPUT STUCK TO V

V

IN

V

CS

t

DSENSE1H

CC

V

OUT

V

t

DSTKON

> V

SENSEH

OL

t

DSENSE2L

Doc ID 14618 Rev 4 13/38

Electrical specifications VND5E025AK-E

Figure 6. Switching characteristics

V

OUT

dV

OUT

INPUT

/dt

(on)

t

d(on)

t

Won

80%

t

Woff

90%

dV

/dt

OUT

(off)

t

r

10%

t

f

t

t

d(off)

t

14/38 Doc ID 14618 Rev 4

VND5E025AK-E Electrical specifications

Figure 7. Delay response time between rising edge of output current and rising

edge of current sense (CS enabled)

V

IN

Δ

t

DSENSE2H

t

I

OUT

90% I

OUTMAX

I

OUTMAX

t

I

SENSE

I

90% I

SENSEMAX

SENSEMAX

t

Figure 8. Output voltage drop limitation

VCC-V

V

on

OUT

V

on/Ron(T)

Tj= 150oC

T

j

=25oC

=-40oC

T

j

I

OUT

Doc ID 14618 Rev 4 15/38

Electrical specifications VND5E025AK-E

Figure 9. I

I

/ I

out

sense

4700

4200

3700

3200

2700

2200

1700

1200

2345678910

OUT/ISENSE

vs I

max Tj = -40 °C to 150 °C

max Tj = 25 °C to 150 °C

min Tj = 25 °C to 150 °C

min Tj = -40 °C to 150 °C

OUT

typical value

I

(A)

OUT

Figure 10. Maximum current sense ratio drift vs load current

dk/k(%)

20

15

10

5

0

-5

-10

-15

-20

2345678 910

Note: Parameter guaranteed by design; it is not tested.

I

OUT

(A)

16/38 Doc ID 14618 Rev 4

VND5E025AK-E Electrical specifications

Table 11. Truth table

Conditions Input Output Sense (V

Normal operation

L

H

L

H

CSD

0

Nominal

=0V)

(1)

Overtemperature

Undervoltage

Overload

Short circuit to GND
(Power limitation)

Open-load off-state
(with external pull up)

Short circuit to V

CC

(external pull up
disconnected)

Negative output voltage
clamp

1. If the V
and external circuit.

is high, the SENSE output is at a high impedance, its potential depends on leakage currents

CSD

L

H

L

H

H

L
L

L
L

X

0

V

SENSEH

0
0

Nominal

(no power limitation)

H

Cycling

V

SENSEH

(power limitation)

L

H

LHV

L

H

L
L

H
H

0

V

SENSEH

SENSEH

V

SENSEH

< Nominal

LL0

Doc ID 14618 Rev 4 17/38

Electrical specifications VND5E025AK-E

Table 12. Electrical transient requirements (part 1/3)

ISO 7637-2:

2004(E) Test

pulse

Test levels

(1)

Number of

pulses or

III IV Min. Max.

test times

Burst cycle / pulse

repetition time

1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10Ω

2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2Ω

3a -100V -150V 1h 90ms 100ms 0.1µs, 50Ω

3b +75V +100V 1h 90ms 100ms 0.1µs, 50Ω

4 -6V -7V 1 pulse 100ms, 0.01Ω

(2)

5b

1. The above test levels must be considered referred to VCC= 13.5V except for pulse 5b.

2. Valid in case of external load dump clamp: 40V maximum referred to ground.

+65V +87V 1 pulse 400ms, 2Ω

Table 13. Electrical transient requirements (part 2/3)

ISO 7637-2:

2004E

Test pulse

III VI

Test level results

Delays and
Impedance

1C C

2a C C

3a C C

3b C C

4C C

(1)

5b

1. Valid in case of external load dump clamp: 40V maximum referred to ground

CC

Table 14. Electrical transient requirements (part 3/3)

Class Contents

C All functions of the device performed as designed after exposure to disturbance.

E

One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.

18/38 Doc ID 14618 Rev 4

VND5E025AK-E Electrical specifications

2.4 Waveforms

Figure 11. Normal operation

Normal operation

INPUT

Nominal load Nominal load

I

OUT

V

SENSE

V

CS_DIS

Figure 12. Overload or short to GND

Overload or Short to GND

INPUT

I

>

LimH

I

OUT

V

SENSE

V

CS_DIS

Power Limitation

I

LimL

Thermal cycling

>

Doc ID 14618 Rev 4 19/38

Electrical specifications VND5E025AK-E

Figure 13. Intermittent overload

Intermittent Overload

INPUT

Overload

I

>

LimH

I

>

LimL

I

OUT

V

>

SENSEH

V

SENSE

V

CS_DIS

Figure 14. Off-state open-load with external circuitry

OFF-State Open Load

with external circuitry

Nominal load

INPUT

V

t

DSTK(on)

OL

V

SENSEH

V

OUT

I

OUT

V

SENSE

V

CS_DIS

20/38 Doc ID 14618 Rev 4

V

> V

OUT

OL

>

VND5E025AK-E Electrical specifications

Figure 15. Short to V

V

OUT

I

OUT

V

CS_DIS

CC

Resistive

Short to V

V

OL

t

DSTK(on)

CC

Short to V

CC

Hard

Short to V

V

> V

OUT

t

DSTK(on)

CC

OL

Figure 16. TJ evolution in overload or short to GND

TJ evolution in

Overload or Short to GND

INPUT

Self-limitation of fast thermal transients

T

J_START

T

J

I

>

LimH

I

OUT

Power Limitation

T

T

TSD

R

< I

T

HYST

LimL

Doc ID 14618 Rev 4 21/38

Electrical specifications VND5E025AK-E

2.5 Electrical characteristics curves

Figure 17. Off-state output current Figure 18. High level input current

Iloff (nA)

1000

900

800

700

600

500

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Off State
Vcc=13V

Vin=Vout=0V

Tc (°C)

Iih (µA)

5

4,5

3,5

2,5

1,5

0,5

Vin = 2.1V

CC = 8 V

V

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 19. Input clamp voltage Figure 20. Input high level voltage

Vicl (V)

7

6,8

6,6

6,4

6,2

6

5,8

5,6

5,4

5,2

5

lin=1mA

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vih (V)

4

3,5

3

2,5

2

1,5

1

0,5

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 21. Input low level voltage Figure 22. Input hysteresis voltage

Vil (V)

2

1,8

1,6

1,4

1,2

1

0,8

0,6

0,4

0,2

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

22/38 Doc ID 14618 Rev 4

Vihyst (V)

1

0,9

0,8

0,7

0,6

0,5

0,4

0,3

0,2

0,1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

VND5E025AK-E Electrical specifications

Figure 23. On-state resistance vs T

case

Ron (mOhm)

70

60

50

40

30

20

10

0

Iout= 3A

Vcc=13V

-50 -25 0 25 50 75 100 125 150 175

Figure 24. On-state resistance vs V

Ron (mOhm)

60

50

40

30

20

10

0

0 5 10 15 20 25 30 35 40

Tc (°C)

Figure 25. Undervoltage shutdown Figure 26. I

Vusd (V)

16

14

12

10

8

6

4

2

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Ilimh (A)

70

65

60

55

50

45

40

-50 -25 0 25 50 75 100 125 150 175

LIMH

Vcc=13V

vs T

CC

Tc=150°C

Tc=125°C

Tc=25°C

Tc=-40°C

Vcc (V)

case

Tc (°C)

Figure 27. Turn-on voltage slope Figure 28. Turn-off voltage slope

(dVout/dt )On (V/ms)

700

600

500

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Vcc=13V

RI=4.3 Ohm

Tc (°C)

Doc ID 14618 Rev 4 23/38

(dVout/dt )Off (V/ms)

600

500

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Vcc=13V

RI= 4.3 Ohm

Tc (°C)

Electrical specifications VND5E025AK-E

Figure 29. CS_DIS high level voltage Figure 30. CS_DIS low level voltage

Vcsdh (V)

4

3,5

3

2,5

2

1,5

1

0,5

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vcsdl (V)

3

2,5

2

1,5

1

0,5

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 31. CS_DIS clamp voltage

Vcsdcl(V)

10

9

8

7

6

5

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Icsd = 1 mA

Tc (°C)

24/38 Doc ID 14618 Rev 4

VND5E025AK-E Application information

3 Application information

Figure 32. Application schematic

+5V

R

prot

Μ

CU

R

prot

R

prot

R

SENSE

C

EXT

(1)

CS_DIS

INPUT

CURRENT SENSE

V

CC

OUTPUT

GND

R

GND

GND

D

GND

V

1. Channel 2 has the same internal circuit as channel 1.

3.1 GND protection network against reverse battery

D

ld

This section provides two solutions for implementing a ground protection network against
reverse battery.

3.1.1 Solution 1: resistor in the ground line (R

This can be used with any type of load.

The following is an indication on how to dimension the R

1. R

2. R

where -I
maximum rating section of the device datasheet.

Power dissipation in R

P

= (-VCC)2/R

D

This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.

Please note that if the microprocessor ground is not shared by the device ground then the
R

GND

values. This shift varies depending on how many devices are On in the case of several high
side drivers sharing the same R

≤ 600mV / (I

GND

≥ (−VCC) / (-I

GND

is the DC reverse ground pin current and can be found in the absolute

GND

S(on)max

GND

GND

)

)

(when VCC<0: during reverse battery situations) is:

GND

produces a shift (I

S(on)max

* R

GND

GND

.

only)

GND

resistor.

GND

S(on)max

becomes the sum of the

) in the input thresholds and the status output

Doc ID 14618 Rev 4 25/38

Application information VND5E025AK-E

If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).

3.1.2 Solution 2: diode (D

A resistor (R

=1kΩ) should be inserted in parallel to D

GND

) in the ground line

GND

inductive load.

This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V

max DC rating. The same applies if the device is subject to transients on the VCC line

CC

that are greater than the ones shown in the ISO 7637-2: 2004(E) table.

3.3 MCU I/Os protection

If a ground protection network is used and negative transient are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (R
the microcontroller I/Os pins to latch-up.

The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os:

if the device drives an

GND

) in line to prevent

prot

-V

CCpeak/Ilatchup

≤ R

prot

≤ (V

OHμC-VIH-VGND

) / I

IHmax

Calculation example:

For V

5kΩ ≤ R

Recommended values: R

CCpeak

prot

≤ 180kΩ

= - 100V and I

latchup

=10kΩ, C

prot

≥ 20mA; V

=10nF.

EXT

OHµC

≥ 4.5V

26/38 Doc ID 14618 Rev 4

VND5E025AK-E Application information

3.4 Current sense and diagnostic

The current sense pin performs a double function (see Figure 33: Current sense and

diagnostic):

● Current mirror of the load current in normal operation, delivering a current

proportional to the load one according to a know ratio K
easily converted to a voltage V
Linearity between I
V

in Table 9: Current sense (8 V < VCC < 18 V)). The current sense accuracy

SENSE

OUT

and V

SENSE

by means of an external resistor R

SENSE

is ensured up to 5V minimum (see parameter

depends on the output current (refer to current sense electrical characteristics

Table 9: Current sense (8 V < VCC < 18 V)).

● Diagnostic flag in fault conditions, delivering a fixed voltage V

maximum current I

SENSEH

in case of the following fault conditions (refer to

Table 11: Truth table):

– Power limitation activation

–Overtemperature

–Short to V

in off-state

CC

– Open-load in off-state with additional external components.

A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.

. The current I

X

SENSEH

SENSE

SENSE

up to a

can be

.

Figure 33. Current sense and diagnostic

V

PU_CMD

R

I

Loff2r

I

Loff2f

R

PU

PU

Load

PD

V

BAT

V

CC

Main MOSn

I

OUT/KX

41V

Overtemperature

+

I

SENSEH

CS_DIS

V

SENSEH

CURRENT

SENSEn

R

PROT

To uC ADC

R

SENSE

V

SENSE

OL OFF

Pwr_Lim

INPUTn

-

V

OL

OUTn

GND

Doc ID 14618 Rev 4 27/38

Application information VND5E025AK-E

3.4.1 Short to VCC and off-state open-load detection

Short to V

A short circuit between V
V

SENSEH

CC

and output is indicated by the relevant current sense pin set to

CC

during the device off-state. Small or no current is delivered by the current sense

during the on-state depending on the nature of the short circuit.

Off-state open-load with external circuitry

Detection of an open-load in off mode requires an external pull-up resistor R
the output to a positive supply voltage V

It is preferable V

to be switched off during the module standby mode in order to avoid the

PU

PU

.

connecting

PU

overall standby current consumption to increase in normal conditions, i.e. when load is
connected.

An external pull down resistor R

connected between output and GND is mandatory to

PD

avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and

diagnostic).

R

must be selected in order to ensure V

PD

OUT < VOLmin

unless pulled up by the external

circuitry:

VVIRV

2

=<⋅=

OLfoffLPD

min)2(

R

≤ 22 KΩ is recommended.

PD

OUT

OFFupPull

_

−

For proper open-load detection in off-state, the external pull-up resistor must be selected
according to the following formula:

IRRVR

V

OUT

For the values of V

=

ONupPull

_

−

OLmin,VOLmax, IL(off2)r

and I

⋅⋅−⋅

RR

+

PDPU

see Table 10: Open-load detection

L(off2)f

roffLPDPUPUPD

)2(

OL

max

VV

4

=>

(8 V < VCC < 18 V).

28/38 Doc ID 14618 Rev 4

VND5E025AK-E Application information

3.5 Maximum demagnetization energy (VCC=13.5V)

Figure 34. Maximum turn-off current versus inductance (for each channel)

100

A

B

C

10

I (A)

1

0,1 1 10 100L (mH)

A:

T

= 150°C single pulse

jstart

B: T

C:

= 100°C repetitive pulse

jstart

T

= 125°C repetitive pulse

jstart

(1)

VIN, I

L

Demagnetization Demagnetization Demagnetization

t

1. Values are generated with R
In case of repetitive pulses, T
the temperature specified above for curves A and B.

=0 Ω.

L

(at beginning of each demagnetization) of every pulse must not exceed

jstart

Doc ID 14618 Rev 4 29/38

Package and thermal data VND5E025AK-E

4 Package and thermal data

4.1 PowerSSO-24 thermal data

Figure 35. PowerSSO-24 PC board

1. Layout condition of R
area = 77 mm x 86mm, PCB thickness = 1.6 mm, Cu thickness = 70 µm (front and back side), Copper
areas: from minimum pad layout to 8 cm

Figure 36. R

thj-amb

and Zth measurements (PCB: Double layer, Thermal Vias, FR4

th

vs PCB copper area in open box free air condition (one channel

(1)

2

).

on)

RTHj_amb(°C/W)

55

50

45

40

35

30

0246810

PCB Cu heatsink area (cm^2)

30/38 Doc ID 14618 Rev 4

VND5E025AK-E Package and thermal data

Figure 37. PowerSSO-24 thermal impedance junction to ambient single pulse (one

channel on)

ZTH (°C/W)

1000

100

Footprint

2 cm

8 cm

10

1

0.1

0.0001 0.001 0.01 0.1 1 10 100 1000

Time (s)

Equation 1: pulse calculation formula

Z

THδ

R

TH

δ Z

THtp

1 δ–()+⋅=

where δ = tP/T

Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-24

2

2

(1)

1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.

Doc ID 14618 Rev 4 31/38

Package and thermal data VND5E025AK-E

Table 15. Thermal parameters

Area/Island (cm2) Footprint 2 8

R1 (°C/W) 0.28

R2 (°C/W) 0.9

R3 (°C/W) 6

R4 (°C/W) 7.7

R5 (°C/W) 9 9 8

R6 (°C/W) 28 17 10

R7 (°C/W) 0.28

R8 (°C/W) 0.9

C1 (W.s/°C) 0.001

C2 (W.s/°C) 0.003

C3 (W.s/°C) 0.025

C4 (W.s/°C) 0.75

C5 (W.s/°C) 1 4 9

C6 (W.s/°C) 2.2 5 17

C7 (W.s/°C) 0.001

C8 (W.s/°C) 0.003

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VND5E025AK-E Package and packing information

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com

ECOPACK

®

is an ST trademark.

5.2 Package mechanical data

Figure 39. PowerSSO-24 package dimensions

.

Doc ID 14618 Rev 4 33/38

Package and packing information VND5E025AK-E

Table 16. PowerSSO-24™ mechanical data

Millimeters

Symbol

Min Typ Max

A 2.45

A2 2.15 2.35

a1 0 0.1

b0.33 0.51

c0.23 0.32

D 10.10 10.50

E7.4 7.6

e0.8

e3 8.8

F2.3

G 0.1

H 10.1 10.5

h 0.4

k0° 8°

L0.55 0.85

O1.2

Q0.8

S2.9

T3.65

U1.0

N 10°

X4.1 4.7

Y6.5 7.1

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VND5E025AK-E Package and packing information

5.3 Packing information

Figure 40. PowerSSO-24 tube shipment (no suffix)

Base Qty 49
Bulk Qty 1225

C

B

A

Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”)

Tube length (±0.5) 532
A 3.5
B 13.8
C (±0.1) 0.6

All dimensions are in mm.

REEL DIMENSIONS

Base Qty 1000
Bulk Qty 1000
A (max) 330
B (min) 1.5
C (±0.2) 13
F 20.2
G (+2 / -0) 24.4
N (min) 100
T (max) 30.4

TAPE DIMENSIONS

According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986

Tape width W 24
Tape Hole Spacing P0 (±0.1) 4
Component Spacing P 12
Hole Diameter D (±0.05) 1.55
Hole Diameter D1 (min) 1.5
Hole Position F (±0.1) 11.5
Compartment Depth K (max) 2.85
Hole Spacing P1 (±0.1) 2

End

All dimensions are in mm.

Start

Top

cover

tape

500mm min

Empty components pockets
sealed with cover tape.

User direction of feed

No componentsNo components Components

500mm min

Doc ID 14618 Rev 4 35/38

Order codes VND5E025AK-E

6 Order codes

Table 17. Device summary

Order codes

Package

Tube Tape and reel

PowerSSO-24 VND5E025AK-E VND5E025AKTR-E

36/38 Doc ID 14618 Rev 4

VND5E025AK-E Revision history

7 Revision history

Table 18. Document revision history

Date Revision Changes

01-Apr-2008 1 Initial release

Table 16: PowerSSO-24 mechanical data:

– Deleted A (min) value
– Changed A (max) value from 2.47 to 2.45

19-Jun-2009 2

22-Jul-2009 3

28-May-2010 4 Updated Features list.

– Changed A2 (max) value from 2.40 to 2.35
– Changed a1 (max) value from 0.075 to 0.1
– Added F row
– Updated k row

Updated Figure 39: PowerSSO-24 package dimensions.
Updated Table 16: PowerSSO-24™ mechanical data:
– Deleted G1 row
– Added O, Q, S, T and U rows

Doc ID 14618 Rev 4 37/38

VND5E025AK-E

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38/38 Doc ID 14618 Rev 4