Datasheet VND5025AK-E Datasheet (ST)

Features

Max transient supply voltage V

Operating voltage range V

Max on-state resistance (per ch.) R

Current limitation (typ) I

Off-state supply current I

1. Typical value with all loads connected.

■ Main

– In-rush current active management by

power limitation
– Very low standby current
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC

European directive
– Package: ECOPACK

■ Diagnostic functionsDoc ID 12581

– Proportional load current sense
– High current sense precision for wide range

currents
– Current sense disable
– Thermal shutdown indication
– Very low current sense leakage

■ Protection

– Undervoltage shut-down
– Overvoltage clamp
– Load current limitation
– Self-limiting of fast thermal transients
– Protection against loss of ground and loss

of V
– Thermal shutdown
– Reverse battery protection (see Application

Table 1. Device summary

CC

schematic on page 21)

Package

PowerSSO-24™ VND5025AK-E VND5025AKTR-E

VND5025AK-E

Double channel high side driver with analog

current sense for automotive applications

CC

CC

ON

LIMH

S

®

41V

4.5 to 36V

25 mΩ

41 A

(1)

2 µA

PowerSSO-24™

– Electrostatic discharge protection

Application

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

Description

The VND5025AK-E is a monolithic device made
using STMicroelectronics VIPower M0-5
technology, intended for driving resistive or
inductive loads with one side connected to
ground, and suitable for driving LEDs. Active V
pin voltage clamp protects the device against low
energy spikes (see ISO7637 transient
compatibility table). This device integrates an
analog current sense which delivers a current
proportional to the load current (according to a
known ratio) when CS_DIS is driven low or left
open. When CS_DIS is driven high, the
CURRENT SENSE pin is in a high impedance
condition. Output current limitation protects the
device in overload condition. In case of long
overload duration, the device limits the dissipated
power to safe level up to thermal shut-down
intervention. Thermal shut-down with automatic
restart allows the device to recover normal
operation as soon as fault condition disappears.

Order codes

Tube Tape and reel

CC

July 2009 Doc ID 12581 Rev 10 1/32

www.st.com

1

Contents VND5025AK-E

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 21

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 22

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23

4 Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.1 PowerSSO-24™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

2/32 Doc ID 12581 Rev 10

VND5025AK-E List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 7. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 8. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 10. Current sense (8V < VCC < 16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 16. PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Doc ID 12581 Rev 10 3/32

List of figures VND5025AK-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 5. Delay response time between rising edge of output current and rising edge of Current Sense

(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. IOUT/ISENSE vs IOUT
Figure 8. Maximum current sense ratio drift vs load current

Figure 9. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 10. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 11. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 14. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 15. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 17. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 18. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 19. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 20. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 23. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 24. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 25. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 26. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 27. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23

Figure 28. PowerSSO-24™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 29. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 24

Figure 30. PowerSSO-24™ thermal impedance junction to ambient single pulse (one channel ON) . 25
Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-24™

Figure 32. PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 33. PowerSSO-24™ tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 34. PowerSSO-24™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

(1)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

(1)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

(1)

. . . . . . . . . . . . . . . 25

4/32 Doc ID 12581 Rev 10

VND5025AK-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

Vcc

V

CC

CLAMP

GND

INPUT1

LOGIC

INPUT2

CS_DIS

Table 2. Pin functions

Name Function

V

CC

OUTPUT

GND

INPUT

1,2

1,2

Battery connection.

Power output.

Ground connection; must be reverse battery protected by an external
diode/resistor network.

Voltage controlled input pin with hysteresis, CMOS compatible; controls
output switch state.

DRIVER 1

Pwr

LIM

Pwr

I

OUT1

UNDERVOLTAGE

PwCLAMP 1

I

V

DSLIM

1

LIM

OVERTEMP. 1

K 1

2

LIM

OUTPUT1

CURRENT
SENSE1

1

1

DRIVER 2

PwCLAMP 2

I

2

LIM

V

2

DSLIM

OUTPUT2

CURRENT
SENSE2

OVERTEMP. 2

I

OUT2

K 2

CURRENT SENSE

Analog current sense pin; delivers a current proportional to the load

1,2

current.

CS_DIS Active high CMOS compatible pin to disable the current sense pin.

Doc ID 12581 Rev 10 5/32

Block diagram and pin description VND5025AK-E

Figure 2. Configuration diagram (top view)

V

CC

GND

N.C.

INPUT2

N.C.

INPUT1

N.C.

CURRENT SENSE1

N.C.

CURRENT SENSE2

CS_DIS.

V

CC

1
2
3
4
5
6
7
8
9
10
11
12

24
23
22
21
20
19
18
17
16
15
14
13

OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1

TAB = V

Table 3. Suggested connections for unused and not connected pins

CC

Connection / pin Current sense N.C. Output Input CS_DIS

Floating N.R.

To Ground Through 1kΩ resistor X N.R.

(1)

XX X X

Through 10kΩ

resistor

Through 10kΩ

resistor

1. Not recommended.

6/32 Doc ID 12581 Rev 10

VND5025AK-E Electrical specification

2 Electrical specification

Figure 3. Current and voltage conventions

I

S

V

V

CSD

CC

I

I

CSD

CS_DIS

I

IN1

V

IN1

I

IN2

INPUT1

INPUT2

V

IN2

GND

OUTPUT1

CURRENT
SENSE1

OUTPUT2

CURRENT
SENSE2

I

GND

OUT1

I

SENSE1

I

OUT2

I

SENSE2

V

SENSE2

V

OUT2

V

SENSE1

V

F

V

OUT1

V

CC

Note: V

Fn

= V

- VCC during reverse battery condition.

OUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

V

-V

-I

GND

I

OUT

- I

OUT

I

CSD

-I

CSENSE

V

CSENSE

DC supply voltage 41

CC

Reverse DC supply voltage 0.3

CC

DC reverse ground pin current 200 mA

DC output current Internally limited

Reverse DC output current 24

DC input current

IN

DC current sense disable input current

DC reverse CS pin current 200

Current sense maximum voltage VCC- 41 to +V

-1 to 10

CC

V

A

mAI

V

Doc ID 12581 Rev 10 7/32

Electrical specification VND5025AK-E

Table 4. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Maximum switching energy (single pulse)

E

MAX

(L = 0.8mH; R
I

OUT

= I

limL

L

(Typ.))

=0Ω; V

= 13.5V; T

bat

jstart

= 150°C;

140 mJ

Electrostatic discharge
(Human Body Model: R = 1.5kΩ; C = 100pF)

4000
2000
4000
5000
5000

V
V
V
V
V

°C

V

V

ESD

ESD

T

T

- Input

- Current sense

- CS_DIS

- Output

- V

CC

Charge device model (CDM-AEC-Q100-011) 750 V

Junction operating temperature -40 to 150

j

Storage temperature -55 to 150

stg

2.2 Thermal data

Table 5. Thermal data

Symbol Parameter Max Value Unit

R

thj-case

R

thj-amb

Thermal resistance junction-case (MAX) (with one channel ON) 1.35

°C/W

Thermal resistance junction-ambient (MAX) See Figure 29

8/32 Doc ID 12581 Rev 10

VND5025AK-E Electrical specification

2.3 Electrical characteristics

8V<VCC<36V; -40°C<Tj<150°C, unless otherwise specified.

Table 6. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

USDhyst

R

V

clamp

I

L(off)

V

Operating supply voltage 4.5 13 36

CC

Undervoltage shutdown 3.5 4.5

USD

Undervoltage shut-down
hysteresis

On-state resistance

ON

Clamp voltage IS= 20 mA 41 46 52 V

Supply current

I

S

Off-state output current

Output - VCC diode
voltage

(1)

F

1. For each channel.

2. PowerMOS leakage included.

(1)

I

=3A; Tj=25°C 25

OUT

=3A; Tj=150°C 50

OUT

I

=3A; VCC=5V; Tj=25°C 35

OUT

Off-state; V
VIN=V

CC

OUT=VSENSE=VCSD

On-state; VCC= 13V;

=5V; I

V

(1)

IN

VIN=V
V

CC

V

IN=VOUT

V

CC

-I

OUT

OUT

OUT

=13V; Tj= 25°C

=13V; Tj= 125°C

=4A; Tj= 150°C 0.7 V

= 13V; Tj=25°C;

=0A

=0V;

=0V;

=0V

V

0.5

mΩI

(2)

(2)

5

2

µA

36mA

00.01 3

µA

05

Table 7. Switching (VCC=13V; Tj= 25°C)

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

d(on)

t

d(off)

(dV

OUT

(dV

OUT

W

ON

W

OFF

Turn-on delay time

Turn-off delay time 50

=4.3Ω

R

L

(see Figure 6)

/dt)onTurn-on voltage slope

=4.3Ω

R

/dt)

Turn-off voltage slope See Figure 22

off

L

Switching energy losses
during t

Switching energy losses
during t

ON

W

RL=4.3Ω
(see Figure 6)

OFF

W

35

µs

See Figure 21

V/µs

0.45

mJ

0.35

Doc ID 12581 Rev 10 9/32

Electrical specification VND5025AK-E

Table 8. Logic input

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

IL

I

IL

V

IH

I

IH

V

I(hyst)

ICL

V

CSDL

I

CSDL

V

CSDH

I

CSDH

V

CSD(hyst)

V

CSCL

Table 9. Protection and diagnostics

Input low level voltage 0.9 V

Low level input current VIN=0.9V 1 µA

Input high level voltage 2.1 V

High level input current VIN=2.1V 10 µA

Input hysteresis voltage 0.25

Input clamp voltage

IN

I

= -1mA -0.7

IN

VV

I

=1mA 5.5 7

CS_DIS low level voltage 0.9

Low level CS_DIS current V

=0.9V 1 µA

CSD

CS_DIS high level voltage 2.1 V

High level CS_DIS current V

=2.1V 10 µA

CSD

CS_DIS hysteresis voltage 0.25

I

CS_DIS clamp voltage

(1)

=1mA 5.5 7

CSD

= -1mA -0.7

I

CSD

V

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

= 13V 29 41

I

LIMH

I

LIML

T

T

T

T

HYST

V

DEMAG

V

TSD

RS

ON

DC short circuit current

Short circuit current
during thermal cycling

Shutdown temperature 150 175 200

Reset temperature TRS+1 TRS+5

R

Thermal reset of STATUS 135

Thermal hysteresis
(T

TSD-TR

)

Turn-off output voltage
clamp

Output voltage drop
limitation

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

CC

5V < V

CC

< 36V

VCC= 13V;
TR<Tj<T

I

OUT

V

IN

TSD

=2A;

=0;

L=6mH

= 0.20.1A;

I

OUT

= -40°C to +150°C

T

j

(see Figure 9)

57

A

16

°C

7

VCC-41 VCC-46 VCC-52 V

25 mV

10/32 Doc ID 12581 Rev 10

VND5025AK-E Electrical specification

Table 10. Current sense (8V < VCC<16V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

dK

dK

K

LED

K

0/K0

K

1/K1

K

0

(1)

1

(1)

2

I

OUT/ISENSE

I

OUT/ISENSE

Current Sense
ratio drift

I

OUT/ISENSE

Current Sense
ratio drift

I

OUT/ISENSE

= 0.05A; V

OUT

Tj= -40°C to 150°C

I

= 0.5 A; V

OUT

= -40°C to 150°C

T

j

=0.5A; V

I

OUT

= -40°C to 150°C

T

j

I

=2A; V

OUT

=0V;

V

CSD

SENSE

SENSE

Tj= -40°C to 150°C

= 25°C to 150°C

T

j

=2A; V

I

OUT

V

CSD

= -40°C to 150°C

T

j

I

=3A; V

OUT

V

CSD

= -40°C to 150°C

T

j

SENSE

=0V;

SENSE

=0V;

Tj= 25°C to150°C

SENSE

SENSE

=0.5V; V

=0.5V; V

=0.5V; V

=4V;

=4V;

=4V;

CSD

CSD

CSD

=0V;

=0V;

=0V;

1450 3300 5180

1720 3020 4360

-12 +12 %

1940

2810

3740

2230

2810

3390

-10 +10 %

2250

2790

3450

2400

2790

3180

dK

2/K2

K

dK

3/K3

I

SENSE0

(1)

3

(1)

Current Sense
ratio drift

I

OUT/ISENSE

Current Sense
ratio drift

Analog Sense
leakage current

=3A; V

I

OUT

Tj= -40°C to 150°C

I

=10A; V

OUT

V

=0V;

CSD

= -40°C to 150°C

T

j

= 25°C to 150°C

T

j

=10A; V

I

OUT

= -40°C to 150°C

T

j

I

=0A; V

OUT

=5V; VIN=0V; Tj= -40°C to 150°C

V

CSD

V

=0V; VIN=5V; Tj= -40°C to 150°C

CSD

I

=2A; V

OUT

V

=5V; VIN=5V; Tj= -40°C to 150°C

CSD

SENSE

SENSE

SENSE

SENSE

SENSE

=4V; V

=4V;

=4V; V

=0V;

=0V;

CSD

CSD

=0V;

=0V;

-7 +7 %

2610

2760

2970

2650

2760

2870

-4 +4 %

0
0

0

1
2

1

µA
µA

µA

Openload on-

I

OL

state current
detection

V

= 5V, I

IN

= 5 µA 5 30 mA

SENSE

threshold

Max analog

V

SENSE

Sense output

I

OUT

=3 A; V

=0V 5

CSD

voltage

V

SENSEH

Analog Sense
output voltage in
over temperature

V

CC

= 13V; R

=3.9kΩ 9

SENSE

V

condition

Doc ID 12581 Rev 10 11/32

Electrical specification VND5025AK-E

Table 10. Current sense (8V < VCC< 16V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Analog Sense

I

SENSEH

output current in
over temperature
condition

V

CC

= 13V; V

=5V 8 mA

SENSE

t

DSENSE1H

t

DSENSE1L

t

DSENSE2H

Delay response
time from falling
edge of CS_DIS
pin

Delay response
time from rising
edge of CS_DIS
pin

Delay response
time from rising
edge of INPUT
pin

V
I

SENSE

SENSE

<4V, 0.5<I

= 90% of I

(see Figure 4)

V
I

SENSE

SENSE

<4V, 0.5<I

= 10% of I

(see Figure 4)

SENSE

<4V, 0.5<I

= 90% of I

V
I

SENSE

(see Figure 4)

Delay response

Δt

DSENSE2H

time between
rising edge of
output current
and rising edge

V
I

SENSE

I

OUT

(see Figure 5)

SENSE

= 90% of I

<4V,

= 90% of I

of current sense

Delay response

t

DSENSE2L

time from falling
edge of INPUT
pin

1. Parameter guaranteed by design; it is not tested.

V
I

SENSE

SENSE

<4V, 0.5<I

= 10% of I

(see Figure 4)

OUT

SENSEMAX

OUT

SENSEMAX

OUT

SENSEMAX

SENSEMAX,

OUTMAX

OUT

SENSEMAX

<10A

<10A

<10A

, I

OUTMAX

<10A

=3A

50 100

5 20

70 300

µs

200

100 250

Figure 4. Current sense delay characteristics

INPUT

CS_DIS

LOAD CURRENT

SENSE CURRENT

t

DSENSE2H

12/32 Doc ID 12581 Rev 10

t

DSENSE1L

t

DSENSE1H

t

DSENSE2L

VND5025AK-E Electrical specification

Figure 5. Delay response time between rising edge of output current and rising

edge of Current Sense (CS enabled)

V

IN

Δ

t

DSENSE2H

t

I

OUT

I

SENSE

90% I

OUTMAX

I

OUTMAX

I

SENSEMAX

t

90% I

SENSEMAX

t

Figure 6. Switching characteristics

t

d(off)

t

Woff

90%

t

f

dV

OUT

/dt

(off)

t

t

V

OUT

t

Won

80%

dV

/dt

OUT

(on)

t

r

INPUT

t

d(on)

10%

Doc ID 12581 Rev 10 13/32

Electrical specification VND5025AK-E

Figure 7. I

OUT/ISENSE

I

/ I

out

sense

1. See Table 10 for details.

OUT

(1)

vs I

4500

4000

3500

max Tj = -40 °C to 150 °C

max Tj = 25 °C to 150 °C

3000

2500

2000

min Tj = 25 °C to 150 °C

min Tj = -40 °C to 150 °C

typical value

1500

1000

246810

I

(A)

OUT

Figure 8. Maximum current sense ratio drift vs load current

(1)

dk/k(%)

15

10

5

0

-5

-10

-15

2345678910

I

(A)

OUT

1. Parameter guaranteed by design; it is not tested.

14/32 Doc ID 12581 Rev 10

VND5025AK-E Electrical specification

Table 11. Truth table

Conditions Input Output Sense (V

CSD

=0V)

(1)

Normal operation

LL 0

HH Nominal

L

Over temperature

L

HV

L

Undervoltage

L0

H

L

Short circuit to GND (R

≤ 10mΩ)

SC

H

L

V

SENSEH

0 if Tj < T

L

Short circuit to V

CC

H < Nominal

H

Negative output voltage clamp L L 0

1. If the V
and external circuit.

is high, the SENSE output is at a high impedance; its potential depends on leakage currents

CSD

Figure 9. Output voltage drop limitation

0

SENSEH

0

if Tj > T

0

TSD

TSD

VCC-V

OUT

Tj=150oC

V

on

V

on/Ron(T)

=25oC

T

j

=-40oC

T

j

I

OUT

Doc ID 12581 Rev 10 15/32

Electrical specification VND5025AK-E

Table 12. Electrical transient requirements (part 1/3)

ISO 7637-2:

2004(E)

Test pulse

Test levels

(1)

Number of

pulses or

III IV Min. Max.

test times

Burst cycle/pulse

repetition time

Delays and
Impedance

1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10Ω

2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2Ω

3a -100V -150V 1h 90ms 100ms 0.1µs, 50Ω

3b +75V +100V 1h 90ms 100ms 0.1µs, 50Ω

4 -6V -7V 1 pulse 100ms, 0.01Ω

(2)

5b

1. The above test levels must be considered referred to VCC= 13.5V except for pulse 5b.

2. Valid in case of external load dump clamp: 40V maximum referred to ground.

Table 13. Electrical transient requirements (part 2/3)

ISO 7637-2:

+65V +87V 1 pulse 400ms, 2Ω

Test level results

2004E

Test pulse

III VI

1C C

2a C C

3a C C

3b C C

4C C

(1)

5b

1. Valid in case of external load dump clamp: 40V maximum referred to ground.

Table 14. Electrical transient requirements (part 3/3)

CC

Class Contents

C All functions of the device performed as designed after exposure to disturbance.

E

One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.

16/32 Doc ID 12581 Rev 10

VND5025AK-E Electrical specification

Figure 10. Waveforms

NORMAL OPERATION

INPUT

CS_DIS

LOAD CURRENT

SENSE CURRENT

UNDERVOLTAGE

V

V

CC

INPUT

CS_DIS

LOAD CURRENT

SENSE CURRENT

V

USD

USDhyst

INPUT

CS_DIS
LOAD VOLTAGE

LOAD CURRENT

SENSE CURRENT

T

T

T

j

R

INPUT

CS_DIS

LOAD CURRENT

SENSE CURRENT

Current
limitation

TSD

T

SHORT TO V

CC

< Nominal < Nominal

OVERLOAD OPERATION

RS

I

LIMH

I

LIML

V

SENSEH

Power
limitation

Thermal cycling

SHORTED LOAD NORMAL LOAD

Doc ID 12581 Rev 10 17/32

Electrical specification VND5025AK-E

2.4 Electrical characteristics curves

Figure 11. Off-state output current Figure 12. High level input current

Iloff (uA)

0.5

0.45

0.4

0.35

Off State
Vcc=13V

Vin=Vout=0V

0.3

0.25

0.2

0.15

0.1

0.05

0

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Iih(uA)

5

4.5

4

Vin=2.1V

3.5

3

2.5

2

1.5

1

0.5

0

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Figure 13. Input clamp voltage Figure 14. Input high level

Vicl (V)

7

6.75

6.5

6.25

5.75

5.5

5.25

Iin=1mA

6

5

-50 -25 0 25 50 75 100 125 150 175

Tc (° C)

Vih (V)

4

3.5

3

2.5

2

1.5

1

0.5

0

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Figure 15. Input low level Figure 16. Input hysteresis voltage

Vil (V)

2

1.8

1.6

1.4

1.2

1

0.8

0.6

0.4

0.2

0

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

18/32 Doc ID 12581 Rev 10

Vhyst (V)

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

VND5025AK-E Electrical specification

Figure 17. On-state resistance vs T

Ron (mOhm)

100

90

80

70

60

50

40

30

20

10

0

Iout=3A

Vcc=13V

-50 -25 0 25 50 75 100 125 150 175

case

Figure 18. On-state resistance vs V

Ron (mOhm)

80

70

60

50

40

30

20

10

0

0 5 10 15 20 25 30 35 40

Tc ( °C)

Figure 19. Undervoltage shutdown Figure 20. I

Vusd (V)

16

14

12

10

8

6

4

2

0

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Ilimh (A)

100

90

80

70

60

50

40

30

20

10

0

-50 -25 0 25 50 75 100 125 150 175

LIMH

Vcc=13V

vs T

CC

Tc=150°C

Tc= 125°C

Tc= 25 °C

Tc= -4 0° C

Vcc (V)

case

Tc (°C)

Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope

(dVout/dt)on (V/ms)

1000

900

800

700

600

500

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Vcc=13V

Rl=4.3Ohm

Tc ( ° C)

Doc ID 12581 Rev 10 19/32

(dVout/dt)off (V/ms)

1000

900

800

700

600

500

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Vcc=13V

Rl=4.3Ohm

Tc ( °C )

Electrical specification VND5025AK-E

Figure 23. CS_DIS high level voltage Figure 24. CS_DIS low level voltage

Vcsdh (V)

4

3.5

3

2.5

2

1.5

1

0.5

0

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Figure 25. CS_DIS clamp voltage

Vcsdcl (V)

8

7.5

6.5

5.5

4.5

Icsd=1mA

7

6

5

4

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Vcsdl (V)

4

3.5

3

2.5

2

1.5

1

0.5

0

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

20/32 Doc ID 12581 Rev 10

VND5025AK-E Application information

3 Application information

Figure 26. Application schematic

+5V

V

CC

µC

R

prot

R

prot

CS_DIS

INPUT

OUTPUT

D

ld

R

prot

C

EXT

CURRENT SENSE

R

SENSE

V

GND

GND

R

GND

D

GND

Note: Channel 2 has the same internal circuit as channel 1.

3.1 GND protection network against reverse battery

This section provides two solutions for implementing a ground protection network against
reverse battery.

3.1.1 Solution 1: resistor in the ground line (R

This first solution can be used with any type of load.

The following formulas indicate how to dimension the R

1. R

2. R

where -I
maximum rating section of the device datasheet.

≤ 600mV / (I

GND

≥ (-VCC) / (-I

GND

is the DC reverse ground pin current and can be found in the absolute

GND

S(on)max

GND

)

)

GND

only)

GND

resistor:

Power Dissipation in R

P

=(-VCC)2/R

D

(when VCC< 0 during reverse battery situations) is:

GND

GND

This resistor can be shared among several different HSDs. Please note that the value of this
resistor is calculated with formula (1), where I
state currents of the different devices.

S(on)max

Please note that if the microprocessor ground is not shared by the device ground, the R
produces a shift (I

S(on)max

* R

) in the input thresholds and the status output values. This

GND

becomes the sum of the maximum on-

GND

shift varies depending on how many devices are ON in the case of several high-side drivers
sharing the same R

GND

.

Doc ID 12581 Rev 10 21/32

Application information VND5025AK-E

If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor, then ST suggests to utilize the following Solution 2.

3.1.2 Solution 2: diode (D

) in the ground line

GND

If the device drives an inductive load, insert a resistor (R

This small signal diode can be safely shared among several different HSDs. Also in this
case, the presence of the ground network produces a shift ( 600mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift does not vary if more than one HSD shares the same diode/resistor
network.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V

maximum DC rating. The same applies if the device is subject to transients on the VCC

CC

line that are greater than the ones shown in the ISO 7637-2:2004E table.

3.3 MCU I/Os protection

If a ground protection network is used and negative transients are present on the VCC line,
the control pins are pulled negative. ST suggests to insert an in-line resistor (R
prevent the µC I/Os pins from latch-up.

The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (input levels compatibility) with the latch-up limit of µC
I/Os.

=1kΩ) in parallel to D

GND

≈

prot

GND

) to

.

-V

CCpeak/Ilatchup

≤ R

prot

≤ (V

OHµC-VIH-VGND

) / I

IHmax

Calculation example:

For V

CCpeak

5k

Ω ≤ R

Recommended values: R

= -100V and I

≤ 180kΩ

prot

latchup

=10kΩ, C

prot

≥ 20mA; V

EXT

≥ 4.5V

OHµC

=10nF.

22/32 Doc ID 12581 Rev 10

VND5025AK-E Application information

3.4 Maximum demagnetization energy (VCC=13.5V)

Figure 27. Maximum turn-off current versus inductance (for each channel)

100

A

B

10

I (A)

1

0,1110100L (mH)

C

A:

T

= 150°C single pulse

jstart

B: T

C:

VIN, I

= 100°C repetitive pulse

jstart

T

= 125°C repetitive pulse

jstart

L

Note: Values are generated with R

In case of repetitive pulses, T
must not exceed the temperature specified above for curves A and B.

Demagnetization Demagnetization Demagnetization

=0 Ω.

L

(at beginning of each demagnetization) of every pulse

jstart

t

Doc ID 12581 Rev 10 23/32

Package and thermal data VND5025AK-E

4 Package and thermal data

4.1 PowerSSO-24™ thermal data

Figure 28. PowerSSO-24™ PC board

Note: Layout condition of R

area = 77mm x 86mm, PCB thickness = 1.6mm, Cu thickness = 70µm (front and back side),
Copper areas: from minimum pad layout to 8cm

Figure 29. R

thj-amb

ON)

RTHj_amb(°C/W)

55

50

45

40

35

30

0246810

and Zth measurements (PCB: Double layer, Thermal Vias, FR4

th

2

).

vs PCB copper area in open box free air condition (one channel

PCB Cu heatsink area (cm^2)

24/32 Doc ID 12581 Rev 10

VND5025AK-E Package and thermal data

Figure 30. PowerSSO-24™ thermal impedance junction to ambient single pulse (one

channel ON)

ZTH (°C/W)

1000

100

Footprint

2 cm

8 cm

10

1

0.1

0.0001 0.001 0.01 0.1 1 10 100 1000

Time (s)

Equation 1: pulse calculation formula

Z

THδ

where δ = t

RTHδ Z

/T

P

THtp

1 δ–()+⋅=

Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-24™

2

2

(1)

1. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.

Doc ID 12581 Rev 10 25/32

Package and thermal data VND5025AK-E

Table 15. Thermal parameters

Area/Island (cm2) Footprint 2 8

R1 (°C/W) 0.28

R2 (°C/W) 0.9

R3 (°C/W) 6

R4 (°C/W) 7.7

R5 (°C/W) 9 9 8

R6 (°C/W) 28 17 10

R7 (°C/W) 0.28

R8 (°C/W) 0.9

C1 (W.s/°C) 0.001

C2 (W.s/°C) 0.003

C3 (W.s/°C) 0.025

C4 (W.s/°C) 0.75

C5 (W.s/°C) 1 4 9

C6 (W.s/°C) 2.2 5 17

C7 (W.s/°C) 0.001

C8 (W.s/°C) 0.003

26/32 Doc ID 12581 Rev 10

VND5025AK-E Package and packing information

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com

ECOPACK

®

is an ST trademark.

5.2 Package mechanical data

Figure 32. PowerSSO-24™ package dimensions

.

Doc ID 12581 Rev 10 27/32

Package and packing information VND5025AK-E

Table 16. PowerSSO-24™ mechanical data

Millimeters

Symbol

Min Typ Max

A 2.45

A2 2.15 2.35

a1 0 0.1

b0.33 0.51

c0.23 0.32

D 10.10 10.50

E7.4 7.6

e0.8

e3 8.8

F2.3

G 0.1

H 10.1 10.5

h 0.4

k0° 8°

L0.55 0.85

O1.2

Q0.8

S2.9

T3.65

U1.0

N 10°

X4.1 4.7

Y6.5 7.1

28/32 Doc ID 12581 Rev 10

VND5025AK-E Package and packing information

5.3 Packing information

Figure 33. PowerSSO-24™ tube shipment (no suffix)

Base Qty 49
Bulk Qty 1225

C

B

Tube length (±0.5) 532
A 3.5
B 13.8
C (±0.1) 0.6

A

Figure 34. PowerSSO-24™ tape and reel shipment (suffix “TR”)

REEL DIMENSIONS

Base Qty 1000
Bulk Qty 1000
A (max) 330
B (min) 1.5
C (±0.2) 13
F 20.2
G (+2 / -0) 24.4
N (min) 100
T (max) 30.4

TAPE DIMENSIONS

According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986

Tape width W 24
Tape Hole Spacing P0 (±0.1) 4
Component Spacing P 12
Hole Diameter D (±0.05) 1.55
Hole Diameter D1 (min) 1.5
Hole Position F (±0.1) 11.5

All dimensions are in mm.

Compartment Depth K (max) 2.85
Hole Spacing P1 (±0.1) 2

All dimensions are in mm.

Top

cover

tape

End

500mm min

Empty components pockets
sealed with cover tape.

User direction of feed

Start

No componentsNo components Components

500mm min

Doc ID 12581 Rev 10 29/32

Revision history VND5025AK-E

6 Revision history

Table 17. Document revision history

Date Revision Changes

11-Apr-2006 1 Initial release

Reformatted.

30-Mar-2007 2

Table 4 on page 7: updated E
Table 6 on page 9: updated V
Table 7 on page 9: set Tj condition to 25°C”

Table 10 on page 11: added dK

t

DSENSE2H

values and note.

Added Figure 5: Delay response time between rising edge of output

current and rising edge of Current Sense (CS enabled) on page 13.

Updated Figure 7: IOUT/ISENSE vs IOUT
Added Figure 8: Maximum current sense ratio drift vs load current

on page 14.
Table 12 on page 16: Updated Test Level values III and IV for test

pulse 5b and notes.
Added Section 3.4: Maximum demagnetization energy

(VCC = 13.5V) on page 23.

Added ECOPACK® packages information.

entries.

MAX

test conditions.

F

, dK2/K2, dK3/K3, Δt

1/K1

(1)

on page 14.

DSENSE2H

,

(1)

01-Jun-2007 3

03-Jul-2007 4

Figure 31: Thermal fitting model of a double channel HSD in
PowerSSO-24™

(1)

: added note.

Updated Figure 1: Block diagram and Figure 2: Configuration

diagram (top view).

24-Jul-2007 5 Updated Table 16: PowerSSO-24™ mechanical data.

Updated Table 10: Current sense (8V < VCC < 16V):

values

0/K0

values from ± 3 to ± 4%

3/K3

DSENSE2H

parameter

OL

value from 110 to 200 µs

with new dK/K values.

test condition from VIN = 0V to VIN = 5V.

OL

12-Dec-2007 6

12-Feb-2008 7

10-Apr-2008 8

– added dK
– changed dK
– changed Δt
– added I
Updated Figure 8: Maximum current sense ratio drift vs load

(1)

current

Corrected typing error in Table 10: Current sense (8V < VCC < 16V):
changed I

Corrected Figure 27: Maximum turn-off current versus inductance (for

each channel)

Table 16: PowerSSO-24™ mechanical data:

– Deleted A (min) value
– Changed A (max) value from 2.47 to 2.45

02-Jul-2009 9

– Changed A2 (max) value from 2.40 to 2.35
– Changed a1 (max) value from 0.075 to 0.1
– Added F row
– Updated k values

30/32 Doc ID 12581 Rev 10

VND5025AK-E Revision history

Table 17. Document revision history (continued)

Date Revision Changes

Updated Figure 32: PowerSSO-24™ package dimensions.

23-Jul-2009 10

Updated Table 16: PowerSSO-24™ mechanical data:
– Deleted G1 row
– Added O, Q, S, T and U rows

Doc ID 12581 Rev 10 31/32

VND5025AK-E

Please Read Carefully:

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.

All ST products are sold pursuant to ST’s terms and conditions of sale.

Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.

UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.

Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.

ST and the ST logo are trademarks or registered trademarks of ST in various countries.

Information in this document supersedes and replaces all information previously supplied.

The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.

© 2009 STMicroelectronics - All rights reserved

STMicroelectronics group of companies

Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -

Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America

www.st.com

32/32 Doc ID 12581 Rev 10