Datasheet VN920SP-E Datasheet (ST)

Features

Typ e R

VN920SP-E 15 mΩ 30 A 36 V

DS(on)

I

OUT

VN920SP-E

High-side driver

V

CC

■ ECOPACK

■ Automotive Grade: compliance with AEC

®

: lead free and RoHS compliant

guidelines

■ Very low standby current

■ CMOS compatible input

■ Proportional load current sense

■ Current sense disable

■ Thermal shutdown protection and diagnosis

■ Undervoltage shutdown

■ Overvoltage clamp

■ Load current limitation

Description

The VN920SP-E is a monolithic device designed
in STMicroelectronics™ VIPower™ M0-3
technology. The VN920SP-E is intended for
driving any type of load with one side connected
to ground. The active V
protects the device against low energy spikes
(see ISO7637 transient compatibility table).
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload.

The device integrates an analog current sense
output which delivers a current proportional to the
load current. The device automatically turns-off in
the case where the ground pin becomes
disconnected.

pin voltage clamp

CC

Table 1. Device summary

Package

PowerSO-10™ VN920SP-E VN920SPTR-E

February 2011 Doc ID 10896 Rev 3 1/27

Order codes

Tube Tape and reel

www.st.com

1

Contents VN920SP-E

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 17

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 18

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.4 PowerSO-10 maximum demagnetization energy (V

= 13.5 V) . . . . . . . 19

CC

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.2 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.3 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

2/27 Doc ID 10896 Rev 3

VN920SP-E List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Switching (V

Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 8. V

output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

CC

Table 9. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 10. Current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 12. Electrical transient requirements on V
Table 13. Electrical transient requirements on V
Table 14. Electrical transient requirements on V

Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 16. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

= 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

CC

pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CC

pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CC

pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CC

Doc ID 10896 Rev 3 3/27

List of figures VN920SP-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 4. Switching characteristics (resistive load R
Figure 5. I

OUT/ISENSE

versus I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

OUT

Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 10. On-state resistance vs V
Figure 11. On-state resistance vs T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

case

Figure 12. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 13. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 14. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 15. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 16. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 17. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 18. I

LIM

vs T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

case

Figure 19. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 20. PowerSO-10 maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 21. PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 22. R

vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20

thj-amb

Figure 23. PowerSO-10 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . 21

Figure 24. Thermal fitting model of a single channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . . 21

Figure 25. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 26. PowerSO-10 suggested pad layout and tube shipment (no suffix) . . . . . . . . . . . . . . . . . . 25

Figure 27. PowerSO-10 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

=1.3Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

L

4/27 Doc ID 10896 Rev 3

VN920SP-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V

CC

V

CC

CLAMP

GND

INPUT

LOGIC

OVERTEMPERATURE

DETECTION

OVERVOLTAGE

DETECTION

UNDERVOLTAGE

DRIVER

Figure 2. Configuration diagram (top view)

GROUND
INPUT

C.SENSE
N.C.
N.C.

6

7

8

9

10

V

CC

11

DETECTION

Power CLAMP

CURRENT LIMITER

VDS LIMITER

I

OUT CURRENT

5

4

3

2

1

K

OUTPUT

OUTPUT
N.C.

OUTPUT

OUTPUT

OUTPUT

SENSE

PowerSO-10

Table 2. Suggested connections for unused and not connected pins

Connection / pin Current sense N.C. Output Input

Floating X X X

To ground

Through 1 KΩ

resistor

X

Through 10KΩ

Doc ID 10896 Rev 3 5/27

resistor

Electrical specifications VN920SP-E

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

CC

I

OUT

I

SENSE

V

SENSE

GND

OUTPUT

I

GND

I

IN

V

IN

INPUT

CURRENT SENSE

V

F

V

OUT

V

CC

2.1 Absolute maximum ratings

Stressing the device above the rating listed in Ta bl e 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics sure program and other relevant quality
document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

- V

- I

GND

I

OUT

- I

OUT

I

V

CSENSE

V

ESD

CC

IN

DC supply voltage 41 V

Reverse DC supply voltage -0.3 V

CC

DC reverse ground pin current -200 mA

DC output current Internally limited A

Reverse DC output current -40 A

DC input current +/-10 mA

Current sense maximum voltage

Electrostatic discharge
(Human Body Model: R = 1.5 KΩ; C = 100 pF)
– INPUT
– CURRENT SENSE
–OUTPUT
–V

CC

-3

+15

4000
2000
5000
5000

V
V

V
V
V
V

6/27 Doc ID 10896 Rev 3

VN920SP-E Electrical specifications

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Maximum switching energy

E

T

MAX

P

T

T

STG

(L = 0.25 mH; R

= 150 °C; IL = 45 A)

T

jstart

Power dissipation TC ≤ 25 °C 96.1 W

tot

Junction operating temperature Internally limited °C

j

Case operating temperature -40 to 150 °C

c

= 0 Ω; V

L

= 13.5 V;

bat

Storage temperature -55 to 150 °C

362 mJ

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Max. value Unit

R

thj-case

R

thj-amb

1. When mounted on FR4 printed circuit board with 0.5 cm2 of Cu (at least 35 µm thick).

2. When mounted on FR4 printed circuit board with 6 cm2 of Cu (at least 35 µm thick).

Thermal resistance junction-case (max) 1.3 °C/W

Thermal resistance junction-ambient (max) 51.3

(1)

37

(2)

°C/W

°C/W

Doc ID 10896 Rev 3 7/27

Electrical specifications VN920SP-E

2.3 Electrical characteristics

Values specified in this section are for 8 V < V

< 36 V; -40 °C < Tj < 150 °C, unless

CC

otherwise stated.

Tabl e 5. Pow er

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

R

V

CLAMP

I

L(off1)

I

L(off2)

I

L(off3)

Operating supply voltage 5.5 13 36 V

CC

Undervoltage shutdown 3 4 5.5 V

USD

Overvoltage shutdown 36 V

OV

I

= 10 A; Tj = 25 °C;

OUT

On-state resistance

ON

Clamp voltage I

Supply current

I

S

Off-state output current V

Off-state output current V

Off-state output current

I

= 10 A;

OUT

= 3 A; V

I

OUT

= 20 mA

CC

Off-state; V

= V

V

IN

OUT

Off-state; V

= V

V

IN

OUT

On-state; V

= 0 A; R

I

OUT

= V

IN

OUT

= 0 V; V

IN

V

= V

IN

OUT

Tj = 125 °C

= 6 V

CC

(1)

CC

= 13 V;

41 48 55 V

= 0 V

= 13 V;

CC

= 0 V; Tj = 25 °C

= 13 V; V

CC

SENSE

= 5 V;

IN

= 3.9 kΩ

= 0 V 0 50 µA

= 3.5 V -75 0 µA

OUT

= 0 V; V

CC

= 13 V;

15
30
50

101025

20

5

5µA

mΩ
mΩ
mΩ

µA

µA

mA

V

I

L(off4)

1. V

Table 6. Switching (VCC=13V)

Off-state output current

and VOV are correlated. Typical difference is 5 V.

CLAMP

IN

Tj = 25 °C

= V

OUT

= 0 V; V

Symbol Parameter Test conditions Min. Typ. Max. Unit

dV

dV

t

d(on)

t

d(off)

OUT

OUT

Turn-on delay time RL = 1.3 Ω (see Figure 4)50µs

Turn-off delay time RL = 1.3 Ω (see Figure 4)50µs

/dt

Turn-on voltage slope RL = 1.3 Ω (see Figure 4) See Figure 15 V/µs

(on)

/dt

Turn-off voltage slope RL = 1.3 Ω (see Figure 4) See Figure 16 V/µs

(off)

8/27 Doc ID 10896 Rev 3

CC

= 13 V;

3µA

VN920SP-E Electrical specifications

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

I(hyst)

V

Tabl e 8. VCC output diode

Input low level voltage 1.25 V

IL

Low level input current V

I

IL

Input high level voltage 3.25 V

IH

I

High level input current V

IH

= 1.25 V 1 µA

IN

= 3.25 V 10 µA

IN

Input hysteresis voltage 0.5 V

Input clamp voltage

ICL

I

= 1 mA

IN

= - 1 mA

I

IN

66.8

-0.7

8V

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

F

Table 9. Protections

Forward on voltage - I

(1)

= 5.3 A; Tj = 150 °C - - 0.6 V

OUT

Symbol Parameter Test conditions Min. Typ. Max. Unit

T

TSD

T

T

hyst

I

lim

V

demag

V

1. To ensure long term reliability under heavy over-load or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device operates under
abnormal conditions this software must limit the duration and number of activation cycles.

Shutdown temperature 150 175 200 °C

Reset temperature 135 °C

R

Thermal hysteresis 7 15 °C

DC short circuit current

Turn-off output clamp
voltage

Output voltage drop

ON

limitation

V

= 13 V

CC

5V < V

I

OUT

V

IN

CC

= 2 A;

= 0 V;

< 36 V

L = 6 mH

= 1 A;

I

OUT

= -40 °C...150 °C

T

j

30 45 75

V

CC

- 41 V

CC

- 48 V

50 mV

75

- 55 V

CC

V

A
A

Doc ID 10896 Rev 3 9/27

Electrical specifications VN920SP-E

Table 10. Current sense

(1)

Symbol Parameter Test conditions Min. Typ. Max. Unit

K

1

dK

1/K1

K

2

dK

2/K2

K

3

dK

3/K3

I

SENSE0

V

SENSE

I

OUT/ISENSE

Current sense ratio drift

I

OUT/ISENSE

Current sense ratio drift

I

OUT/ISENSE

Current sense ratio drift

Analog sense leakage
current

Max analog sense
output voltage

= 1 A; V

OUT

Tj = -40 °C...150 °C

I

= 1 A; V

OUT

Tj= - 40 °C...150 °C

I

= 10 A; V

OUT

Tj = - 40 °C

= 25 °C...150 °C

T

j

I

= 10 A; V

OUT

= -40 °C...150 °C

T

j

I

= 30 A; V

OUT

= -40 °C

T

j

= 25 °C...150 °C

T

j

I

= 30 A; V

OUT

= -40 °C...150 °C

T

j

= 6...16 V; I

V

CC

V
T

V
R
V
R

= 0 V;

SENSE

= -40 °C...150 °C 0 10 µA

j

= 5.5 V; I

CC

= 10 kΩ

SENSE

> 8 V, I

CC

SENSE

OUT

= 10 kΩ

SENSE

SENSE

SENSE

SENSE

SENSE

SENSE

OUT

OUT

= 10 A;

= 0.5 V;

= 0.5 V;

= 4 V;

= 4 V;

= 4 V;

= 4 V;

= 0 A;

= 5 A;

3300 4400 6000

-10 +10 %

4200
4400

4900
4900

6000
5750

-8 +8 %

4200
4400

4900
4900

5500
5250

-6 +6 %

2

4

I

Sense voltage in

V

SENSEH

overtemperature

V

CC

= 13 V; R

= 3.9 kΩ 5.5 V

SENSE

condition

Analog sense output

R

VSENSEH

impedance in
overtemperature

= 13 V; Tj > T

V

CC

output open

TSD

;

400 Ω

condition

V

V

t

DSENSE

1. 9 V ≤ V

2. Current sense signal delay after positive input slope.

Current sense delay
response

≤ 16 V.

CC

To 90 % I

SENSE

10/27 Doc ID 10896 Rev 3

(2)

500 µs

VN920SP-E Electrical specifications

Table 11. Truth table

Conditions Input Output Sense

Normal operation

Overtemperature

Undervoltage

Overvoltage

Short circuit to GND

Short circuit to V

CC

L

H

L

H

L

H

L

H

L
H
H

L
H

L
H

Nominal

L
L

V

SENSEH

L
L

L
L

L
L
L

(T

j<TTSD

(T

j>TTSD

) 0
) V

H
H

< Nominal

Negative output voltage clamp L L 0

0

0

0
0

0
0

0

SENSEH

0

Doc ID 10896 Rev 3 11/27

Electrical specifications VN920SP-E

Table 12. Electrical transient requirements on V

ISO T/R

7637/1

test pulse

I II III IV Delays and impedance

1- 25V- 50V - 75 V

2+ 25V

3a - 25 V - 50 V

+ 50 V + 75V + 100V

3b + 25 V + 50 V + 75 V + 100 V 0.1 µs, 50 Ω

4- 4V- 5V - 6 V - 7 V 100 ms, 0.01 Ω

5 + 26.5 V + 46.5 V + 66.5 V + 86.5 V

Table 13. Electrical transient requirements on VCC pin (part 2)

- 100 V

Test levels

pin (part 1)

CC

- 100 V 2 ms, 10 Ω

0.2 ms, 10 Ω

- 150 V 0.1 µs, 50 Ω

400 ms, 2 Ω

ISO T/R

Test levels results

7637/1

test pulse

I II III IV

1 CCCC

2 CCCC

3a CCCC

3b CCCC

4 CCCC

5CEEE

Table 14. Electrical transient requirements on VCC pin (part 3)

Class Contents

C

All functions of the device are performed as designed after exposure to
disturbance.

One or more functions of the device is not performed as designed after

E

exposure to disturbance and cannot be returned to proper operation without
replacing the device.

12/27 Doc ID 10896 Rev 3

VN920SP-E Electrical specifications

Figure 4. Switching characteristics (resistive load RL=1.3Ω)

V

OUT

Figure 5. I

I

OUT/ISENSE

6500

6500

dV

/dt

OUT

(on)

I

SENSE

INPUT

t

d(on)

OUT/ISENSE

80%

t

r

90%

t

DSENSE

versus I

OUT

10%

t

d(off)

90%

t

f

dV

OUT

/dt

(off)

t

t

t

6000

6000

max.Tj=-40°C

5500

5500

max.Tj=25...150°C

5000

5000

typical value

min.Tj=-40°C

4500

4500

4000

4000

3500

3500

3000

3000

min.Tj=25...150°C

0 2 4 6 8 101214 161820222426283032

I

(A)

OUT

Doc ID 10896 Rev 3 13/27

Electrical specifications VN920SP-E

Figure 6. Waveforms

NORMAL OPERATION

INPUT

LOAD CURRENT

SENSE

UNDERVOLTAGE

V

CC

INPUT

LOAD CURRENT

SENSE

V

CC

INPUT
LOAD CURRENT
SENSE

V

USD

V

VCC > V

OV

USD

V

USDhyst

OVERVOLTAGE

V

OVhyst

INPUT

LOAD CURRENT
LOAD VOLTAGE
SENSE

INPUT

LOAD VOLTAGE
LOAD CURRENT
SENSE

T

j

INPUT

LOAD CURRENT

SENSE

SHORT TO GROUND

SHORT TO V

<Nominal

T

TSD

T

R

OVERTEMPERATURE

CC

<Nominal

I

SENSE

=

V

SENSEH

R

SENSE

14/27 Doc ID 10896 Rev 3

VN920SP-E Electrical specifications

2.4 Electrical characteristics curves

Figure 7. Off-state output current Figure 8. High level input current

Figure 9. Input clamp voltage Figure 10. On-state resistance vs V

Figure 11. On-state resistance vs T

IL(off1) (uA)

9

8

7

6

5

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vicl (V)

8

7.8

7.6

7.4

7.2

7

6.8

6.6

6.4

6.2

6

Iin=1mA

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

case

Ron (mOhm)

30

27.5

25

22.5

20

17.5

15

12.5

10

7.5

5

Iout=10A

Vcc=8V; 36V

-25 0 25 50 75 100 125 150 175

Tc (ºC)

Iih (uA)

5

4.5

3.5

2.5

1.5

0.5

Vin=3.25V

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Ron ( mOhm)

30

27.5

25

22.5

20

17.5

15

12.5

10

7.5

5

2.5

0

I

=10A

OUT

5 10152025303540

Tc= 150ºC

Tc= 25ºC

Tc= - 40ºC

Vcc (V)

Figure 12. Input high level

Vih (V)

3.6

3.4

3.2

3

2.8

2.6

2.4

2.2

2

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

CC

Doc ID 10896 Rev 3 15/27

Electrical specifications VN920SP-E

Figure 13. Input low level Figure 14. Input hysteresis voltage

Vil (V)

2.6

2.4

2.2

2

1.8

1.6

1.4

1.2

1

-50 - 25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 15. Turn-on voltage slope Figure 16. Turn-off voltage slope

dVout/dt (on) (V/ms)

700

650

600

550

500

450

400

350

300

250

Vcc=13V

Rl=1 .3Ohm

-50 - 25 0 25 50 75 100 125 1 50 175

Tc (ºC)

Vhyst (V)

1.5

1.4

1.3

1.2

1.1

1

0.9

0.8

0.7

0.6

0.5

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

dVout/dt(off) (V/ms)

550

500

450

400

350

300

250

200

150

100

50

Vcc=13V

Rl=1.3Ohm

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 17. Overvoltage shutdown Figure 18. I

Vov (V)

50

48

46

44

42

40

38

36

34

32

30

-50 -25 0 25 50 75 100 125 150 175

Ilim (A)

100

Tc (°C)

16/27 Doc ID 10896 Rev 3

vs T

LIM

90

80

70

60

50

40

30

20

10

0

-50 -25 0 25 50 75 100 125 150 175

case

Vcc=13V

Tc (°C)

VN920SP-E Application information

3 Application information

Figure 19. Application schematic

+5V

GND

V

CC

OUTPUT

D

GND

R

prot

INPUT

R

μ

C

prot

R

SENSE

CURRENT SENSE

V

GND

R

GND

3.1 GND protection network against reverse battery

3.1.1 Solution 1: resistor in the ground line (R

This can be used with any type of load.

GND

only)

D

ld

The following is an indication on how to dimension the R

1. R

2. R

where - I

≤ 600 mV / (I

GND

≥ (-VCC) / (-I

GND

is the DC reverse ground pin current and can be found in the absolute

GND

S(on)max

GND

)

)

GND

resistor.

maximum rating section of the device’s datasheet.

Power dissipation in R

P

= (-VCC)2/ R

D

GND

GND

(when V

< 0: during reverse battery situations) is:

CC

This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I

S(on)max

becomes the sum of the

maximum on-state currents of the different devices.

Please note that if the microprocessor ground is not shared by the device ground then the
R

produces a shift (I

GND

S(on)max

* R

) in the input thresholds and the status output

GND

values. This shift varies depending on how many devices are ON in the case of several
high-side drivers sharing the same R

GND

.

If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize solution 2 (see Section 3.1.2).

Doc ID 10896 Rev 3 17/27

Application information VN920SP-E

3.1.2 Solution 2: diode (D

A resistor (R

= 1 kΩ) should be inserted in parallel to D

GND

) in the ground line

GND

inductive load.

This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (∼600mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift does not vary if more than one HSD shares the same diode/resistor
network.

Series resistor in INPUT and STATUS lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.

Safest configuration for unused INPUT and STATUS pin is to leave them unconnected, while
unused SENSE pin has to be connected to ground pin.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V

max DC rating. The same applies if the device is subject to transients on the VCC line

CC

that are greater than the ones shown in Ta b le 1 2 .

3.3 MCU I/Os protection

if the device drives an

GND

If a ground protection network is used and negative transient are present on the VCC line,
the control pins is pulled negative. ST suggests to insert a resistor (R

) in line to prevent

prot

the microcontroller I/Os pins to latch-up.

The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.

-V

CCpeak/Ilatchup

≤ R

prot

≤ (V

OHµC-VIH-VGND

) / I

IHmax

Calculation example:

For V

CCpeak

5kΩ ≤ R

= -100 V and I

≤ 65 kΩ.

prot

latchup

≥ 20 mA; V

OHµC

≥ 4.5 V

Recommended values:

R

=10kΩ.

prot

18/27 Doc ID 10896 Rev 3

VN920SP-E Application information

3.4 PowerSO-10 maximum demagnetization energy
(V

Figure 20. PowerSO-10 maximum turn-off current versus inductance

=13.5V)

CC

I

LM A X ( A)

100

A

10

B

C

1

0,01 0,1 1 10 100

A: T

B: T

C: T

VIN, I

= 150 °C single pulse

jstart

= 100 °C repetitive pulse

jstart

= 125 °C repetitive pulse

jstart

L

Note: Values are generated with R

demagnetization) of every pulse must not exceed the temperature specified above for
curves B and C.

L( mH)

Demagnetization Demagnetization Demagnetization

=0Ω.In case of repetitive pulses, T

L

(at beginning of each

jstart

t

Doc ID 10896 Rev 3 19/27

Package and PCB thermal data VN920SP-E

4 Package and PCB thermal data

4.1 PowerSO-10 thermal data

Figure 21. PowerSO-10 PC board

Note: Layout condition of R

thickness = 2 mm, Cu thickness = 35 µm, Copper areas: from minimum pad layout to

2

8cm

).

Figure 22. R

thj-amb

and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB

th

vs PCB copper area in open box free air condition

20/27 Doc ID 10896 Rev 3

VN920SP-E Package and PCB thermal data

Figure 23. PowerSO-10 thermal impedance junction ambient single pulse

Equation 1

Z

THδ

where

: pulse calculation formula

RTHδ Z

THtp

1 δ–()+⋅=

δ tpT⁄=

Figure 24. Thermal fitting model of a single channel HSD in PowerSO-10

Tj

C1

R1 R2

Pd

C2

C3

R3

C4

R4

T_amb

C5

R5

C6

R6

Doc ID 10896 Rev 3 21/27

Package and PCB thermal data VN920SP-E

Table 15. Thermal parameters

Area / island (cm2) Footprint 6

R1 (°C/W) 0.02

R2 (°C/W) 0.1

R3 (°C/W) 0.2

R4 (°C/W) 0.8

R5 (°C/W) 12

R6 (°C/W) 37 22

C1 (W.s/°C) 0.0015

C2 (W.s/°C) 7.00E-03

C3 (W.s/°C) 0.015

C4 (W.s/°C) 0.3

C5 (W.s/°C) 0.75

C6 (W.s/°C) 3 5

22/27 Doc ID 10896 Rev 3

VN920SP-E Package and packing information

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

5.2 PowerSO-10 mechanical data

Figure 25. PowerSO-10 package dimensions

Doc ID 10896 Rev 3 23/27

Package and packing information VN920SP-E

Table 16. PowerSO-10 mechanical data

Millimeters

Dim.

Min. Typ. Max.

A 3.35 3.65

(1)

A

A1 0.00 0.10

B 0.40 0.60

(1)

B

C 0.35 0.55

(1)

C

D 9.40 9.60

D1 7.40 7.60

E 9.30 9.50

3.4 3.6

0.37 0.53

0.23 0.32

E2 7.20 7.60

(1)

E2

E4 5.90 6.10

(1)

E4

e1.27

F 1.25 1.35

(1)

F

H 13.80 14.40

(1)

H

h0.50

L 1.20 1.80

(1)

L

a0° 8°

(1)

α

1. Muar only POA P013P.

7.30 7.50

5.90 6.30

1.20 1.40

13.85 14.35

0.80 1.10

2° 8°

24/27 Doc ID 10896 Rev 3

VN920SP-E Package and packing information

5.3 PowerSO-10 packing information

Figure 26. PowerSO-10 suggested pad layout and tube shipment (no suffix)

Figure 27. PowerSO-10 tape and reel shipment (suffix “TR”)

Reel dimensions

Tape dimensions

According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986

Tape width W 24
Tape hole spacing P0 (± 0.1) 4
Component spacing P 24
Hole diameter D (± 0.1/-0) 1.5
Hole diameter D1 (min) 1.5
Hole position F (± 0.05) 11.5
Compartment depth K (max) 6.5
Hole spacing P1 (± 0.1) 2

All dimensions are in mm.

Top

cover

tape

End

500mm min

Base Q.ty 600
Bulk Q.ty 600
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4

Empty components pock ets
saled with cover tape.

User direction of feed

Start

No componentsNo components Components

500mm min

Doc ID 10896 Rev 3 25/27

Revision history VN920SP-E

6 Revision history

Table 17. Document revision history

Date Revision Changes

01-Oct-2004 1 Initial release.

17-May-2010 2 Updated Features list.

07-Feb-2011 3 Updated Table 6: Switching (V

CC

=13V)

26/27 Doc ID 10896 Rev 3

VN920SP-E

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Doc ID 10896 Rev 3 27/27