Page 1
Features
Typ e R
DS(on)
VN920DB5-E 18 mΩ 30 A 36 V
I
OUT
VN920DB5-E
High-side driver
V
CC
■ ECOPACK
■ Automotive Grade: compliance with AEC
®
: lead free and RoHS compliant
guidelines
■ Very low standby current
■ CMOS compatible input
■ On-state open load detection
■ Off-state open load detection
■ Thermal shutdown protection and diagnosis
■ Undervoltage shutdown
■ Overvoltage clamp
■ Output stuck to V
■ Load current limitation
■ Reverse battery protection
■ Electrostatic discharge protection
detection
CC
Table 1. Device summary
P2PAK
Description
The VN920DB5-E is a monolithic device designed
using STMicroelectronics™ VIPower™ M0-3
technology. The VN920DB5-E is intended for
driving any type of load with one side connected
to ground. The active V
protects the device against low energy spikes
(see ISO7637 transient compatibility table).
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload. The device detects the
open-load condition in both the on-state and
off-state. In the off-state the device detects if the
output is shorted to V
turns-off in the case where the ground pin
becomes disconnected.
pin voltage clamp
CC
. The device automatically
CC
Order codes
Package
Tub e Tap e and r eel
2
P
PAK VN920DB5-E VN920DB5TR-E
November 2010 Doc ID 17493 Rev 2 1/26
www.st.com
1
Page 2
Contents VN920DB5-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 16
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 17
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 P2PAK maximum demagnetization energy (V
4P
2
PAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
= 13.5 V) . . . . . . . . . . . 18
CC
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2 P
5.3 P
2
PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2
PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/26 Doc ID 17493 Rev 2
Page 3
VN920DB5-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Switching (V
Table 7. Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. V
output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 13. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 14. P
Table 15. P
2
PAK thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2
PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
=13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
Doc ID 17493 Rev 2 3/26
Page 4
List of figures VN920DB5-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 13. On-state resistance vs T
Figure 14. On-state resistance vs V
Figure 15. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 17. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 18. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 19. I
lim
vs T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
case
Figure 20. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 21. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 23. P
Figure 24. P
Figure 25. P
Figure 26. P
Figure 27. Thermal fitting model of a single channel HSD in P
Figure 28. P
Figure 29. P
Figure 30. P
2
PAK maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2
PAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2
PAK Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . 19
2
PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 20
2
PAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2
PAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2
PAK tape and reel (suffix “13TR”). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
CC
2
PAK. . . . . . . . . . . . . . . . . . . . . . . . . . 20
4/26 Doc ID 17493 Rev 2
Page 5
VN920DB5-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
V
CC
V
CC
CLAMP
GND
INPUT
LOGIC
STATUS
OVERTEMPERATURE
DETECTION
OVERVOLTAGE
DETECTION
UNDERVOLTAGE
DRIVER
AND OUTPUT SHORTED TO V
Figure 2. Configuration diagram (top view)
5
4
3
2
1
DETECTION
Power CLAMP
CURRENT LIMITER
ON-STATE OPEN-LOAD
DETECTION
OFF-STATE OPEN-LOAD
DETECTION
OUTPUT
STATUS
V
CC
INPUT
GND
OUTPUT
CC
P2PAK
Table 2. Suggested connections for unused and not connected pins
Connection / pin Status N.C. Output Input
Floating X X X X
To ground X Through 10 KΩ resistor
Doc ID 17493 Rev 2 5/26
Page 6
Electrical specifications VN920DB5-E
2 Electrical specifications
Figure 3. Current and voltage conventions
I
S
V
I
IN
INPUT
I
STAT
STATUS
V
IN
V
STAT
2.1 Absolute maximum ratings
V
CC
GND
OUTPUT
I
GND
F
I
OUT
V
CC
V
OUT
Stressing the device above the rating listed in the Ta bl e 3 may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to Absolute maximum rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics sure program and other relevant quality
document.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
DC supply voltage 41 V
Reverse DC supply voltage - 0.3 V
CC
DC reverse ground pin current - 200 mA
DC output current Internally limited A
Reverse DC output current - 25 A
DC input current +/- 10 mA
DC Status current +/- 10 mA
Electrostatic discharge
(Human Body Model: R = 1.5 KΩ; C = 100 pF)
– INPUT
–STATUS
–OUTPUT
–V
CC
4000
4000
5000
5000
Maximum switching energy
(L = 0.25 mH; RL= 0 Ω; V
= 150 °C; IL = 45 A)
T
jstart
= 13.5 V;
bat
364 mJ
V
V
V
V
- V
- I
- I
I
V
E
V
CC
gnd
I
OUT
OUT
I
IN
STAT
ESD
MAX
6/26 Doc ID 17493 Rev 2
Page 7
VN920DB5-E Electrical specifications
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
P
T
T
T
stg
Power dissipation TC = 25 °C 96.1 W
tot
Junction operating temperature Internally limited °C
j
Case operating temperature - 40 to 150 °C
c
Storage temperature - 55 to 150 °C
2.2 Thermal data
Table 4. Thermal data
Symbol Parameter Maximum value Unit
R
thj-case
R
thj-amb
1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick).
Thermal resistance junction-case 1.3 °C/W
Thermal resistance junction-ambient 51.3
(1)
°C/W
Doc ID 17493 Rev 2 7/26
Page 8
Electrical specifications VN920DB5-E
2.3 Electrical characteristics
Values specified in this section are for 8 V < V
< 36 V; -40 °C < Tj < 150 °C, unless
CC
otherwise stated.
Tabl e 5. Pow er
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
V
R
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
Operating supply voltage 5.5 13 36 V
CC
Undervoltage shutdown 3 4 5.5 V
USD
Undervoltage shutdown
hysteresis
Overvoltage shutdown 36 V
OV
I
= 10 A; Tj = 25 °C;
OUT
On-state resistance
ON
Supply current
I
S
Off-state output current V
Off-state output current V
Off-state output current
Off-state output current
= 10 A;
I
OUT
= 3 A; V
I
OUT
Off-state; V
= V
V
IN
OUT
Off-state; V
= V
V
IN
OUT
On-state; V
= 0A
I
OUT
= V
IN
OUT
= 0 V; V
IN
V
= V
IN
OUT
= 125 °C
T
j
V
= V
IN
OUT
= 25 °C
T
j
= 6 V
CC
= 13 V;
CC
= 0 V
= 13 V;
CC
= 0 V; Tj = 25 °C
= 13V; V
CC
IN
= 5V;
= 0 V 0 50 µA
= 3.5 V -75 0 µA
OUT
= 0 V; V
= 0 V; V
CC
CC
= 13 V;
= 13 V;
0.5 V
18
36
50
101025
20
3.5
5µA
3µA
mΩ
mΩ
mΩ
µA
µA
mA
Table 6. Switching (VCC=13 V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
dV
dV
t
d(on)
t
d(off)
OUT
OUT
Turn-on delay time RL = 1.3 Ω 50 µs
Turn-off delay time RL = 1.3 Ω 50 µs
/dt
Turn-on voltage slope RL = 1.3 Ω See Figure 20 V/µs
(on)
/dt
Turn-off voltage slope RL = 1.3 Ω See Figure 21 V/µs
(off)
8/26 Doc ID 17493 Rev 2
Page 9
VN920DB5-E Electrical specifications
Table 7. Input pin
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
V
I
V
V
Tabl e 8. VCC output diode
Input low level 1.25 V
IL
Low level input current V
IL
Input high level 3.25 V
IH
High level input current V
IH
Input hysteresis voltage 0.5 V
hyst
Input clamp voltage
ICL
= 1.25 V 1 µA
IN
= 3.25 V 10 µA
IN
I
= 1 mA
IN
= -1 mA
I
IN
66.8
- 0.7
8V
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
Table 9. Status pin
Forward on voltage - I
F
= 5.5 A; Tj = 150 °C - - 0.7 V
OUT
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
STAT
I
LSTAT
C
STAT
V
SCL
Status low output voltage I
Status leakage current Normal operation; V
Status pin input capacitance Normal operation; V
Status clamp voltage
= 1.6 mA 0.5 V
STAT
= 5 V 10 µA
STAT
= 5 V 100 pF
STAT
I
STAT
I
STAT
= 1 mA
= - 1 mA
66.8
- 0.7
8V
V
V
Table 10. Protections
(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
T
TSD
T
T
hyst
t
SDL
I
lim
V
demag
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device operates under
abnormal conditions this software must limit the duration and number of activation cycles.
Shutdown temperature 150 175 200 °C
Reset temperature 135 °C
R
Thermal hysteresis 7 15 °C
Status delay in overload
condition
Current limitation
Turn-off output clamp
voltage
T
> T
j
jsh
VCC = 13 V
5.5 V < V
I
OUT
V
IN
CC
= 2 A;
= 0 V;
L = 6 mH
< 36 V
30 45 75
V
CC
- 41 V
CC
- 48 V
20 ms
75
- 55 V
CC
Doc ID 17493 Rev 2 9/26
A
A
Page 10
Electrical specifications VN920DB5-E
Table 11. Open-load detection
Symbol Parameter
I
OL
t
DOL(on)
V
t
DOL(off)
Open-load on-state detection
threshold
Open-load on-state detection delay I
Open-load off-state voltage detection
OL
threshold
Open-load detection delay at turn-off 1000 µs
Figure 4. Status timings
OPEN-LOAD STATUS TIMING (with external pull-up)
V
> V
OUT
OL
V
IN
V
STAT
t
DOL(off)
I
OUT
t
DOL(on)
< I
OL
Test
conditions
V
= 5 V 300 500 700 mA
IN
= 0 A 250 µs
OUT
V
= 0 V 1.5 2.5 3.5 V
IN
Min. Typ. Max. Unit
OVERTEMP STATUS TIMING
Tj > T
V
V
IN
STAT
t
SDL
jsh
t
SDL
Figure 5. Switching time waveforms
V
OUT
80%
dV
/dt
OUT
(on)
V
IN
Figure 1: Test Conditions for High Side switching times measurement.
t
d(on)
10%
t
d(off)
90%
/dt
dV
OUT
(off)
t
t
10/26 Doc ID 17493 Rev 2
Page 11
VN920DB5-E Electrical specifications
Table 12. Truth table
Conditions Input Output Status
Normal operation
L
H
L
Current limitation
H
H
Overtemperature
Undervoltage
Overvoltage
Output voltage > V
Output current < I
Table 13. Electrical transient requirements
OL
OL
L
H
L
H
L
H
L
H
L
H
ISO T/R
Test level
L
H
L
X
X
(T
(T
< T
j
> T
j
L
L
L
L
L
L
H
H
L
H
TSD
TSD
H
H
H
) H
) L
H
L
X
X
H
H
L
H
H
L
7637/1
test pulse
1- 25V
2+ 25V
3a - 25 V
3b + 25 V
4- 4V
5 + 26.5 V
1. All functions of the device are performed as designed after exposure to disturbance.
2. One or more functions of the device is not performed as designed after exposure and cannot be returned to
proper operation without replacing the device.
I II III IV Delays and impedance
(1)
(1)
(1)
(1)
(1)
(1)
- 50 V
+ 50 V
- 50 V
+ 50 V
- 5 V
+ 46.5 V
(1)
(1)
(1)
(1)
(1)
(2)
- 75 V
+ 75 V
- 100 V
+ 75 V
- 6 V
+ 66.5 V
(1)
(1)
(1)
(1)
(1)
(2)
- 100 V
+ 100 V
- 150 V
+ 100 V
- 7 V
+ 86.5 V
(1)
(1)
(1)
(1)
(1)
(2)
2ms,10Ω
0.2 ms, 10 Ω
0.1 µs, 50 Ω
0.1 µs, 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
Doc ID 17493 Rev 2 11/26
Page 12
Electrical specifications VN920DB5-E
Figure 6. Waveforms
NORMAL OPERATION
INPUT
LOAD VOLTAGE
STATUS
UNDERVOLTAGE
V
CC
INPUT
LOAD VOLTAGE
V
USD
V
USDhyst
STATUS
V
CC
INPUT
LOAD VOLTAGE
STATUS
INPUT
LOAD VOLTAGE
STATUS
INPUT
LOAD VOLTAGE
STATUS
undefined
OVERVOLTAGE
V
CC<VOV
V
> V
CC
OV
OPEN-LOAD with external pull-up
V
> V
OUT
V
OL
OL
OPEN-LOAD without external pull-up
T
T
j
TSD
T
R
OVERTEMPERATURE
INPUT
LOAD CURRENT
STATUS
12/26 Doc ID 17493 Rev 2
Page 13
VN920DB5-E Electrical specifications
2.4 Electrical characteristics curves
Figure 7. Off-state output current Figure 8. High level input current
IL(off1) (µA)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75 100 125 150 175
Off state
Vcc=36V
Vin=Vout=0V
Tc (ºC)
Figure 9. Input clamp voltage Figure 10. Status leakage current
Iih (uA)
5
4.5
3.5
2.5
1.5
0.5
Vin=3.25V
4
3
2
1
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Vicl (V)
8
7.8
7.6
7.4
7.2
7
6.8
6.6
6.4
6.2
6
Iin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Ilstat(μA)
0.05
0.045
0.04
0.035
0.03
0.025
0.02
0.015
0.01
0.005
Vstat=5V
0
-50 -25 0 25 50 75 100 125 150 175
Tc ( ºC )
Figure 11. Status low output voltage Figure 12. Status clamp voltage
Vstat (V)
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
Istat=1.6mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Vscl (V)
8
7.8
7.6
7.4
7.2
6.8
6.6
6.4
6.2
Istat=1mA
7
6
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Doc ID 17493 Rev 2 13/26
Page 14
Electrical specifications VN920DB5-E
Figure 13. On-state resistance vs T
Ron (mOhm)
50
45
40
35
30
25
20
15
10
5
0
-50 -25 0 25 50 75 100 125 150 175
Iout=10A
Vcc=8V; 36V
Tc ( ºC )
case
Figure 14. On-state resistance vs V
Ron (mOhm)
50
45
40
35
30
25
20
15
10
5
0
5 10152025303540
Iout=10A
Vcc (V)
Figure 15. Overvoltage shutdown Figure 16. Input high level
Vov (V)
50
48
46
44
42
40
38
36
34
32
30
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Vih (V)
3.6
3.4
3.2
3
2.8
2.6
2.4
2.2
2
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
CC
Tc=150ºC
Tc= 25 ºC
Tc= -40 ºC
Figure 17. Input low level Figure 18. Input hysteresis voltage
Vil (V)
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
14/26 Doc ID 17493 Rev 2
Vhyst (V)
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Page 15
VN920DB5-E Electrical specifications
Figure 19. I
Ilim (A)
100
90
80
70
60
50
40
30
20
10
0
-50 -25 0 25 50 75 100 125 150 175
lim
Vcc=13V
vs T
case
Tc (°C)
Figure 21. Turn-off voltage slope
dVout/dt(off) (V/ms)
550
500
450
400
350
300
250
200
150
100
50
Vcc=13V
Rl=1.3Ohm
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Figure 20. Turn-on voltage slope
dVout/dt(on) (V/ms)
700
650
600
550
500
450
400
350
300
250
-50 -25 0 25 50 75 100 125 150 175
Vcc=13V
Rl=1.3Ohm
Tc (ºC)
Doc ID 17493 Rev 2 15/26
Page 16
Application information VN920DB5-E
3 Application information
Figure 22. Application schematic
+5V
μ
C
+5V
GND
R
GND
V
CC
OUTPUT
D
GND
R
prot
STATUS
R
prot
INPUT
V
GND
3.1 GND protection network against reverse battery
3.1.1 Solution 1: resistor in the ground line (R
GND
only)
D
ld
This can be used with any type of load.
The following is an indication on how to dimension the R
1. R
2. R
where - I
≤ 600 mV / (I
GND
≥ (- VCC) / (- I
GND
is the DC reverse ground pin current and can be found in the absolute
GND
S(on)max
GND
).
)
maximum rating section of the device’s datasheet.
Power Dissipation in R
P
= (- VCC)2/ R
D
GND
GND
(when V
< 0: during reverse battery situations) is:
CC
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
R
produces a shift (I
GND
S(on)max
* R
) in the input thresholds and the status output
GND
values. This shift varies depending on how many devices are ON in the case of several high
side drivers sharing the same R
GND
.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize solution 2 (see Section 3.1.2).
16/26 Doc ID 17493 Rev 2
resistor.
GND
S(on)max
becomes the sum of the
Page 17
VN920DB5-E Application information
3.1.2 Solution 2: diode (D
A resistor (R
= 1 kΩ) should be inserted in parallel to D
GND
) in the ground line
GND
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (~600 mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift does not vary if more than one HSD shares the same diode/resistor
network.
Series resistor in INPUT and STATUS lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.
Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
3.2 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
max DC rating. The same applies if the device is subject to transients on the VCC line
CC
that are greater than the ones shown in Ta b le 13.
3.3 MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (R
the microcontroller I/Os pins to latch-up.
if the device drives an
GND
) in line to prevent
prot
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.
-V
CCpeak/Ilatchup
≤ R
prot
≤ (V
OHµC-VIH-VGND
) / I
IHmax
Calculation example:
For V
CCpeak
5kΩ ≤ R
= -100 V and I
≤ 65 kΩ.
prot
latchup
≥ 20 mA; V
OHµC
≥ 4.5 V
Recommended values:
R
=10kΩ .
prot
Doc ID 17493 Rev 2 17/26
Page 18
Application information VN920DB5-E
3.4 P2PAK maximum demagnetization energy (VCC = 13.5 V)
Figure 23.
LMAX (A)
I
P2PAK
maximum turn-off current versus inductance
100
A
B
C
10
1
0.01 0.1 1 10 100
L(mH)
A: T
B: T
C: T
VIN, I
= 150 °C single pulse
jstart
= 100 °C repetitive pulse
jstart
= 125 °C repetitive pulse
jstart
L
Note: Values are generated with R
demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.
Demagnetization Demagnetization Demagnetization
=0Ω.In case of repetitive pulses, T
L
(at beginning of each
jstart
t
18/26 Doc ID 17493 Rev 2
Page 19
VN920DB5-E P2PAK thermal data
4 P2PAK thermal data
Figure 24. P2PAK PC board
Note: Layout condition of R
thickness = 2 mm, Cu thickness = 35 μm , Copper areas: 0.97 cm
Figure 25. P
2
PAK R
RTHj_amb (°C/W)
55
50
45
40
35
30
0246810
and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB
th
thj-amb
vs PCB copper area in open box free air condition
2
, 8 cm2).
Tj-Tamb=50°C
PCB Cu heatsink area (cm^2)
Doc ID 17493 Rev 2 19/26
Page 20
P2PAK thermal data VN920DB5-E
Figure 26. P2PAK thermal impedance junction ambient single pulse
ZT H (°C /W)
1000
100
10
1
0.1
0.01
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
Equation 1: pulse calculation formula
Z
THδ
where δ = t
R
TH
P
δ Z
/T
THtp
1 δ–()+⋅=
0.97 cm
6 cm
2
2
Figure 27. Thermal fitting model of a single channel HSD in P
20/26 Doc ID 17493 Rev 2
2
PAK
Page 21
VN920DB5-E P2PAK thermal data
Tabl e 14 . P2PAK thermal parameters
Area/island (cm2)0.976
R1 (°C/W) 0.02
R2 (°C/W) 0.1
R3 (°C/W) 0.22
R4 (°C/W) 4
R5 (°C/W) 9
R6 (°C/W) 37 22
C1 (W·s/°C) 0.0015
C2 (W·s/°C) 0.007
C3 (W·s/°C) 0.015
C4 (W·s/°C) 0.4
C5 (W·s/°C) 2
C6 (W·s/°C) 3 5
Doc ID 17493 Rev 2 21/26
Page 22
Package and packing information VN920DB5-E
5 Package and packing information
5.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
5.2 P2PAK mechanical data
Figure 28. P2PAK package dimensions
22/26 Doc ID 17493 Rev 2
P010R
Page 23
VN920DB5-E Package and packing information
Tabl e 15 . P2PAK mechanical data
mm
Dim.
Min. Typ. Max.
A 4.30 4.80
A1 2.40 2.80
A2 0.03 0.23
b 0.80 1.05
c 0.45 0.60
c2 1.17 1.37
D 8.95 9.35
D2 8.00
E 10.00 10.40
E1 8.50
e 3.20 3.60
e1 6.60 7.00
L 13.70 14.50
L2 1.25 1.40
L3 0.90 1.70
L5 1.55 2.40
R
0.40
V2 0º 8º
Package weight 1.40 Gr (typ)
Doc ID 17493 Rev 2 23/26
Page 24
Package and packing information VN920DB5-E
5.3 P2PAK packing information
Figure 29. P2PAK tube shipment (no suffix)
Base Q.ty 50
Bulk Q.ty 1000
Figure 30. P
B
C
A
2
PAK tape and reel (suffix “13TR”)
Tube length (± 0.5) 532
A 18
B 33.1
C (± 0.1) 1
All dimensions are in mm.
REEL DIMENSIONS
All dimensions are in mm.
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 12
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 11.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2
All dimensions are in mm.
Top
cover
tape
End
24/26 Doc ID 17493 Rev 2
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Start
No componentsNo components Components
500mm min
Page 25
VN920DB5-E Revision history
6 Revision history
Table 16. Document revision history
Date Revision Changes
17-May-2010 1 Initial release.
Updated Features list.
15-Nov-2010 2
Updated following tables:
– Table 3: Absolute maximum ratings
– Table 4: Thermal data
Doc ID 17493 Rev 2 25/26
Page 26
VN920DB5-E
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26/26 Doc ID 17493 Rev 2
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