Datasheet VN750SM Datasheet (ST)

Features

Type R

VN750SM 55 mΩ 6 A 36 V

DS(on)

I

OUT

VN750SM

High-side driver

V

CC

■ CMOS compatible input

■ On-state open load detection

■ Off-state open load detection

■ Shorted load protection

■ Under-voltage and over-voltage shutdown

■ Protection against loss of ground

■ Very low stand-by current

■ Reverse battery protected (see Application

schematic

)

SO-8

Description

The VN750SM is a monolithic device designed in
STMicroelectronics VIPower M0-3 technology.
The VN750SM is intended for driving any type of
load with one side connected to ground. The
active V
against low energy spikes (see ISO7637 transient
compatibility table).

Active current limitation combined with thermal
shutdown and automatic restart protects the
device against over-load. The device detects the
open load condition in both the on and off-state.

The open load threshold is aimed at detecting the
5 W / 12 V standard bulb as an open load fault in
the on-state.

In the off-state the device detects if the output is
shorted to V
in the case where the ground pin becomes
disconnected.

pin voltage clamp protects the device

CC

. The device automatically turns off

CC

Table 1. Device summary

Order codes

Package

Tube Tape and reel

SO-8 VN750SM VN750SM13TR

December 2008 Rev 3 1/27

www.st.com

27

Contents VN750SM

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 16

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 17

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.4 Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 19

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.2 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

2/27

VN750SM List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 6. Switching (V

Table 7. Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 8. V

Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 11. Open load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 13. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 14. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 15. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

CC

=13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

CC

3/27

List of figures VN750SM

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 13. On-state resistance Vs T
Figure 14. On-state resistance Vs V

Figure 15. Open load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 16. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 17. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 18. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 19. Over-voltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 20. Open load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 23. I

lim

Vs T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

case

Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 25. Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 26. Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 27. PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 28. Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 20

Figure 29. SO-8 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 30. Thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 31. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 32. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 33. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

CC

4/27

VN750SM Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V

CC

V

CC

CLAMP

GND

INPUT

LOGIC

STATUS

OVER-TEMPERATURE

DETECTION

OVER-VOLTAGE

AND OUTPUT SHORTED TO V

Figure 2. Configuration diagram (top view)

V

CC

5

OUTPUT

DETECTION

UNDER-VOLTAGE

DETECTION

Powe r CLAMP

DRIVER

CURRENT LIMITER

ON-STATE OPEN LOAD

DETECTION

OFF-STATE OPEN LOAD

DETECTION

4

N.C.
STATUS

OUTPUT

CC

OUTPUT
V

CC

Table 2. Suggested connections for unused and not connected pins

8

INPUT

1

GND

Connection / pin Status N.C. Output Input

Floating X X X X

To ground X Through 10KΩ resistor

5/27

Electrical specifications VN750SM

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

I

IN

INPUT

I

STAT

STATUS

V

IN

V

STAT

2.1 Absolute maximum ratings

V

CC

GND

OUTPUT

I

GND

F

I

OUT

V

OUT

V

CC

Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to Absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics sure
program and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

- V

- I

I

OUT

- I

I

STAT

V

E

DC supply voltage 41 V

CC

Reverse DC supply voltage - 0.3 V

CC

DC reverse ground pin current - 200 mA

gnd

DC output current Internally limited A

Reverse DC output current - 6 A

OUT

I

DC input current +/- 10 mA

IN

DC status current +/- 10 mA

Electrostatic discharge
(human body model: R =1.5KΩ; C =100pF)
INPUT

ESD

STATUS
OUTPUT
V

CC

Maximum switching energy (L = 1.3mH; RL= 0Ω;

MAX

V

bat

= 13.5V; T

= 150ºC; IL = 10A)

jstart

4000
4000
5000
5000

90 mJ

V
V
V
V

6/27

VN750SM Electrical specifications

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

P

T

Power dissipation TC=25°C 4.2 W

tot

T

Junction operating temperature Internally limited °C

j

Storage temperature - 55 to 150 °C

stg

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Max. value Unit

R

thj-lead

R

thj-amb

1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35µm thick) connected
to all VCC pins. Horizontal mounting and no artificial air flow.

2. When mounted on a standard single-sided FR-4 board with 2 cm2 of Cu (at least 35µm thick). Horizontal
mounting and no artificial air flow.

Thermal resistance junction-lead 30 °C/W

Thermal resistance junction-ambient 93

2.3 Electrical characteristics

Values specified in this section are for 8V < V
stated.

Table 5. Power

(1)

< 36V; -40°C < Tj < 150°C, unless otherwise

CC

82

(2)

°C/W

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

USDhyst

V

R

I

L(off1)

I

L(off2)

Operating supply voltage 5.5 13 36 V

CC

Under-voltage shutdown 3 4 5.5 V

USD

Under-voltage shutdown
hysteresis

Over-voltage shutdown 36 V

OV

On-state resistance

ON

Supply current

I

S

Off-state output current V

Off-state output current V

= 2A; Tj = 25°C; V

I

OUT

I

= 2A; V

OUT

Off-state; V
V

= V

IN

OUT

Off-state; V
V

= V

IN

OUT

On-state; V
I

= 0A

OUT

= V

IN

OUT

= 0V; V

IN

> 8V

CC

= 13V;

CC

= 0V

= 13V;

CC

= 0V; Tj = 25°C

= 13V; V

CC

= 0V 0 50 µA

= 3.5V -75 0 µA

OUT

CC

IN

> 8V

= 5V;

0.5 V

55

110mΩmΩ

µA

25

10

µA

20

10

mA

3.5

2

7/27

Electrical specifications VN750SM

Table 5. Power (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

= V

I

L(off3)

I

L(off4)

Table 6. Switching (VCC=13V)

Off-state output current

Off-state output current

IN

= 125°C

T

j

V

= V

IN

= 25°C

T

j

Symbol Parameter Test conditions Min. Typ. Max. Unit

= 6.5Ω from VIN rising edge to

R

t

d(on)

t

d(off)

dV

OUT

dV

OUT

Table 7. Input pin

Turn-on delay time

Turn-off delay time

/dt

Turn-on voltage slope

(on)

/dt

Turn-off voltage slope

(off)

L

V

OUT

= 6.5Ω from VIN falling edge to

R

L

V

OUT

= 6.5Ω from V

R

L

V

OUT

R

= 6.5Ω from V

L

V

OUT

OUT

OUT

= 1.3V

= 11.7V

=10.4V

=1.3V

= 0V; V

= 0V; V

= 13V;

CC

= 13V;

CC

= 1.3V to

OUT

= 11.7V to

OUT

5µA

3µA

40 µs

30 µs

See Figure 21. V/µs

See Figure 22. V/µs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

V

Table 8. VCC output diode

Input low level 1.25 V

IL

Low level input current V

I

IL

Input high level 3.25 V

IH

High level input current V

I

IH

Input hysteresis voltage 0.5 V

hyst

Input clamp voltage

ICL

= 1.25V 1 µA

IN

= 3.25V 10 µA

IN

I

IN

I

IN

= 1mA

= -1mA

66.8

- 0.7

8V

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

F

Table 9. Status pin

Forward on voltage - I

= 1.4A; Tj = 150°C 0.6 V

OUT

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

STAT

I

LSTAT

C

STAT

V

SCL

Status low output voltage I

Status leakage current Normal operation; V

Status pin input capacitance Normal operation; V

Status clamp voltage

= 1.6mA 0.5 V

STAT

= 5V 10 µA

STAT

= 5V 100 pF

STAT

I

STAT

I

STAT

= 1mA

= - 1mA

66.8

- 0.7

8V

V

V

8/27

VN750SM Electrical specifications

Table 10. Protections

(1)

Symbol Parameter Test conditions Min. Typ. Max. Unit

T

TSD

T

T

hyst

t

SDL

I

V

demag

1. To ensure long term reliability under heavy over-load or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device operates under
abnormal conditions this software must limit the duration and number of activation cycles.

Table 11. Open load detection

Shutdown temperature 150 175 200 °C

Reset temperature 135 °C

R

Thermal hysteresis 7 15 °C

Status delay in over-load
condition

Current limitation

lim

Turn-off output clamp
voltage

I

OUT

T

9V < V
5V < V

= 2 A; V

L = 6mH

j

> T

CC

CC

jsh

< 36V
< 36V

= 0V;

IN

6101212A

V

CC

- 41 V

CC

- 48 V

20 µs

- 55 V

CC

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

OL

Open load on-state
detection threshold

V

= 5V 0.6 0.9 1.2 A

IN

A

t

DOL(on)

Open load on-state
detection delay

Open load off-state

V

voltage detection

OL

threshold

Open load detection
delay at turn-off

t

DOL(off)

Figure 4. Status timings

OPEN LOAD STATUS TIMING (with external pull-up)

V

> V

OUT

OL

V

IN

V

STAT

t

DOL(off)

t

I

OUT

DOL(on)

< I

I

= 0A 200 µs

OUT

V

= 0V 1.5 2.5 3.5 V

IN

OVER-TEMP STATUS TIMING

OL

Tj > T

jsh

V

V

IN

STAT

t

SDL

1000 µs

t

SDL

9/27

Electrical specifications VN750SM

Figure 5. Switching time waveforms

V

OUT

t

d(off)

90%

dV

/dt

OUT

(off)

t

t

dV

V

IN

Table 12. Truth table

Conditions Input Output Status

OUT

80%

/dt

(on)

10%

t

d(on)

Normal operation

Current limitation

Over-temperature

Under-voltage

Over-voltage

Output voltage > V

Output current < I

OL

OL

L

H

L
H
H

L
H

L
H

L
H

L
H

L
H

L

H

L
X
X

L

L

L

L

L

L

H
H

L
H

(T

(T

< T

j

> T

j

H
H

H

H

L

X
X

H
H

L

H

H

L

TSD

TSD

) H

) L

10/27

VN750SM Electrical specifications

Table 13. Electrical transient requirements

ISO T/R

Test level

7637/1

Test pulse

1- 25V

2 + 25V

3a - 25V

3b + 25V

4- 4V

5+ 26.5V

1. All functions of the device are performed as designed after exposure to disturbance.

2. One or more functions of the device is not performed as designed after exposure and cannot be returned to
proper operation without replacing the device.

I II III IV Delays and impedance

(1)

(1)

(1)

(1)

(1)

(1)

- 50V

+ 50V

- 50V

+ 50V

- 5V

+ 46.5V

(1)

(1)

(1)

(1)

(1)

(2)

- 75V

+ 75V

- 100V

+ 75V

- 6V

+ 66.5V

(1)

(1)

(1)

(1)

(1)

(2)

- 100V

+ 100V

- 150V

+ 100V

- 7V

+ 86.5V

(1)

(1)

(1)

(1)

(1)

(2)

2ms, 10Ω

0.2ms, 10Ω

0.1µs, 50Ω

0.1µs, 50Ω

100ms, 0.01Ω

400ms, 2Ω

11/27

Electrical specifications VN750SM

Figure 6. Waveforms

NORMAL OPERATION

INPUT

LOAD VOLTAGE

STATUS

UNDER-VOLTAGE

V

CC

INPUT

LOAD VOLTAGE

V

USD

V

USDhyst

STATUS

V

CC

INPUT
LOAD VOLTAGE
STATUS

INPUT

LOAD VOLTAGE

STATUS

INPUT

LOAD VOLTAGE

STATUS

undefined

OVER-VOLTAGE

V

CC<VOV

V

> V

CC

OV

OPEN LOAD with external pull-up

V

> V

OUT

OL

V

OL

OPEN LOAD without external pull-up

T

T

j

TSD

T

R

OVER-TEMPERATURE

INPUT

LOAD CURRENT

STATUS

12/27

VN750SM Electrical specifications

2.4 Electrical characteristics curves

Figure 7. Off-state output current Figure 8. High level input current

IL (off1 ) (u A )

3

2.5

2

1.5

1

0.5

0

-0.5

-1

Off state
Vc c=36V

Vin=Vout=0V

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC )

Iih (uA )

7

6

Vi n=3.25V

5

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC )

Figure 9. Input clamp voltage Figure 10. Status leakage current

Vicl (V)

8

7.8

7.6

7.4

7.2

6.8

6.6

6.4

6.2

Ii n =1m A

7

6

-50 -25 0 25 50 75 100 125 150 175

Tc (°C )

Ils ta t (u A)

0.05

0.04

Vstat=5V

0.03

0.02

0.01

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C )

Figure 11. Status low output voltage Figure 12. Status clamp voltage

Vstat (V)

0.6

0.5

Is tat=1.6mA

0.4

0.3

0.2

0.1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

13/27

Vscl (V)

8

7.8

Is t a t=1 m A

7.6

7.4

7.2

7

6.8

6.6

6.4

6.2

6

-50 -25 0 25 50 75 100 125 150 175

Tc (°C )

Electrical specifications VN750SM

Figure 13. On-state resistance Vs T

Ron (mO hm)

140

120

100

80

60

40

20

0

-50 -25 0 25 50 75 100 125 150 175

Io u t=2 A

Vc c=8V ; 13V ; 36V

Tc (ºC)

case

Figure 15. Open load on-state detection

threshold

Iol (A )

1.2

1.15

1.05

0.95

0.9

0.85

0.8

0.75

0.7

0.65

0.6

Vc c=13V

1.1

Vin=5V

1

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC )

Figure 14. On-state resistance Vs V

Ron (mO hm)

120

110

100

90

80

70

60

50

40

30

20

Io u t=2 A

Tc = 150 °C

Tc = 125 °C

Tc = 25°C

Tc= - 40°C

5 10152025303540

Vcc (V)

Figure 16. Input high level

Vih (V)

3.6

3.4

3.2

3

2.8

2.6

2.4

2.2

2

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

CC

Figure 17. Input low level Figure 18. Input hysteresis voltage

Vil (V)

2.8

2.6

2.4

2.2

2

1.8

1.6

1.4

1.2

1

-50 -25 0 25 50 75 100 125 150 175

14/27

Tc (ºC )

Vhyst (V)

1.5

1.4

1.3

1.2

1.1

1

0.9

0.8

0.7

0.6

0.5

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC )

VN750SM Electrical specifications

Figure 19. Over-voltage shutdown Figure 20. Open load off-state voltage

detection threshold

Vov (V)

50

48

46

44

42

40

38

36

34

32

30

-50 -25 0 25 50 75 100 125 150 175

Tc (°C )

Vol (V)

5

4.5

3.5

2.5

1.5

Vin=0V

4

3

2

1

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope

dV out/dt/(on) (V /ms)

1000

900

800

700

600

500

400

300

200

100

Vcc=13V

Rl=6.5Ohm

0

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC )

dVout/dt(off) (V/ms)

500

450

400

350

300

250

200

150

100

50

0

-50 -25 0 25 50 75 100 125 150 175

Vcc=13V

Rl=6.5Ohm

Tc (ºC )

Figure 23. I

Ili m (A )

20

18

16

14

12

10

8

6

4

2

0

-50 -25 0 25 50 75 100 125 150 175

lim

Vc c=13V

Vs T

case

Tc (ºC)

15/27

Application information VN750SM

3 Application information

Figure 24. Application schematic

+5V

µ

C

+5V

GND

R

GND

V

CC

OUTPUT

D

GND

R

prot

STATUS

R

prot

INPUT

V

GND

3.1 GND protection network against reverse battery

3.1.1 Solution 1: resistor in the ground line (R

GND

only)

D

ld

This can be used with any type of load.

The following is an indication on how to dimension the R

1. R

2. R

where - I

≤ 600mV / (I

GND

≥ (- VCC) / (- I

GND

is the DC reverse ground pin current and can be found in the absolute

GND

S(on)max

GND

).

)

maximum rating section of the device datasheet.

Power Dissipation in R

P

= (- VCC)2/ R

D

GND

GND

(when V

CC

This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.

Please note that if the microprocessor ground is not shared by the device ground then the
R

will produce a shift (I

GND

S(on)max

* R

GND

values. This shift will vary depending on how many devices are ON in the case of several
high-side drivers sharing the same R

GND

If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).

16/27

resistor.

GND

< 0: during reverse battery situations) is:

S(on)max

becomes the sum of the

) in the input thresholds and the status output

.

VN750SM Application information

3.1.2 Solution 2: diode (D

A resistor (R

= 1kΩ) should be inserted in parallel to D

GND

) in the ground line

GND

inductive load.

This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈ 600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.

Series resistor in INPUT and STATUS lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.

Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V

max DC rating. The same applies if the device is subject to transients on the VCC line

CC

that are greater than the ones shown in the ISO 7637-2: 2004(E) table.

3.3 MCU I/Os protection

If a ground protection network is used and negative transient are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (R
prevent the µC I/Os pins to latch-up.

if the device drives an

GND

prot

) in line to

The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os.

-V

CCpeak/Ilatchup

≤ R

prot

≤ (V

OHµC-VIH-VGND

) / I

IHmax

Calculation example:

For V

5kΩ ≤ R

Recommended values: R

CCpeak

prot

≤ 65kΩ.

= - 100V and I

latchup

prot

≥ 20mA; V

=10kΩ .

OHµC

≥ 4.5V

17/27

Application information VN750SM

3.4 Open load detection in off-state

Off-state open load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (V
microprocessor.

The external resistor has to be selected according to the following requirements:

1. no false open load indication when load is connected: in this case we have to avoid

V

to be higher than V

OUT

V

= (V

OUT

PU

/ (RL+RPU)) RL < V

; this results in the following condition

Olmin

Olmin

.

2. no misdetection when load is disconnected: in this case the V

V

Because I
up resistor R

; this results in the following condition R

OLmax

may significantly increase if V

s(OFF)

should be connected to a supply that is switched OFF when the module is in

PU

standby.

) like the +5V line used to supply the

PU

has to be higher than

PU

– V

OUT

OLmax

) / I

L(off2)

.

< (V

PU

is pulled high (up to several mA), the pull-

out

The values of V

OLmin

, V

OLmax

and I

are available in the electrical characteristics

L(off2)

section.

Figure 25. Open load detection in off-state

V batt. VPU

CC

V

IN P U T

STATUS

DRIVER

+

LOGIC

+

-

OL

V

GROUND

R

OUT

L(off2)

I

PU

R

L

R

18/27

VN750SM Application information

3.5 Maximum demagnetization energy (VCC = 13.5V)

Figure 26. Maximum turn-off current versus inductance

I

LMA X (A)

100

10

A

B

C

1

0,1 1 10 100

VIN, I

A: T

B: T

C: T

L

= 150°C single pulse

jstart

= 100°C repetitive pulse

jstart

= 125°C repetitive pulse

jstart

L(mH)

Demagnetization Demagnetization Demagnetization

t

Note: Values are generated with R

demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.

=0 Ω. In case of repetitive pulses, T

L

19/27

(at beginning of each

jstart

Package and PCB thermal data VN750SM

4 Package and PCB thermal data

4.1 SO-8 thermal data

Figure 27. PC board

Note: Layout condition of R

thickness = 2 mm, Cu thickness=35µm , Copper areas: 0.14 cm

Figure 28. R

thj-amb

RTHj_am b (ºC/W)

110

105

100

and Zth measurements (PCB FR4 area = 58mm x 58 mm,PCB

th

Vs. PCB copper area in open box free air condition

2

, 2 cm2).

SO-8 at 2 pins connected to TAB

95

90

85

80

75

70

00.511.522.5

PCB Cu he atsink area (cm^2)

20/27

VN750SM Package and PCB thermal data

Figure 29. SO-8 thermal impedance junction ambient single pulse

ZT H (°C/W)

1000

2

100

0.5 cm

2 cm

2

10

1

0.1

0.01

0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)

Equation 1: pulse calculation formula

Z

THδ

where δ = t

Figure 30. Thermal fitting model of a single channel

R

TH

/T

P

δ Z

THtp

1 δ–()+⋅=

21/27

Package and PCB thermal data VN750SM

Table 14. Thermal parameter

Area/island (cm2)0.52

R1 (°C/W) 0.05

R2 (°C/W) 0.8

R3 (°C/W) 3.5

R4 (°C/W) 21

R5 (°C/W) 16

R6 (°C/W) 58 28

C1 (W·s/°C) 0.006

C2 (W·s/°C) 0.0026

C3 (W·s/°C) 0.0075

C4 (W·s/°C) 0.045

C5 (W·s/°C) 0.35

C6 (W·s/°C) 1.05 2

22/27

VN750SM Package and packing information

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

5.2 SO-8 package information

Figure 31. SO-8 package dimensions

23/27

Package and packing information VN750SM

Table 15. SO-8 mechanical data

mm

Dim.

Min. Typ. Max.

A 1.75

a1 0.1 0.25

a2 1.65

a3 0.65 0.85

b 0.35 0.48

b1 0.19 0.25

C 0.25 0.5

c1 45 (typ.)

D4.8 5

E

5.8

6.2

e1.27

e3 3.81

F3.8 4

L 0.4 1.27

M 0.6

S 8 (max.)

L1 0.8 1.2

24/27

VN750SM Package and packing information

5.3 SO-8 packing information

The devices can be packed in tube or tape and reel shipments (see the Device summary on

page 1 ).

Figure 32. SO-8 tube shipment (no suffix)

B

C

Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532

A

A 3.2
B 6
C (± 0.1) 0.6

All dimensions are in mm.

Figure 33. SO-8 tape and reel shipment (suffix “TR”)

Tape dimensions

According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986

Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (+0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

End

Reel dimensions

Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4

All dimensions are in mm.

Start

Top

cover

tape

500mm min

Empty components pockets
saled with cover tape.

User direction of feed

No componentsNo components Components

500mm min

25/27

Revision history VN750SM

6 Revision history

Table 16. Document revision history

Date Revision Changes

09-Sep-2004 1 Initial release.

Minor changes.
Current and voltage convention update (page 2).
Configuration diagram (top view) and suggested connections for

03-May-2006 2

16-Dec-2008 3

unused and n.c. pins insertion (page 2).
2 cm2 Cu condition insertion in thermal data table (page 3).

- output diode section update (page 4).

V

CC

Revision history table insertion (page18).
Disclaimers update (page 19).

Document reformatted and restructured.
Added content, list of figures and tables.

®

Added ECOPACK

packages information.

26/27

VN750SM

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