Datasheet VN5E160S-E Datasheet (ST)

Single channel high side driver for automotive applications

Features

Max transient supply voltage V

Operating voltage range V

Max On-state resistance (per ch.) R

Current limitation (typ) I

Off state supply current I

1. Typical value with all loads connected.

■ General

– Inrush current active management by

power limitation
– Very low stand-by current
– 3.0V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC

european directive

■ Diagnostic functions

– Open Drain status output
– On-state open load detection
– Off-state open load detection
– Output short to V

detection

CC

– Overload and short to ground (power

limitation) indication
– Thermal shutdown indication

■ Protections

– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

CC

– Over-temperature shutdown with

autorestart (thermal shutdown)

– Reverse battery protected
– Electrostatic discharge protection

(a)

CC

CC

ON

LIMH

S

4.5 to 28V

41V

160 mΩ

10A

(1)

2 µA

VN5E160S-E

SO-8

Application

■ All types of resistive, inductive and capacitive

loads

Description

The VN5E160S-E is a single channel high-side
driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
SO-8 package.

The VN5E160S-E is designed to drive automotive
grounded loads delivering protection, diagnostics
and easy 3V and 5V CMOS-compatible interface
with any microcontroller.

The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over-temperature shut-off with auto­restart and over-voltage active clamp.

A dedicated active low digital status pin is
associated with every output channel in order to
provide Enhanced diagnostic functions including
fast detection of overload and short-circuit to
ground, over-temperature indication, short-circuit
to V

diagnosis and ON & OFF state open-load

CC

detection.

The diagnostic feedback of the whole device can
be disabled by pulling the STAT_DIS pin up, thus
allowing wired-ORing with other similar devices.

a. See Figure 32: Application schematic.

February 2008 Rev 2 1/34

www.st.com

34

Contents VN5E160S-E

Contents

1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.3 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.4 Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 25

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

2/34

VN5E160S-E List of tables

List of tables

Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 6. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 7. Status pin (V

Table 8. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Open load detection (8V<V

Table 10. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 12. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 13. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 14. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 15. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

SD

<18V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

3/34

List of figures VN5E160S-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 5. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 8. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 9. Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 10. Intermittent Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 11. Open Load with external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 12. Open Load without external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 13. Short to V
Figure 14. T

evolution in Overload or Short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

J

Figure 15. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 16. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 17. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 18. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 19. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 20. Low level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 21. On state resistance vs T

Figure 22. High level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 23. On state resistance vs V

Figure 24. Low level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 25. I

LIM

vs T

Figure 26. Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 27. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 28. Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 29. STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 30. High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 31. Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 33. Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 34. Maximum turn-Off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 25

Figure 35. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 36. Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 26

Figure 37. SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 38. Thermal fitting model of a single channel HSD in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 39. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 40. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 41. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

case

4/34

VN5E160S-E Block diagram and pin configuration

1 Block diagram and pin configuration

Figure 1. Block diagram

V

CC

Signal Clamp

Undervoltage

IN

ST_
DIS

ST

LOGIC

Table 1. Pin function

C ontrol & Diagnos tic

DRIVER

Over

tem p.

OVERLOAD PROTECTION

(AC TIVE P O WE R LIMITA T ION)

C urre nt

Limi ta tio n

Power
Clamp

V

ON

Limi tatio n

OFF S tate
Open load

ON State

Open load

OUT

GND

Name Function

V

CC

Battery connection.

OUTPUT Power output.

GND

INPUT

Ground connection. Must be reverse battery protected by an external
diode/ resistor network.

Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.

STATUS Open Drain digital diagnostic pin.

STAT_DIS

Active high CMOS compatible pin, to disable the STATUS pin.

5/34

Block diagram and pin configuration VN5E160S-E

Figure 2. Configuration diagram (top view)

V

CC

OUTPUT
OUTPUT

V

CC

5
6

7

8

4
3
2

1

STAT_DIS
STATUS
INPUT
GND

SO-8

Table 2. Suggested connections for unused and not connected pins

Connection / pin Status N.C. Output Input STAT_DIS

Floating X X X X X

To ground

Not

allowed

X

Not

allowed

Through 10KΩ

resistor

Through 10KΩ

resistor

6/34

VN5E160S-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I

V

CC

V

S

V

F

CC

I

SD

V

Note: V

= V

F

SD

- VCC during reverse battery condition.

OUT

I

IN

V

IN

INPUT

2.1 Absolute maximum ratings

Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in the “Absolute maximum
ratings” tables for extended periods may affect device reliability. Refer also to the
STMicroelectronics SURE Program and others relevant quality documents.

Table 3. Absolute maximum ratings

GND

OUTPUTSTAT_DIS

STATUS

I

GND

I

OUT

I

STAT

V

STAT

V

OUT

Symbol Parameter Value Unit

V

- V

- I

I

- I

I

STAT

I

STAT_DIS

E

DC supply voltage 41 V

CC

Reverse DC supply voltage 0.3 V

CC

DC reverse ground pin current 200 mA

GND

DC output current Internally limited A

OUT

Reverse DC output current 6 A

OUT

I

DC input current +10 / -1 mA

IN

DC status current +10 / -1 mA

DC status disable current +10 / -1 mA

Maximum switching energy (single pulse)

MAX

(L=8 mH; R

=0Ω; V

L

=13.5V; T

bat

jstart

=150ºC; I

OUT

= I

limL

(Typ.) )

36 mJ

7/34

Electrical specifications VN5E160S-E

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Electrostatic discharge (Human body model: R=1.5KΩ;
C=100pF)

–INPUT

ESD

–STATUS

V

–STAT_DIS
–OUTPUT
–V

CC

V

T

Charge device model (CDM-AEC-Q100-011) 750 V

ESD

Junction operating temperature -40 to 150 °C

T

j

Storage temperature - 55 to 150 °C

stg

4000
4000
4000
5000
5000

V
V
V
V
V

Table 4. Thermal data

Symbol Parameter Max. value Unit

R

thj-pins

R

thj-amb

Thermal resistance junction-pins 30 °C/W

Thermal resistance junction-ambient See Figure 36. °C/W

8/34

VN5E160S-E Electrical specifications

2.2 Electrical characteristics

Values specified in this section are for 8V<VCC<28V; -40°C< Tj <150°C, unless otherwise
stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

USDhyst

R

V

I

L(off1)

1. PowerMOS leakage included.

Operating supply voltage 4.5 13 28 V

CC

Undervoltage shutdown 3.5 4.5 V

USD

Undervoltage shutdown
hysteresis

I

=1A; Tj=25°C

OUT

On state resistance

ON

Clamp voltage IS=20 mA 41 46 52 V

clamp

I

Supply current

S

Off state output current

Output - VCC diode

V

F

voltage

I

=1A; Tj=150°C

OUT

=1A; VCC=5V; Tj=25°C

I

OUT

Off State; V

=25°C

T

j

CC

On State; VIN=5V; VCC=13V;

=0A

I

OUT

V

IN=VOUT

V

IN=VOUT

-I

OUT

=0V; VCC=13V; Tj=25°C
=0V; VCC=13V; Tj=125°C00

=0.6A; Tj=150°C 0.7 V

Table 6. Switching (VCC=13V; Tj=25°C)

=13V; VIN=V

OUT

=0V;

0.5 V

160

mΩ

320

mΩ

210

mΩ

(1)

2

1.9

(1)

5

3.5µAmA

0.01 35µA
µA

Symbol Parameter Test conditions Min. Typ. Max. Unit

=13Ω

R

L

(see Figure 6.)

=13Ω

R

L

(see Figure 6.)

RL=13Ω

(see Figure 6.)

RL=13Ω

(see Figure 6.)

10 µs

15 µs

See

Figure 26.

See

Figure 28.

70 µJ

40 µJ

dV

dV

t

d(on)

t

d(off)

OUT

OUT

W

W

/dt

/dt

ON

OFF

Turn-On delay time

Turn-Off delay time

Turn-On voltage slope RL=13Ω

(on)

Turn-Off voltage slope RL=13Ω

(off)

Switching energy losses
during t

won

Switching energy losses
during t

woff

V/µs

V/µs

9/34

Electrical specifications VN5E160S-E

Table 7. Status pin (VSD=0)

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

STAT

I

LSTAT

C

STAT

V

Table 8. Protection

Status low output
voltage

Status leakage current

Status pin input
capacitance

Status clamp voltage

SCL

(1)

= 1.6 mA, VSD=0V 0.5 V

I

STAT

Normal operation or V

= 5V

V

STAT

SD

=5V,

Normal operation or VSD=5V,
V

= 5V

STAT

I

STAT

I

STAT

= 1mA
= - 1mA

5.5

-0.7

10 µA

100 pF

7V

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

T

limH

I

limL

TSD

T

T

DC short circuit
current

Short circuit current
during thermal cycling

V

=13V; 5V<VCC<28V

CC

=13V; TR<Tj<T

V

CC

TSD

Shutdown
temperature

Reset temperature TRS + 1 TRS + 5 °C

R

Thermal reset of

RS

STATUS

7101414A

2.5 A

150 175 200 °C

135 °C

V

A

T

HYST

t

SDL

V

DEMAG

V

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

Thermal hysteresis
(T

TSD-TR

Status delay in
overload conditions

Turn-off output voltage
clamp

Output voltage drop

ON

limitation

)

T

I

OUT

I

OUT

(see Figure 4)20µs

j>TTSD

=1A; VIN=0; L=20mH VCC-41 VCC-46 VCC-52 V

=0.03A (see Figure 5.)

Tj= -40°C...+150°C

7°C

25 mV

10/34

VN5E160S-E Electrical specifications

Table 9. Open load detection (8V<VCC<18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

DOL(on)

t

DSTKON

I

L(off2)

td_vol

I

t

POL

V

Open load ON state

OL

detection threshold

Open load ON state
detection delay

Delay between INPUT
falling edge and
STATUS rising edge in
open load condition

Open load OFF state
voltage detection

OL

threshold

Output short circuit to
Vcc detection delay at
turn-off

Off state output current

Delay response from
output rising edge to
STATUS falling edge in
open load

VIN = 5V 10 40 mA

I

= 0A, VCC=13V

OUT

(see Figure 4)

= 0A (see Figure 4) 200 500 1200 µs

I

OUT

200 µs

VIN = 0V 2 4 V

See Figure 4 180 t

= 0V; V

V

IN

(see Section 3.4: Open

OUT

= 4V

-75 0 µA

POL

µs

load detection in Off state)

V

IN

= 0V; V

= 4V 20 µs

OUT

Table 10. Logic input

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

I(hyst)

V

V

I

SDL

V

I

SDH

V

SD(hyst)

V

SDCL

Input low level 0.9 V

IL

I

Low level input current VIN = 0.9V 1 µA

IL

Input high level 2.1 V

IH

High level input current VIN = 2.1V 10 µA

I

IH

Input hysteresis voltage 0.25 V

I

= 1mA

Input clamp voltage

ICL

STAT_DIS low level voltage 0.9 V

SDL

IN

= -1mA

I

IN

5.5

-0.7

Low level STAT_DIS current VSD=0.9V 1 µA

STAT_DIS high level voltage 2.1 V

SDH

High level STAT_DIS
current

V

=2.1V 10 µA

SD

STAT_DIS hysteresis voltage 0.25 V

STAT_DIS clamp voltage

ISD=1mA

=-1mA

I

SD

5.5

-0.7

7V

7V

V

V

11/34

Electrical specifications VN5E160S-E

Figure 4. Status timings

OPEN LOAD STATUS TIMING (without external pull-up)

I

< I

OUT

V

IN

V

STAT

t

DOL(on)

OL

V

< V

OUT

t

POL

OUTPUT STUCK TO Vcc

I

> I

OUT

V

V

IN

STAT

t

DOL(on)

OL

V

t

DSTKON

OUT

> V

OPEN LOAD STATUS TIMING (with external pull-up)

I

< I

OUT

V

OL

IN

V

STAT

t

DOL(on)

OL

V

> V

OUT

OL

OVER TEMP STATUS TIMING

Tj > T

V

V

IN

STAT

t

SDL

OL

TSD

t

SDL

Figure 5. Output voltage drop limitation

Vcc-V

out

Tj=150oC

V

on

V

on/Ron(T)

=25oC

T

j

=-40oC

T

j

I

out

12/34

VN5E160S-E Electrical specifications

Figure 6. Switching characteristics

V

OUT

dV

OUT

t

Won

80%

/dt

(on)

t

r

10%

t

Woff

90%

t

f

dV

OUT

/dt

(off)

t

INPUT

t

d(on)

t

d(off)

Table 11. Truth table

Conditions INPUT OUTPUT STATUS (VSD=0V)

Normal operation

Overtemperature

Undervoltage

Overload &

Short circuit to GND

Output voltage > V

Output current < I

OL

OL

L
H

L
H

L
H

H

(no power limitation)

H

(power limitation)

L
H

L
H

L
H

L
L

L
L

X

Cycling

H
H

L
H

t

(1)

H
H

H

L

X
X

H

L

(2)

L

H

(3)

H

L

1. If the VSD is high, the STATUS pin is in a high impedance.

2. The STATUS pin is low with a delay equal to t

3. The STATUS pin becomes high with a delay equal to t

after INPUT falling edge.

DSTKON

POL

after INPUT falling edge.

13/34

Electrical specifications VN5E160S-E

Table 12. Electrical transient requirements

ISO 7637-2:

2004(E)

Tes t puls e

Test levels

III IV

(1)

Number of

pulses or

test times

Burst cycle / pulse

repetition time

Delays and
impedance

1 -75 V -100 V

2a +37 V +50 V

5000

pulses

5000

pulses

0.5 s 5 s 2 ms, 10 Ω

0.2 s 5 s 50 µs, 2 Ω

3a -100 V -150 V 1h 90 ms 100 ms 0.1 µs, 50 Ω

3b +75 V +100 V 1h 90 ms 100 ms 0.1 µs, 50 Ω

4 -6 V -7 V 1 pulse 100 ms, 0.01

(2)

5b

ISO 7637-2:

+65 V +87 V 1 pulse 400 ms, 2 Ω

Test level results

(1)

2004(E)

Tes t puls e

III IV

1C C

2a C C

3a C C

3b C C

4C C

5b

(2)

CC

Ω

1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.

2. Valid in case of external load dump clamp: 40V maximum referred to ground.

Class Contents

C All functions of the device are performed as designed after exposure to disturbance.

E

One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.

14/34

VN5E160S-E Electrical specifications

2.3 Waveforms

Figure 7. Normal operation

Normal operation

INPUT

Nominal load Nominal load

I

OUT

V

STATUS

V

ST_DIS

Figure 8. Undervoltage shutdown

Undervoltage shut-down

V

V

INPUT

I

V

STATUS

V

ST_DIS

CC

OUT

USD

V

USDhyst

UNDEFINED

15/34

Electrical specifications VN5E160S-E

Figure 9. Overload or Short to GND

Overload or Short to GND

INPUT

I

>

LimH

I

OUT

V

STATUS

V

ST_DIS

Power Limitation

Figure 10. Intermittent Overload

INPUT

I

>

LimH

I

OUT

Thermal cycling

I

>

LimL

Intermittent Overload

Overload

I

>

LimL

Nominal load

V

STATUS

V

ST_DIS

16/34

VN5E160S-E Electrical specifications

Figure 11. Open Load with external pull-up

Open Load

with external pull-up

INPUT

VPU> V

OL

V

t

DOL(on)

OL

V

OUT

I

OUT

V

STATUS

V

ST_DIS

Figure 12. Open Load without external pull-up

Open Load

without external pull-up

INPUT

V

OUT

I

OUT

V

STATUS

V

ST_DIS

I

OUT

t

DOL(on)

< I

OL

I

OL

t

POL

17/34

Electrical specifications VN5E160S-E

Figure 13. Short to V

INPUT

V

OUT

I

OUT

V

STATUS

V

ST_DIS

CC

Resistive

Short to V

V

> V

OUT

V

OL

I

> I

OUT

I

OL

t

DSTK(on)

Short to V

CC

Hard

CC

OL

OL

Short to V

V

> V

OUT

I

< I

OUT

t

DOL(on)

CC

OL

OL

Figure 14. TJ evolution in Overload or Short to GND

TJ evolution in

Overload or Short to GND

INPUT

I

OUT

T

J

Self-limitation of fast thermal transients

T

J_START

Power Limitation

I

>

LimH

T

T

TSD

R

< I

T

HYST

LimL

18/34

VN5E160S-E Electrical specifications

2.4 Electrical characteristics curves

Figure 15. Off state output current Figure 16. High level input current

Iloff (nA)

300

Iih (µA)

5

250

200

150

100

50

0

-50 -25 0 25 50 75 100 125 150 175

Off State
Vcc=13V

Vin=Vout=0V

Tc (°C)

4,5

3,5

2,5

Vin=2.1V

4

3

2

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 17. Input clamp voltage Figure 18. Input high level

Vicl (V)

7

6,8

6,6

6,4

6,2

6

5,8

lin=1mA

Vih (V)

3

2,5

2

1,5

1

0,5

5,6

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 19. Input low level Figure 20. Low level STAT_DIS current

Vil (V)

2

1,8

1,6

1,4

1,2

1

0,8

0,6

0,4

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Isdl (µA)

5

4,5

3,5

2,5

1,5

Vsd= 0.9V

4

3

2

1

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

19/34

Electrical specifications VN5E160S-E

Figure 21. On state resistance vs T

Ron (mOhm)

300

250

200

150

100

50

Iout= 1A

Vcc=13V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 23. On state resistance vs V

Ron (mOhm)

300

250

200

150

100

50

0 5 10 15 20 25 30 35

Vcc (V)

case

CC

Tc=150°C

Tc=125°C

Tc=25°C

Tc=-40°C

Figure 22. High level STAT_DIS current

Isdh (µA)

5

4,5

3,5

2,5

Vsd= 2.1V

4

3

2

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 24. Low level input current

Iil (µA)

5

4,5

3,5

2,5

1,5

Vin=0.9V

4

3

2

1

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 25. I

Ilimh (A)

20

15

10

5

0

-50 -25 0 25 50 75 100 125 150

LIM

vs T

Vcc=13V

case

Tc (°C)

20/34

Figure 26. Turn-On voltage slope

(dVout/dt )On (V/ms)

1000

900

800

700

600

500

400

300

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vcc=13V

RI=13 Ohm

VN5E160S-E Electrical specifications

Figure 27. Undervoltage shutdown Figure 28. Turn-Off voltage slope

Vusd (V)

7

(dVout/dt )Off (V/ms)

1400

6

5

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

1200

1000

800

600

400

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vcc=13V

RI= 13 Ohm

Figure 29. STAT_DIS clamp voltage Figure 30. High level STAT_DIS voltage

Vsdcl(V)

10

9

8

7

6

5

4

Isd = 1 mA

VsdH(V)

3

2,5

2

1,5

1

0,5

3

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 31. Low level STAT_DIS voltage

VsdL(V)

3

2,5

2

1,5

1

0,5

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

21/34

Application information VN5E160S-E

3 Application information

Figure 32. Application schematic

+5V

R

R

MCU

R

prot

prot

prot

+5V

STAT_DIS

INPUT

STATUS

V

GND

GND

R

GND

V

CC

OUTPUT

D

GND

3.1 GND protection network against reverse battery

3.1.1 Solution 1: resistor in the ground line (R

GND

only)

D

ld

This solution can be used with any type of load.

The following is an indication on how to dimension the R

1. R

2. R

where -I

≤ 600mV / (I

GND

≥ (−VCC) / (-I

GND

is the DC reverse ground pin current and can be found in the absolute

GND

S(on)max

GND

).

)

maximum rating section of the device datasheet.

Power dissipation in R

P

= (-VCC)2/R

D

GND

(when VCC<0: during reverse battery situations) is:

GND

This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.

Please note that if the microprocessor ground is not shared by the device ground then the
R

will produce a shift (I

GND

S(on)max

* R
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same R

22/34

GND

resistor.

GND

S(on)max

) in the input thresholds and the status output

GND

becomes the sum of the

.

VN5E160S-E Application information

If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests Solution 2 is used (see below).

3.1.2 Solution 2: diode (D

A resistor (R

=1kΩ) should be inserted in parallel to D

GND

) in the ground line

GND

inductive load.

This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (~600mV) in the input
threshold and in the status output values, if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds to
V

max DC rating. The same applies if the device is subject to transients on the VCC line

CC

that are greater than the ones shown in the ISO T/R 7637/2 table.

3.3 MCU I/Os protection

If a ground protection network is used and negative transient are present on the VCC line,
the control pins will be pulled negative. ST suggests that a resistor (R
to prevent the µC I/Os pins to latch-up.

The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os.

if the device drives an

GND

) be inserted in line

prot

-V

CCpeak/Ilatchup

≤ R

prot

Calculation example:

For V

5kΩ ≤ R

Recommended R

CCpeak

≤ 180kΩ.

prot

= - 100V and I

prot

≤ (V

OHµC-VIH-VGND

≥ 20mA; V

latchup

value is 10kΩ.

) / I

IHmax

OHµC

≥ 4.5V

23/34

Application information VN5E160S-E

3.4 Open load detection in Off state

Off-state open-load detection requires an external pull-up resistor (RPU) connected between
the OUTPUT pin and a positive supply voltage (V
microprocessor.

The external resistor has to be selected according to the following requirements:

1. No false open load indication when load is connected: in this case we have to avoid

V

to be higher than V

OUT

V

= (VPU/(RL+RPU))RL<V

OUT

; this results in the following condition

Olmin

Olmin.

2. No misdetection when load is disconnected: in this case the V

V

Because I
up resistor R

; this results in the following condition RPU<(V

OLmax

may significantly increase if V

s(OFF)

should be connected to a supply that is switched OFF when the module is in

PU

standby.

) like the +5V line used to supply the

PU

has to be higher than

OUT

PU–VOLmax

is pulled high (up to several mA), the pull-

out

)/I

L(off2)

.

The values of V

OLmin

, V

OLmax

and I

are available in the Electrical characteristics

L(off2)

section.

Figure 33. Open load detection in Off state

CC

V

IN P U T

STATUS

DRIVER

+

LOGIC

+

-

V

GROUND

V batt. VPU

L(off2)

I

OUT

R

OL

PU

R

L

R

24/34

VN5E160S-E Application information

3.5 Maximum demagnetization energy (VCC= 13.5V)

Figure 34. Maximum turn-Off current versus inductance (for each channel)

100

A: T

B: T

C: T

L

A

C

jstart

jstart

jstart

B

= 150°C single pulse

= 100°C repetitive pulse

= 125°C repetitive pulse

10

1

I (A)

0,1

0,1110100L (mH)

VIN, I

Demagnetization Demagnetization Demagnetization

Note: Values are generated with R

In case of repetitive pulses, T
must not exceed the temperature specified above for curves A and B.

=0 Ω.

L

(at beginning of each demagnetization) of every pulse

jstart

t

25/34

Package and PCB thermal data VN5E160S-E

4 Package and PCB thermal data

4.1 SO-8 thermal data

Figure 35. SO-8 PC board

Note: Layout condition of R

thickness=2mm, Cu thickness= 35µm, Copper areas: from minimum pad lay-out to 2cm

Figure 36. R

RTHj_amb(°C/W)

thj-amb

110

100

90

80

70

60

0 0.5 1 1.5 2 2.5

and Zth measurements (PCB: FR4 area= 4.8mm x 4.8mm, PCB

th

Vs. PCB copper area in open box free air condition

2

).

PC B Cu heatsink area (cm^2)

26/34

VN5E160S-E Package and PCB thermal data

Figure 37. SO-8 thermal impedance junction ambient single pulse

ZT H (°C/W)

1000

Footprint

100

10

1

0.1

0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)

Equation 1: pulse calculation formula

Z

THδ

where δ = tP/T

R

TH

δ Z

THtp

1 δ–()+⋅=

2 cm

2

Figure 38. Thermal fitting model of a single channel HSD in SO-8

b. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded

protections (power limitation or thermal cycling during thermal shutdown) are not triggered.

(b)

27/34

Package and PCB thermal data VN5E160S-E

Table 13. Thermal parameter

Area/island (cm2)Footprint2

R1 (°C/W) 1.2

R2 (°C/W) 6

R3 (°C/W) 3.5

R4 (°C/W) 21

R5 (°C/W) 16

R6 (°C/W) 58 28

C1 (W.s/°C) 0.0008

C2 (W.s/°C) 0.0016

C3 (W.s/°C) 0.0075

C4 (W.s/°C) 0.045

C5 (W.s/°C) 0.35

C6 (W.s/°C) 1.05 2

28/34

VN5E160S-E Package and packing information

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second-level interconnect. The category of
Second-Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97.

The maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

5.2 Package mechanical data

Figure 39. SO-8 package dimensions

29/34

Package and packing information VN5E160S-E

Table 14. SO-8 mechanical data

Dim.

Min. Typ. Max.

A 1.75

a1 0.1 0.25

a2 1.65

a3 0.65 0.85

b0.35 0.48

b1 0.19 0.25

C 0.25 0.5

c1 45 (typ.)

D4.8 5

E5.8 6.2

e1.27

Millimeter

e3 3.81

F3.8 4

L 0.4 1.27

M 0.6

S 8 (max.)

L1 0.8 1.2

30/34

VN5E160S-E Package and packing information

5.3 Packing information

Figure 40. SO-8 tube shipment (no suffix)

B

C

Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532

A

A 3.2
B 6
C (± 0.1) 0.6

All dimensions are in mm.

Figure 41. SO-8 tape and reel shipment (suffix “TR”)

Tape dimensions

According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986

Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (+ 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

End

Reel dimensions

Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4

All dimensions are in mm.

Top

cover

tape

500mm min

Empty components pockets
saled with cover tape.

User direction of feed

Start

No componentsNo components Components

500mm min

31/34

Order codes VN5E160S-E

6 Order codes

Table 15. Device summary

Package

Tube Tape and reel

SO-8 VN5E160S-E VN5E160STR-E

Order codes

32/34

VN5E160S-E Revision history

7 Revision history

Table 16. Document revision history

Date Revision Changes

4-Jun-2007 1 Initial release.

Document restructured.
Changed Description on cover page.

<18V): added td_vol parameter.

CC

18-Feb-2008 2

Table 9: Open load detection (8V<V

Changed Section 2.3: Waveforms.
Added Section 2.4: Electrical characteristics curves.
Added Section 3.5: Maximum demagnetization energy (VCC = 13.5V).
Added Section 4.1: SO-8 thermal data.

33/34

VN5E160S-E

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34/34