Datasheet VN5E025AJ-E Datasheet (ST)

Features

VN5E025AJ-E

Single channel high-side driver with analog current sense

for automotive applications

Max supply voltage V

Operating voltage range V

Max On-State resistance R

Current limitation (typ) I

Off state supply current I

1. Typical value with all loads connected.

■ General

CC

CC

ON

LIMH

S

4.5 to 28 V

– Inrush current active management by

power limitation
– Very low stand-by current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC

european directive
– Very low current sense leakage

■ Diagnostic functions

– Proportional load current sense
– High current sense precision for wide

currents range
– Current sense disable
– Off state openload detection
– Output short to V

detection

CC

– Overload and short to ground (power

limitation) indication
– Thermal shutdown indication

■ Protections

– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

CC

– Over-temperature shutdown with

autorestart (thermal shutdown)

41 V

25 mΩ

60 A

(1)

2µA

PowerSSO-12

– Reverse battery protected
– Electrostatic discharge protection

Application

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

Description

The VN5E025AJ-E is a single channel high-side
driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
PowerSSO-12 package. The VN5E025AJ-E is
designed to drive 12 V automotive grounded
loads delivering protection, diagnostics and easy
3 V and 5 V CMOS compatible interface with any
microcontroller.

The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over-temperature shut-off with auto­restart and over-voltage active clamp. A dedicated
analog current sense pin is associated with every
output channel in order to provide Ehnanced
diagnostic functions including fast detection of
overload and short-circuit to ground through
power limitation indication, over-temperature
indication, short-circuit to V
state and OFF-state open load detection.

The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices

diagnosis and ON-

CC

May 2010 Doc ID 13106 Rev 4 1/37

www.st.com

1

Contents VN5E025AJ-E

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolue maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24

3.1.2 Solution 2: diode (D

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.4.1 Short to VCC and OFF state open load detection . . . . . . . . . . . . . . . . . 27

3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28

) in the ground line . . . . . . . . . . . . . . . . . . . . . . 25

GND

4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.1 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.2 PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2/37 Doc ID 13106 Rev 4

VN5E025AJ-E List of tables

List of tables

Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 6. Switching characteristics (VCC=13V, Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 8. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Current sense (8V<V
Table 10. Openload detection (8V<V

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 12. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 13. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 14. PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 15. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CC

Doc ID 13106 Rev 4 3/37

List of figures VN5E025AJ-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 5. Openload Off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Delay response time between rising edge of ouput current and rising edge of current

sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 9. I

Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Intermittent Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 14. OFF-State Open Load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 15. Short to V
Figure 16. T

Figure 17. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 19. Input clamp level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 23. On state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 24. On state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 26. Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 27. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 28. Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 34. Maximum turn off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 35. PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 36. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 37. PowerSSO-12 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . 30

Figure 38. Thermal fitting model of a single channel HSD in PowerSSO-12

Figure 39. PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 40. PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 41. PowerSSO-12

/ I

OUT

evolution in Overload or Short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

J

vs I

SENSE

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

OUT

. . . . . . . . . . . . . . . . . . . 30

tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

4/37 Doc ID 13106 Rev 4

VN5E025AJ-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V

CC

Signal Clamp

Undervoltage

IN

CS_
DIS

CS

LOGIC

Table 1. Pin function

Control & Diagnostic

DRIVER

Over

temp.

V

SENSEH

OVERLOAD PROTECTION

(ACTIVE POWER LIMITATION)

Current

Limitation

Current

Sense

Power
Clamp

V

ON

Limitation

OFF State
Open load

OUT

GND

Name Function

V

CC

Battery connection.

OUTPUT Power output.

GND

INPUT

Ground connection. Must be reverse battery protected by an external diode /
resistor network.

Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.

CURRENT SENSE Analog current sense pin, delivers a current proportional to the load current.

CS_DIS Active high CMOS compatible pin, to disable the current sense pin.

Doc ID 13106 Rev 4 5/37

Block diagram and pin description VN5E025AJ-E

Figure 2. Configuration diagram (top view)

TA B =

V

cc

GND

INPUT

CURRENT_SENSE

CS_DIS

V

cc

Table 2. Suggested connections for unused and not connected pins

Connection / pin Current sense N.C. Output Input CS_DIS

Floating Not allowed X X X X

To ground

Through 1kΩ

resistor

1
2
3
4
5

6

X

12
11
10

9
8
7

Through 22kΩ

resistor

V

cc

OUTPUT
OUTPUT
OUTPUT
OUTPUT

OUTPUT
OUTPUT

Through 10kΩ

resistor

Through 10kΩ

resistor

6/37 Doc ID 13106 Rev 4

VN5E025AJ-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

V

CSD

CC

I

I

CSD

I

IN

V

IN

CS_DIS

INPUT

CURRENT SENSE

GND

OUTPUT

I

GND

OUT

I

SENSE

V

SENSE

V

F

V

OUT

V

CC

Note: V

F

= V

- VCC during reverse battery condition.

OUT

2.1 Absolue maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may

cause permanent damage to the device. These are stress ratings only and operation of the

device at these or any other conditions above those indicated in the Operating sections of

this specification is not implied. Exposure to the conditions in table below for extended

periods may affect device reliability. Refer also to the STMicroelectronics SURE Program

and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

-V

- I

I

OUT

- I

I

CSD

-I

CSENSE

V

CSENSE

E

DC supply voltage 41 V

CC

Reverse DC supply voltage 0.3 V

CC

DC reverse ground pin current 200 mA

GND

DC output current Internally limited A

Reverse DC output current 20 A

OUT

DC input current -1 to 10 mA

I

IN

DC current sense disable input current -1 to 10 mA

DC reverse CS pin current 200 mA

Current sense maximum voltage

Maximum switching energy (single pulse)

MAX

(L=0.8mH; R

=0Ω; V

L

=13.5V; T

bat

jstart

=150ºC; I

OUT

= I

limL

(Typ.) )

V

-41

CC

+V

CC

140 mJ

V
V

Doc ID 13106 Rev 4 7/37

Electrical specifications VN5E025AJ-E

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Electrostatic discharge
(Human Body Model: R=1.5KΩ; C=100pF)

V

V

ESD

ESD

T

- INPUT

- CURRENT SENSE

- CS_DIS

- OUTPUT

- V

CC

4000
2000
4000
5000
5000

Charge device model (CDM-AEC-Q100-011) 750 V

Junction operating temperature -40 to 150 °C

T

j

Storage temperature -55 to 150 °C

stg

V
V
V
V
V

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Max. value Unit

R

thj-case

R

thj-amb

Thermal resistance junction-case 1.4 °C/W

Thermal resistance junction-ambient See Figure 36 °C/W

8/37 Doc ID 13106 Rev 4

VN5E025AJ-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8V<VCC<28V; -40°C<Tj<150°C, unless otherwise

stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

USDhyst

R

V

clamp

I

L(off1)

1. PowerMOS leakage included.

Table 6. Switching characteristics (VCC=13V, Tj=25°C)

Operating supply voltage 4.5 13 28 V

CC

Undervoltage shutdown 3.5 4.5 V

USD

Undervoltage shutdown
hysteresis

On state resistance

ON

I

= 3A; Tj=25°C

OUT

= 3A; Tj=150°C

I

OUT

I

= 3A; VCC=5V; Tj=25°C

OUT

0.5 V

Clamp voltage IS= 20 mA 41 46 52 V

I

Supply current

S

Off state output current

Output - VCC diode

V

F

voltage

Off State; V
V

IN=VOUT=VSENSE=VCSD

On State; VCC=13V; VIN=5V;

=0A

I

OUT

VIN=V

OUT

V

IN=VOUT

-I

= 2A; Tj= 150°C 0.7 V

OUT

=13V; Tj=25°C;

CC

=0V

=0V; VCC=13V; Tj=25°C
=0V; VCC=13V; Tj=125°C00

2

1.5

0.01 3

(1)

25
50
35

(1)

5

3µAmA

5

Symbol Parameter Test conditions Min. Typ. Max. Unit

mΩ
mΩ
mΩ

µA

(dV

(dV

t

d(on)

t

d(off)

OUT

OUT

W

W

ON

OFF

Turn-On delay time RL= 4.3Ω (see Figure 6.)15 µs

Turn-Off delay time RL= 4.3Ω (see Figure 6.)40 µs

/dt)onTurn-On voltage slope RL= 4.3Ω

/dt)

Turn-Off voltage slope RL= 4.3Ω

off

Switching energy losses
during t

won

Switching energy losses
during twoff

Doc ID 13106 Rev 4 9/37

See

Figure 26

See

Figure 28

V/µs

V/µs

RL= 4.3Ω (see Figure 6.)0.4 mJ

RL= 4.3Ω (see Figure 6.)0.5 mJ

Electrical specifications VN5E025AJ-E

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

I

IL

V

I

IH

V

I(hyst)

V

ICL

V

CSDL

I

CSDL

V

CSDH

I

CSDH

V

CSD(hyst)

V

CSCL

Input low level voltage 0.9 V

IL

Low level input current VIN= 0.9V 1 µA

Input high level voltage 2.1 V

IH

High level input current VIN= 2.1V 10 µA

Input hysteresis
voltage

Input clamp voltage

IIN= 1mA
IIN= -1mA

0.25 V

5.5

-0.7

CS_DIS low level
voltage

Low level CS_DIS
current

CS_DIS high level
voltage

High level CS_DIS
current

CS_DIS hysteresis
voltage

CS_DIS clamp voltage

= 0.9V 1 µA

V

CSD

2.1 V

V

= 2.1V 10 µA

CSD

0.25 V

I

CSD

I

CSD

=1mA
= -1mA

5.5

-0.7

7V

V

0.9 V

7V

V

Table 8. Protection and diagnostics

(1)

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

= 13V

I

limH

I

limL

T

T

T

T

HYST

V

DEMAG

V

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device operates under
abnormal conditions this software must limit the duration and number of activation cycles.

DC short circuit current

Short circuit current
during thermal cycling

Shutdown temperature 150 175 200 °C

TSD

Reset temperature TRS + 1 TRS + 5 °C

R

Thermal reset of status 135 °C

RS

Thermal hysteresis
(T

TSD-TR

)

Turn-Off output voltage
clamp

Output voltage drop

ON

limitation

CC

5V<V

V

I

OUT

I

OUT

T

<28V

CC

= 13V; TR<Tj<T

CC

TSD

= 2A; VIN=0; L= 6mH VCC-41 VCC-46 VCC-52 V

= 0.1A

= -40°C...150°C

j

(see Figure 8)

43 60 85

85

15 A

7°C

25 mV

A
A

10/37 Doc ID 13106 Rev 4

VN5E025AJ-E Electrical specifications

Table 9. Current sense (8V<VCC<18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

K

LED

K

K

dK1/K

K

I

OUT/ISENSE

I

0

OUT/ISENSE

I

1

OUT/ISENSE

Current sense ratio

(1)

1

drift

I

2

OUT/ISENSE

= 0.05A, V

OUT

V

=0V

CSD

= -40°C...150°C

T

j

I

= 0.5A; V

OUT

V

=0V;

CSD

= -40°C...150°C

T

j

I

= 2A; V

OUT

= -40°C...150°C

T

j

= 25°C...150°C

T

j

I

OUT

V

CSD

=2A; V

=0V;

SENSE

SENSE

TJ= -40 °C to 150 °C

I

= 3A; V

OUT

= -40°C...150°C

T

j

SENSE

Tj=25°C...150°C

SENSE

SENSE

= 4V;

=0.5V,

=0.5V;

=4V; V

=4V; V

CSD

CSD

=0V;

=0V;

1370 3180 4930

1990 3050 4120

2100

2860

3840

2220

2860

3500

-10 10 %

2300

2850

3520

2420

2850

3300

dK2/K

dK3/K

I

SENSE0

I

V

SENSE

V

SENSEH

I

SENSEH

K

OL

Current sense ratio

(1)

2

drift

I

3

OUT/ISENSE

Current sense ratio

(1)

3

drift

Analog sense
leakage current

Open load ON state
current detection
threshold

Max analog sense
output voltage

Analog sense output

(2)

voltage in fault
condition

Analog sense output

(2)

current in fault
condition

=3 A; V

I

OUT

V

=0V;

CSD

= -40 °C to 150 °C

T

J

I

= 10A; V

OUT

= -40°C...150°C

T

j

=25°C...150°C

T

j

= 10 A; V

I

OUT

=0V;

V

CSD

SENSE

SENSE

SENSE

= 4 V;

=4V; V

= 4 V;

TJ= -40 °C to 150 °C

I

=0A; V

OUT

V

=5V; VIN=0V; Tj=-40°C...150°C

CSD

=0V; VIN=5V; Tj=-40°C...150°C

V

CSD

=2A; V

I

OUT

=5V; VIN=5V; Tj=-40°C...150°C

V

CSD

SENSE

SENSE

=0V;

=0V;

VIN = 5V, 8V<VCC<18V

= 5 µA

I

SENSE

I

OUT

V

V

CC

CC

= 3A; V

= 13V; R

= 13V; V

= 0V 5

CSD

= 3.9KΩ 8

SENSE

= 5V 9 mA

SENSE

CSD

=0V;

-7 7 %

2690

2830

3060

2700

2830

3020

-4 4 %

0
0

0

1

µA

2

µA

1

µA

530mA

V

Doc ID 13106 Rev 4 11/37

Electrical specifications VN5E025AJ-E

Table 9. Current sense (8V<VCC<18V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Delay response time

t

DSENSE1H

from falling edge of
CS_DIS pin

Delay response time

t

DSENSE1L

from rising edge of
CS_DIS pin

Delay response time

t

DSENSE2H

from rising edge of
INPUT pin

Delay response time
between rising edge

Δ

t

DSENSE2H

of output current
and rising edge of
current sense

Delay response time

t

DSENSE2L

from falling edge of
INPUT pin

1. Parameter guaranteed by design, it is not tested.

2. Fault condition includes: power limitation, overtemperature and open load OFF state detection.

V
I
(see Figure 4)

V
I
(see Figure 4)

V
I
(see Figure 4)

V
I
I
I

V
I
(see Figure 4)

<4V, 0.5<Iout<10A

SENSE

=90% of I

SENSE

<4V, 0.5<Iout<10A

SENSE

=10% of I

SENSE

<4V, 0.5<Iout<10A

SENSE

=90% of I

SENSE

<4V,

SENSE

= 90% of I

SENSE

= 90% of I

OUT

OUTMAX

SENSE

= 3A (see Figure 7)

<4V, 0.5<Iout<10A

SENSE

=10% of I

SENSE max

SENSE max

SENSE max

SENSEMAX,

OUTMAX

SENSE max

40 100

520

80 300

80 250

µs

110

Table 10. Openload detection (8V<VCC<18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Openload Off state

V

OL

t

DSTKON

I

L(off2)r

I

L(off2)f

td_vol

voltage detection
threshold

Output short circuit to
V

detection delay at

CC

turn off

Off state output current at
V

= 4V

OUT

Off state output current at
V

= 2V

OUT

Delay response from
output rising edge to

SENSE

rising edge in

V
open load

VIN = 0V 2 4 V

See Figure 5. 180 1200 µs

=0V; V

V

IN

rising from 0V to 4V

V

OUT

=0V; V

V

IN

V

falling from VCC to 2V

OUT

= 4 V; VIN= 0V

V

OUT

V

SENSE

= 90% of V

=0V

SENSE

SENSE=VSENSEH

SENSEH

-120 0 µA

-50 90 µA

20 µs

12/37 Doc ID 13106 Rev 4

VN5E025AJ-E Electrical specifications

Figure 4. Current sense delay characteristics

INPUT

CS_DIS

LOAD CURRENT

SENSE CURRENT

t

DSENSE2H

t

DSENSE1L

Figure 5. Openload Off-state delay timing

OUTPUT STUCK TO V

V

IN

V

CS

Figure 6. Switching characteristics

V

OUT

t

Won

CC

t

DSTKON

t

Woff

t

DSENSE1H

V

> V

OUT

V

SENSEH

OL

t

DSENSE2L

dV

OUT

INPUT

/dt

(on)

t

d(on)

80%

t

r

10%

90%

t

f

dV

OUT

/dt

(off)

t

t

d(off)

t

Doc ID 13106 Rev 4 13/37

Electrical specifications VN5E025AJ-E

Figure 7. Delay response time between rising edge of ouput current and rising

edge of current sense (CS enabled)

V

IN

Δ

t

DSENSE2H

t

I

OUT

I

SENSE

90% I

OUTMAX

I

OUTMAX

I

SENSEMAX

t

90% I

Figure 8. Output voltage drop limitation

V

cc-Vout

T

=150oC

j

V

on

V

on/Ron(T)

SENSEMAX

T

=25oC

j

T

=-40oC

j

t

I

out

14/37 Doc ID 13106 Rev 4

VN5E025AJ-E Electrical specifications

Figure 9. I

I

/ I

out

sense

4200

3700

3200

2700

2200

17 0 0

/ I

OUT

max Tj = -40 °C to 150 °C

max Tj = 25 °C to 150 °C

min Tj = 25 °C to 150 °C

min Tj = -40 °C to 150 °C

2345 678910

SENSE

vs I

OUT

typical value

I

(A)

OUT

Figure 10. Maximum current sense ratio drift vs load current

dk/k(%)

10

5

0

-5

-10

2345678910

I

OUT

Note: Parameter guaranteed by design; it is not tested.

(A)

Doc ID 13106 Rev 4 15/37

Electrical specifications VN5E025AJ-E

Table 11. Truth table

Conditions Input Output Sense (V

Normal operation

L
H

L

H

CSD

0

Nominal

=0V)

(1)

Overtemperature

Undervoltage

Overload

Short circuit to GND
(power limitation)

Open load OFF state
(with external pull-up)

Short circuit to V

CC

(external pull-up
disconnected)

Negative output voltage
clamp

1. If the V
and external circuit.

is high, the SENSE output is at a high impedance, its potential depends on leakage currents

CSD

L
H

L
H

H

L
L

L
L

X

0

V

SENSEH

0
0

Nominal

(no power limitation)

H

Cycling

V

SENSEH

(power limitation)

L
H

LHV

L
H

L
L

H
H

0

V

SENSEH

SENSEH

V

SENSEH

< Nominal

LL 0

16/37 Doc ID 13106 Rev 4

VN5E025AJ-E Electrical specifications

Table 12. Electrical transient requirements

ISO 7637-2:

2004(E)

Test pulse

Test levels

(1)

Number of

pulses or

III IV Min. Max.

test times

Burst cycle/pulse

repetition time

Delays and
Impedance

1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10Ω

2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2Ω

3a -100V -150V 1h 90ms 100ms 0.1µs, 50Ω

3b +75V +100V 1h 90ms 100ms 0.1µs, 50Ω

4 -6V -7V 1 pulse 100ms, 0.01Ω

(2)

5b

ISO 7637-2:

+65V +87V 1 pulse 400ms, 2Ω

Test level results

2004E

Test pulse

III VI

1C C

2a C C

3a C C

3b C C

4C C

5b

(2)

CC

Class Contents

C All functions of the device performed as designed after exposure to disturbance.

E

1. The above test levels must be considered referred to VCC= 13.5V except for pulse 5b.

2. Valid in case of external load dump clamp: 40V maximum referred to ground.

One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.

Doc ID 13106 Rev 4 17/37

Electrical specifications VN5E025AJ-E

2.4 Waveforms

Figure 11. Normal operation

Normal operation

INPUT

Nominal load Nominal load

I

OUT

V

SENSE

V

CS_DIS

Figure 12. Overload or Short to GND

Overload or Short to GND

INPUT

I

OUT

V

SENSE

V

CS_DIS

I

LimH

>

Power Limitation

I

LimL

Thermal cycling

>

18/37 Doc ID 13106 Rev 4

VN5E025AJ-E Electrical specifications

Figure 13. Intermittent Overload

Intermittent Overload

INPUT

Overload

I

>

LimH

I

>

LimL

I

OUT

V

V

SENSE

V

CS_DIS

SENSEH

>

Figure 14. OFF-State Open Load with external circuitry

OFF-State Open Load

with external circutry

Nominal load

INPUT

V

OUT

I

OUT

V

SENSE

V

CS_DIS

V

t

DSTK(on)

V

> V

OL

V

SENSEH

OUT

>

OL

Doc ID 13106 Rev 4 19/37

Electrical specifications VN5E025AJ-E

Figure 15. Short to V

V

OUT

I

OUT

V

CS_DIS

CC

Resistive

Short to V

V

OL

t

DSTK(on)

CC

Short to V

CC

Hard

Short to V

V

> V

OUT

t

DSTK(on)

CC

OL

Figure 16. TJ evolution in Overload or Short to GND

TJ evolution in

Overload or Short to GND

INPUT

T

I

OUT

J

I

Self-limitation of fast thermal transients

T

J_START

Power Limitation

>

LimH

T

TSD

T

R

T

< I

HYST

LimL

20/37 Doc ID 13106 Rev 4

VN5E025AJ-E Electrical specifications

2.5 Electrical characteristics curves

Figure 17. Off state output current Figure 18. High level input current

Figure 19. Input clamp level Figure 20. Input low level

Iloff (nA)

1500

1200

900

600

300

0

-50 -25 0 25 50 75 100 125 150 175

Off State
Vcc=13V

Vin=Vout=0V

Tc (°C)

Vicl (V)

7

6,8

6,6

6,4

6,2

lin=1mA

6

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Iih (µA)

5

4,5

3,5

2,5

1,5

Vin=2.1V

4

3

2

1

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vil (V)

2

1,8

1,6

1,4

1,2

1

0,8

0,6

0,4

0,2

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 21. Input high level Figure 22. Input hysteresis voltage

Vih (V)

4

3,5

3

2,5

2

1,5

1

0,5

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vihyst (V)

1

0,9

0,8

0,7

0,6

0,5

0,4

0,3

0,2

0,1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Doc ID 13106 Rev 4 21/37

Electrical specifications VN5E025AJ-E

Figure 23. On state resistance vs T

Figure 25. Undervoltage shutdown Figure 26. Turn-On voltage slope

case

Ron (mOhm)

80

60

40

20

0

-50 -25 0 25 50 75 100 125 150 175

Vusd (V)

8

7

6

5

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Iout= 3A
Vcc=13V

Tc (°C)

Tc (°C)

Figure 24. On state resistance vs V

Ron (mOhm)

60

50

40

30

20

10

0

0 5 10 15 20 25 30 35 40

Vcc (V)

(dVout/dt )On (V/ms)

700

600

500

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Vcc=13V

RI=4.3 Ohm

Tc (°C)

CC

Tc=150°C

Tc=125°C

Tc=25°C

Tc=-40°C

Figure 27. I

vs T

LIMH

case

Ilimh (A)

80

Vcc=13V

70

60

50

40

-50 -25 0 25 50 75 100 125 150 175

Figure 28. Turn-Off voltage slope

(dVout/dt )Off (V/ms)

400

350

300

250

200

150

100

50

Tc (°C)

22/37 Doc ID 13106 Rev 4

Vcc=13V

RI= 4.3 Ohm

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

VN5E025AJ-E Electrical specifications

Figure 29. CS_DIS high level voltage Figure 30. CS_DIS clamp voltage

Figure 31. CS_DIS low level voltage

Vcsdh (V)

4

3,5

3

2,5

2

1,5

1

0,5

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vcsdcl(V)

10

9

Iin = 1 mA

8

7

6

5

4

3

2

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vcsdl (V)

3

2,5

2

1,5

1

0,5

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Doc ID 13106 Rev 4 23/37

Application information VN5E025AJ-E

3 Application information

Figure 32. Application schematic

+5V

V

CC

R

prot

Μ

CU

R

prot

CS_DIS

IINPUT

OUTPUT

D

ld

R

prot

C

ext

CURRENT SENSE

R

SENSE

GND

R

GND

GND

D

GND

V

3.1 GND protection network against reverse battery

This section provides two solutions for implementing a ground protection network against
reverse battery.

3.1.1 Solution 1: resistor in the ground line (R

This can be used with any type of load.

The following show how to dimension the R

1. R

2. R

where -I

≤ 600mV / (I

GND

≥ (−VCC) / (-I

GND

is the DC reverse ground pin current and can be found in the absolute

GND

S(on)max

GND

)

)

maximum rating section of the device datasheet.

GND

resistor:

GND

only)

Power dissipation in R

P

= (-VCC)2/R

D

GND

(when VCC<0 during reverse battery situations) is:

GND

This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.

Please note that, if the microprocessor ground is not shared by the device ground, then the
R

produces a shift (I

GND

S(on)max

24/37 Doc ID 13106 Rev 4

* R

) in the input thresholds and the status output

GND

S(on)max

becomes the sum of the

VN5E025AJ-E Application information

values. This shift varies depending on how many devices are ON in the case of several high
side drivers sharing the same R

GND

.

If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.

3.1.2 Solution 2: diode (D

Note that a resistor (R

GND

) in the ground line

GND

=1kΩ) should be inserted in parallel to D

an inductive load.

This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V

max DC rating. The same applies if the device is subject to transients on the VCC line

CC

that are greater than the ones shown in the ISO 7637-2: 2004(E) table.

3.3 MCU I/O protection

If a ground protection network is used and negative transients are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (R
the µC I/O pins from latching up.

The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:

if the device drives

GND

) in line to prevent

prot

-V

CCpeak/Ilatchup

≤ R

prot

Calculation example:

For V

5kΩ ≤ R

CCpeak

prot

≤ 180kΩ

= - 100V and I

Recommended values: R

≤ (V

OHμC-VIH-VGND

≥ 20mA; V

latchup

=10kΩ, C

prot

Doc ID 13106 Rev 4 25/37

EXT

) / I

IHmax

OHµC

=10nF.

≥ 4.5V

Application information VN5E025AJ-E

3.4 Current sense and diagnostic

The current sense pin performs a double function (see Figure 33: Current sense and

diagnostic):

● Current mirror of the load current in normal operation, delivering a current

proportional to the load one according to a know ratio K
The current I
external resistor R
minimum (see parameter V

can be easily converted to a voltage V

SENSE

. Linearity between I

SENSE

SENSE

in Table 9: Current sense (8V<VCC<18V)). The

OUT

and V

current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8V<VCC<18V)).

● Diagnostic flag in fault conditions, delivering a fixed voltage V

maximum current I

SENSEH

in case of the following fault conditions (refer to Tr ut h t a bl e):

– Power limitation activation

– Over-temperature

–Short to V

in OFF state

CC

– Open load in OFF state with additional external components.

A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.

.

X

SENSE

by means of an

SENSE

is ensured up to 5V

SENSEH

up to a

Figure 33. Current sense and diagnostic

41V

Overtemperature

Pwr_Lim

SENSEH

CS_DIS

To uC ADC

I

OUT/KX

R

PROT

R

SENSE

I

SENSEH

CURRENT

SENSEn

V

SENSE

V

OL OFF

INPUTn

Main MOSn

+

-

GND

V

PU_CMD

R

I

Loff2r

I

Loff2f

R

PU

PU

Load

PD

V

BAT

V

CC

V

OL

OUTn

26/37 Doc ID 13106 Rev 4

VN5E025AJ-E Application information

3.4.1 Short to VCC and OFF state open load detection

Short to V

A short circuit between V
V

SENSEH

during the on state depending on the nature of the short circuit.

OFF state open load with external circuitry

CC

and output is indicated by the relevant current sense pin set to

CC

during the device off state. Small or no current is delivered by the current sense

Detection of an open load in off mode requires an external pull-up resistor R
the output to a positive supply voltage V

It is preferable V

to be switched off during the module stand-by mode in order to avoid the

PU

PU

.

connecting

PU

overall stand-by current consumption to increase in normal conditions, i.e. when load is
connected.

An external pull down resistor R

connected between output and GND is mandatory to

PD

avoid misdetection in case of floating outputs in off state (see Figure 33: Current sense and

diagnostic).

R

must be selected in order to ensure V

PD

OUT < VOLmin

unless pulled up by the external

circuitry:

VVIRV

2

=<⋅=

OLfoffLPD

min)2(

R

≤ 22 KΩ is recommended.

PD

OUT

−

OFFupPull

_

For proper open load detection in off state, the external pull-up resistor must be selected
according to the following formula:

IRRVR

⋅⋅−⋅

V

OUT

−

=

ONupPull

_

RR

+

PDPU

roffLPDPUPUPD

)2(

OL

max

VV

4

=>

For the values of V

(8V<VCC<18V).

OLmin ,VOLmax, IL(off2)r

Doc ID 13106 Rev 4 27/37

and I

see Table 10: Openload detection

L(off2)f

Application information VN5E025AJ-E

3.5 Maximum demagnetization energy (V

Figure 34. Maximum turn off current versus inductance

100

B

10

I (A)

1

0,1 1 10 100L (mH)

A

C

=13.5V)

CC

A: T

B: T

C: T

VIN, I

= 150°C single pulse

jstart

= 100°C repetitive pulse

jstart

= 125°C repetitive pulse

jstart

L

Demagnetization Demagnetization Demagnetization

Note: Values are generated with R

In case of repetitive pulses, T
must not exceed the temperature specified above for curves A and B.

=0Ω.

L

(at beginning of each demagnetization) of every pulse

jstart

t

28/37 Doc ID 13106 Rev 4

VN5E025AJ-E Package and PC board thermal data

4 Package and PC board thermal data

4.1 PowerSSO-12 thermal data

Figure 35. PowerSSO-12 PC board

Note: Layout condition of R

area= 77mm x 86mm, PCB thickness=1.6mm, Cu thickness=70µm (front and back side),
Copper areas: from minimum pad lay-out to 8cm

Figure 36. R

RTHj_amb(°C/ W)

thj-amb

65

60

55

50

45

40

35

30

and Zth measurements (PCB: Double layer, Thermal Vias, FR4

th

2

).

vs PCB copper area in open box free air condition

0246810

PCB Cu heatsink area (cm^2)

Doc ID 13106 Rev 4 29/37

Package and PC board thermal data VN5E025AJ-E

Figure 37. PowerSSO-12 thermal impedance junction ambient single pulse

ZTH (° C/ W)

100

Footprint

2 cm

8 cm

2

2

10

1

0,1

0,0001 0,001 0,01 0,1 1 10 100 1000

Time ( s)

Figure 38. Thermal fitting model of a single channel HSD in PowerSSO-12

Equation 1: pulse calculation formula:

Z

where

THδ

RTHδ Z

δ tpT⁄=

THtp

1 δ–()+⋅=

30/37 Doc ID 13106 Rev 4

VN5E025AJ-E Package and PC board thermal data

Table 13. Thermal parameter

Area/island (cm2)Footprint28

R1 (°C/W) 0.3

R2 (°C/W) 1.3

R3 (°C/W) 4

R4 (°C/W) 8 8 7

R5 (°C/W) 22 15 10

R6 (°C/W) 26 20 15

C1 (W.s/°C) 0.001

C2 (W.s/°C) 0.003

C3 (W.s/°C) 0.05

C4 (W.s/°C) 0.2 0.1 0.1

C5 (W.s/°C) 0.27 0.8 1

C6 (W.s/°C) 3 6 9

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Package and packing information VN5E025AJ-E

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. ECOPACK
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.

ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com.

®

packages are lead-free. The category of Second Level Interconnect

5.2 PowerSSO-12 mechanical data

Figure 39. PowerSSO-12 package dimensions

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VN5E025AJ-E Package and packing information

Table 14. PowerSSO-12 mechanical data

Dimension

Min. Typ. Max.

A 1.250 1.620

A1 0.000 0.100

A2 1.100 1.650

B 0.230 0.410

C 0.190 0.250

D 4.800 5.000

E 3.800 4.000

e 0.800

H 5.800 6.200

h 0.250 0.500

L 0.400 1.270

Millimeters

k0º 8º

X 1.900 2.500

Y 3.600 4.200

ddd 0.100

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Package and packing information VN5E025AJ-E

5.3 Packing information

Figure 40. PowerSSO-12 tube shipment (no suffix)

B

A

Figure 41. PowerSSO-12

Base Q.ty 100

C

Bulk Q.ty 2000
Tube length (± 0.5) 532
A 1.85
B 6.75
C (± 0.1) 0.6

All dimensions are in mm.

tape and reel shipment (suffix “TR”)

REEL DIMENSIONS

Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4

TAPE DIMENSIONS

According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986

Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.05) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.1) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

Top

cover

tape

End

500mm min

Empty components pockets
saled with cover tape.

User direction of feed

Start

No componentsNo components Components

500mm min

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VN5E025AJ-E Order codes

6 Order codes

Table 15. Device summary

Package

Tube Tape and reel

PowerSSO-12 Root part number 2 VN5E025AJTR-E

Order codes

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Revision history VN5E025AJ-E

7 Revision history

Table 16. Document revision history

Date Revision Changes

24-Jan-2006 1 Initial release.

15-Jan-2007 2

Reformatted.
Section 4.1 restructured.

Document reformatted and restructured.
Changed max. operating voltage value from 36V to 28V.
Changed Description on cover page.

Table 6.: Switching characteristics (VCC=13V, Tj=25°C): added

typical values.
Updated Table 9.: Current sense (8V<VCC<18V):
– changed V

max. value from 16 V to 18 V

CC

– added K, dK/K values
– added I
– changed V

parameter

OL

SENSEH typical value from 9 V to 8 V.

– changed ISENSEH typical value from 8 mA to 9 mA.

01-Apr-2008 3

– changed t
– changed t
– changed t
– added Δt

DSENSE1H typical value from 50 µs to 40 µs.
DSENSE2L typical value from 100 µs to 80 µs.

DSENSE2H

DSENSE2H

typical value from 70 µs to 80 µs

parameter
Updated Table 10.: Openload detection (8V<VCC<18V):
– added I

L(off2)r

, I

and td_vol parameters

L(off2)f

Added Figure 9.: IOUT / ISENSE vs IOUT.
Added Figure 10.: Maximum current sense ratio drift vs load current
Added Section 2.4: Waveforms.
Added Section 2.5: Electrical characteristics curves.
Updated Section 3: Application information:
– added Section 3.4: Current sense and diagnostic
Added Section 4.1: PowerSSO-12 thermal data.

10-May-2010 4 Updated Figure 9: IOUT / ISENSE vs IOUT

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VN5E025AJ-E

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Doc ID 13106 Rev 4 37/37