Datasheet VN5160S-E Datasheet (ST)

Features

VN5160S-E

Single-channel high side driver for automotive applications

Max supply voltage V

Operating voltage range V

Max on-state resistance (per ch.) R

Current limitation (typ) I

Off-state supply current I

1. Typical value with all loads connected

■ Main

CC

CC

ON

LIMH

S

4.5 to 36V

– Inrush current active management by

power limitation
– Very low stand-by current
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC

european directive

■ Diagnostic Functions

– Open drain status output
– On-state open load detection
– Off-state open load detection
– Thermal shutdown indication

■ Protection

– Undervoltage shutdown
– Overvoltage clamp
– Output stuck to Vcc detection
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

CC

– Thermal shutdown

Table 1. Device summary

41V

160 mΩ

5.4 A

(1)

2 µA

SO-8

– Reverse battery protection (see Figure 28)
– Electrostatic discharge protection

Applications

■ All types of resistive, inductive and capacitive

loads

Description

The VN5160S-E is a monolithic device made
using STMicroelectronics VIPower M0-5
technology. It is intended for driving resistive or
inductive loads with one side connected to
ground. Active V
device against low energy spikes.The device
detects open load condition both in on and off­state, when STAT_DIS is left open or driven low.
Output shorted to V
When STAT_DIS is driven high, STATUS is in a
high impedance condition. Output current
limitation protects the device in overload
condition. In case of long duration overload, the
device limits the dissipated power to safe level up
to thermal shutdown intervention. Thermal
shutdown with automatic restart allows the device
to recover normal operation as soon as fault
condition disappears.

voltage clamp protects the

CC

is detected in the off-state.

CC

Order codes

Package

Tub e Tap e a nd reel

SO-8 VN5160S-E VN5160STR-E

November 2009 Doc ID 13493 Rev 4 1/32

www.st.com

1

Contents VN5160S-E

Contents

1 Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 20

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 20

3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 21

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.4 Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

2/31 Doc ID 13493 Rev 4

VN5160S-E List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Pins function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 5. Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 7. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 8. Status pin (V

Table 9. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 10. Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 11. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 13. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 14. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 15. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 16. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 17. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

SD

Doc ID 13493 Rev 4 3/31

List of figures VN5160S-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 5. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 8. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 10. High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 11. Input high-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 12. Input low-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 13. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 14. Status low-output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 15. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 16. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 17. On-state resistance vs T
Figure 18. On-state resistance vs V

Figure 19. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 20. Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 23. I

LIM

vs T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

case

Figure 24. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 25. STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 26. High-level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 27. Low-level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 28. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 29. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 30. Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 31. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 32. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 33. SO-8 Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 34. Thermal fitting model of a single-channel HSD in SO-8

Figure 35. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 36. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 37. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

CC

(1)

. . . . . . . . . . . . . . . . . . . . . . . . . 25

4/31 Doc ID 13493 Rev 4

VN5160S-E Block diagram and pins description

1 Block diagram and pins description

Figure 1. Block diagram

V

CC

V

CC

CLAMP

UNDERVOLTAGE

GND

INPUT

LOGIC

STATUS

STAT_DIS

Table 2. Pins function

Name Function

V

CC

OUTPUT Power output.

GND

INPUT

Battery connection.

Ground connection. Must be reverse battery protected by an external
diode/resistor network.

Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.

DRIVER

OPENLOAD ON

OPENLOAD OFF

OVERTEM P.

Pwr

LIM

PwCLAMP

I

LIM

V

DSLIM

STATUS Open drain digital diagnostic pin.

STAT_DIS Active high CMOS compatible pin, to disable the STATUS pin.

Doc ID 13493 Rev 4 5/31

Block diagram and pins description VN5160S-E

Figure 2. Configuration diagram (top view)

V

CC

OUTPUT
OUTPUT

V

CC

5
6

8

7

4
3
2

1

STAT_DIS
STATUS
INPUT
GND

SO-8

Table 3. Suggested connections for unused and N.C. pins

Connection / Pin Status N.C. Output Input STAT_DIS

Floating X X X X X

To ground N.R.

1. Not recommended.

(1)

XN.R.

Through 10KΩ

resistor

Through 10KΩ

resistor

6/31 Doc ID 13493 Rev 4

VN5160S-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

CC

V

CC

V

F

I

SD

V

SD

I

IN

INPUT

V

INn

Note: V

F

= V

- VCC during reverse battery condition.

OUT

2.1 Absolute maximum ratings

Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in this section for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality documents.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

GND

OUTPUTSTAT_DIS

STATUS

I

GND

I

OUT

I

STAT

V

STAT

V

OUT

V

CC

- V

CC

- I

GND

I

OUT

- I

OUT

I

IN

I

STAT

I

STAT_DIS

E

MAX

DC supply voltage 41 V

Reverse DC supply voltage 0.3 V

DC reverse ground pin current 200 mA

DC output current

Internally

limited

A

Reverse DC output current 6 A

DC input current +10 / -1 mA

DC status current +10 / -1 mA

DC status disable current +10 / -1 mA

Maximum switching energy (single pulse)
(L= 12mH; R

= 0Ω; V

L

=13.5V; T

bat

jstart

=150ºC; I

OUT

= I

limL

(Typ.))

34 mJ

Doc ID 13493 Rev 4 7/31

Electrical specifications VN5160S-E

Table 4. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Electrostatic discharge (Human Body Model: R=1.5KΩ; C=100pF)

V

V

– INPUT

–STATUS

ESD

–STAT_DIS

–OUTPUT

–V

CC

Charge device model (CDM-AEC-Q100-011) 750 V

ESD

Junction operating temperature -40 to 150 °C

T

j

4000
4000
4000
5000
5000

V
V
V
V
V

T

Storage temperature -55 to 150 °C

stg

2.2 Thermal data

Table 5. Thermal data

Symbol Parameter Value Unit

R

thj-pins

R

thj-amb

Thermal resistance junction-pins (MAX) 30 °C/W

Thermal resistance junction-ambient (MAX) See Figure 32

°C/W

8/31 Doc ID 13493 Rev 4

VN5160S-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8V<VCC<36V; -40°C<Tj<150°C, unless otherwise
stated.

Table 6. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

USDhyst

R

ON

V

clamp

I

L(off1)

I

L(off2)

1. Guaranteed by design/characterization

2. PowerMOS leakage included

Operating supply

CC

voltage

Undervoltage shutdown 3.5 4.5 V

USD

Undervoltage shutdown
hysteresis

(1)

On-state resistance

Clamp voltage IS= 20mA 41 46 52 V

I

Supply current

S

Off-state output

(2)

current

Output - VCC diode

V

F

voltage

4.5 13 36 V

0.5 V

I

=1A; Tj=25°C

OUT

=1A; Tj=150°C

I

OUT

=1A; VCC=5V; Tj=25°C

I

OUT

Off-state; V
Tj=25°C;

On-state; V
I

=0A

OUT

VIN=V

OUT

V

IN=VOUT

VIN= 0V; V

-I

= 0.6A; Tj= 150°C 0.7 V

OUT

=13V; VIN=V

CC

=13V; VIN=5V;

CC

OUT

=0V;

=0V; VCC=13V; Tj=25°C
=0V; VCC=13V; Tj=125°C00

= 4V -75 0

OUT

(2)

2

1.9

0.01 3

160
320
210

(1)(2)

5

3.5µAmA

5

mΩ
mΩ
mΩ

µA

Table 7. Switching (VCC=13V; Tj= 25°C)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Turn-on delay time RL= 13Ω (see Figure 6)10µs

Turn-off delay time RL= 13Ω (see Figure 6)15µs

/dt

Turn-on voltage slope RL= 13Ω See Figure 21 V/µs

(on)

/dt

Turn-off voltage slope RL= 13Ω See Figure 22 V/µs

(off)

Switching energy
losses during t

won

Switching energy
losses during t

woff

RL= 13Ω (see Figure 6)0.04mJ

RL= 13Ω (see Figure 6)0.04mJ

Doc ID 13493 Rev 4 9/31

dV

dV

t

d(on)

t

d(off)

OUT

OUT

W

W

ON

OFF

Electrical specifications VN5160S-E

Table 8. Status pin (VSD=0)

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

STAT

I

LSTAT

C

STAT

V

SCL

Table 9. Protection

Status low output voltage I

Status leakage current

Status pin input
capacitance

Status clamp voltage

(1)

= 1.6 mA, VSD= 0V 0.5 V

STAT

Normal operation or V
V

= 5V

STAT

SD

= 5V,

Normal operation or VSD=5V,
V

= 5V

STAT

I

STAT

I

STAT

= 1mA
= - 1mA

5.5

-0.7

10 µA

100 pF

7V

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

I

T

T

T

t

DC short circuit current

limH

Short circuit current during

limL

thermal cycling

Shutdown temperature 150 175 200 °C

TSD

Reset temperature

T

R

Thermal reset of STATUS 135 °C

RS

Thermal hysteresis (T

HYST

Status delay in overload

SDL

conditions

TSD-TR

VCC= 13V
5V<VCC<36V

V

= 13V; TR<Tj<T

CC

)

T

j>TTSD

TSD

3.8 5.4 7.5

2A

TRS + 1

TRS + 5 °C

7°C

7.5

20 µs

V

A
A

V

DEMAG

V

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related

Turn-off output voltage
clamp

Output voltage drop

ON

limitation

diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

=150mA; VIN=0 VCC-41 VCC-46 VCC-52 V

I

OUT

I

= 0.03A;

OUT

=-40°C...+150°C

T

j

25 mV

(see Figure 5)

10/31 Doc ID 13493 Rev 4

VN5160S-E Electrical specifications

Table 10. Openload detection

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

OL

t

DOL(on)

Openload on-state
detection threshold

Openload on-state
detection delay

VIN = 5V, 8V<VCC<18V 10

= 0A, VCC=13V

I

OUT

(see Figure 4)

See

Figure 19

40 mA

200 µs

Delay between INPUT falling

t

POL

edge and STATUS rising

I

= 0A (see Figure 4) 200 500 1000 µs

OUT

edge in openload condition

V

t

DSTKON

Table 11. Logic input

Openload off-state voltage

OL

detection threshold

Output short circuit to Vcc
detection delay at turn-off

= 0V, 8V<VCC<16V 2

V

IN

(see Figure 4) 180 t

See

Figure 20

4V

POL

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

I(hyst)

V

V

I

SDL

V

I

SDH

V

SD(hyst)

V

SDCL

Input low level voltage 0.9 V

IL

Low level input current VIN= 0.9V 1 µA

I

IL

Input high level voltage 2.1 V

IH

I

High level input current VIN= 2.1V 10 µA

IH

Input hysteresis voltage 0.25 V

I

= 1mA

Input clamp voltage

ICL

STAT_DIS low level voltage 0.9 V

SDL

Low level STAT_DIS current V

STAT_DIS high level voltage 2.1 V

SDH

High level STAT_DIS current V

IN

= -1mA

I

IN

= 0.9V 1 µA

CSD

= 2.1V 10 µA

CSD

5.5

-0.7

STAT_DIS hysteresis voltage 0.25 V

STAT_DIS clamp voltage

I

SD

I

SD

= 1mA
= -1mA

5.5

-0.7

7V

7V

µs

V

V

Doc ID 13493 Rev 4 11/31

Electrical specifications VN5160S-E

Figure 4. Status timings

OPEN LOAD STATUS TIMING (without external pull-up)

I

< I

OUT

OL

V

< V

OUT

OL

t

POL

V

V

IN

STAT

t

DOL(on)

OUTPUT STUCK TO Vcc

I

> I

OUT

OL

V

t

DSTKON

OUT

> V

OL

V

V

IN

STAT

t

DOL(on)

Figure 5. Output voltage drop limitation

OPEN LOAD STATUS TIMING (with external pull-up)

I

< I

OUT

V

IN

V

STAT

t

DOL(on)

OL

V

OUT

OVER TEMP STATUS TIMING

Tj > T

V

V

IN

STAT

t

SDL

TSD

t

SDL

> V

OL

Vcc-V

out

Tj=150oC

V

on

Von/R

on(T)

T

=25oC

j

=-40oC

T

j

I

out

12/31 Doc ID 13493 Rev 4

VN5160S-E Electrical specifications

Table 12. Truth table

Conditions INPUT OUTPUT STATUS (VSD=0V)

(1)

Normal operation

Current limitation

Overtemperature

Undervoltage

Output voltage > V

Output current < I

1. If the VSD is high, the STATUS pin is in a high impedance.

2. The STATUS pin is low with a delay equal to t

3. The STATUS pin becomes high with a delay equal to t

OL

OL

L
H

L
H

L
H

L
H

L
H

L
H

after INPUT falling edge.

DSTKON

POL

Figure 6. Switching characteristics

V

OUT

t

Won

L

H

L

X

L
L

L
L

H
H

L

H

after INPUT falling edge.

t

Woff

H
H

H
H

H
L

X
X

(2)

L

H

(3)

H

L

dV

OUT

INPUT

/dt

(on)

t

d(on)

80%

t

90%

dV

/dt

OUT

(off)

r

10%

t

f

t

t

d(off)

t

Doc ID 13493 Rev 4 13/31

Electrical specifications VN5160S-E

Table 13. Electrical transient requirements (part 1/3)

ISO 7637-2:

Test levels

2004(E)

Test pul s e

III IV

1 -75V -100V 5000 pulses 0.5 s 5 s 2 ms, 10 Ω

2a +37V +50V 5000 pulses 0.2 s 5 s 50 µs, 2 Ω

3a -100V -150V 1h 90 ms 100 ms 0.1 µs, 50 Ω

3b +75V +100V 1h 90 ms 100 ms 0.1 µs, 50 Ω

Number of

pulses or

test times

Burst cycle/pulse

repetition time

Delays and
impedance

4-6V-7V1 pulse

(1)

5b

1. Valid in case of external load dump clamp: 40V maximum referred to ground.

Table 14. Electrical transient requirements (part 2/3)

ISO 7637-2:

+65V +87V 1 pulse 400 ms, 2 Ω

Test level results

(1)

100 ms,

0.01Ω

2004(E)

Test pul s e

III IV

1C C

2a C C

3a C C

3b C C

4C C

(2)

5b

1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.

2. Valid in case of external load dump clamp: 40V maximum referred to ground.

CC

Table 15. Electrical transient requirements (part 3/3)

Class Contents

C All functions of the device are performed as designed after exposure to disturbance.

E

One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.

14/31 Doc ID 13493 Rev 4

VN5160S-E Electrical specifications

Figure 7. Waveforms

NORMAL OPERATION

INPUT

STAT_DIS

LOAD CURRENT

STATUS

UNDERVOLTAGE

V

V

CC

INPUT
STAT_DIS

LOAD CURRENT

STATUS

INPUT

STAT_DIS

LOAD VOLTAGE

STATUS

V

USD

OPEN LOAD with external pull-up

V

OL

USDhyst

undefined

V

OUT>VOL

INPUT

STAT_DIS

LOAD VOLTAGE

LOAD CURRENT

STATUS

INPUT

STAT_DIS

LOAD VOLTAGE

STATUS

T

j

T

INPUT

STAT_DIS

LOAD CURRENT

STATUS

OPEN LOAD without external pull-up

I

OUT<IOL

t

POL

RESISTIVE SHORT TO Vcc, NORMAL LOAD

I

OUT>IOL

t

DSTKON

V

OUT>VOL

V

OL

OVERLOAD OPERATION

T

TSD

R

T

RS

I

LIMH

I

LIML

current

limitation

power
limitation

thermal cycling

SHORTED LOAD NORMAL LOAD

Doc ID 13493 Rev 4 15/31

Electrical specifications VN5160S-E

2.4 Electrical characteristics curves

Figure 8. Off-state output current Figure 9. Input clamp voltage

Iloff[nA]

600

500

Tc (°C)

Of f-s tate
Vcc=13V

Vin=Vout=0V

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Vicl[V]

7.0

6.8

6.6

Iin = 1 mA

6.4

6.2

6.0

5.8

5.6

5.4

5.2

5.0

-50 - 25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 10. High-level input current Figure 11. Input high-level voltage

Iih[µA]

5.0

4.5

4.0

3.5

3.0

Vin = 2.1V

2.5

2.0

1.5

1.0

0.5

0.0

-50 - 25 0 25 50 75 100 125 150 175

Tc (°C)

Vih[V]

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 12. Input low-level voltage Figure 13. Input hysteresis voltage

Vil[V]

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

16/31 Doc ID 13493 Rev 4

Vihyst[V]

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

VN5160S-E Electrical specifications

Figure 14. Status low-output voltage Figure 15. Status leakage current

Vstat[V]

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

-50 -25 0 25 50 75 100 125 150 175

Istat = 1.6mA

Tc (°C)

Ilstat[µA]

0.075

0.065

0.055

0.045

0.035

0.025

0.015

-50 -25 0 25 50 75 100 125 150 175

Vs tat = 5V

Tc (°C)

Figure 16. Status clamp voltage Figure 17. On-state resistance vs T

Vscl[V]

9.0

8.5

8.0

7.5

7.0

6.5

6.0

5.5

5.0

4.5

4.0

-50 -25 0 25 50 75 100 125 150 175

Istat = 1mA

Tc (°C)

Ro nl[ m Oh m ]

300

250

200

150

100

50

0

-50 -25 0 25 50 75 100 125 150 175

Iout = 1A
Vcc = 13V

Tc (°C)

case

Figure 18. On-state resistance vs V

Ro nl[ m Oh m ]

300

275

250

225

200

175

150

125

100

75

50

0 5 10 15 20 25 30 35 40

Vcc[V]

CC

Tc = 150°C

Tc = 125°C

Tc = 25°C

Tc = -40°C

Doc ID 13493 Rev 4 17/31

Figure 19. Open-load on-state detection

threshold

Iol[m A]

100

90

80

70

60

50

40

30

20

10

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Electrical specifications VN5160S-E

Figure 20. Open-load off-state voltage

Figure 21. Turn-on voltage slope

detection threshold

Vol[V]

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

-50 -25 0 25 50 75 100 125 150 175

Vin = 0V

Tc (°C)

(dVout/dt)on[V/ms ]

1000

900

800

700

600

500

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Figure 22. Turn-off voltage slope Figure 23. I

(dVout/dt)off[V/ms]

1000

900

800

700

600

500

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Vcc = 13V
RL = 13 Oh m

Tc (°C)

Ilimh[A]

16

14

12

10

8

6

4

2

0

-50 -25 0 25 50 75 100 125 150 175

LIM

Vcc = 13V
RL = 13 Oh m

vs T

Vcc = 13V

Tc (°C)

case

Tc (°C)

Figure 24. Undervoltage shutdown Figure 25. STAT_DIS clamp voltage

Vusd[V]

16

14

12

10

8

6

4

2

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

18/31 Doc ID 13493 Rev 4

Vsdcl[V]

8.0

7.5

7.0

6.5

6.0

5.5

5.0

4.5

4.0

-50 -25 0 25 50 75 100 125 150 175

Ini = 1 mA

Tc (°C)

VN5160S-E Electrical specifications

Figure 26. High-level STAT_DIS voltage Figure 27. Low-level STAT_DIS voltage

VsdH[V]

8

7

6

5

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

VsdL[V]

8

7

6

5

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Doc ID 13493 Rev 4 19/31

Application Information VN5160S-E

3 Application Information

Figure 28. Application schematic

+5V

R

R

µC

R

prot

prot

prot

+5V

STAT_DIS

INPUT

STATUS

V

GND

GND

R

GND

V

CC

OUTPUT

D

GND

3.1 GND protection network against reverse battery

3.1.1 Solution 1: resistor in the ground line (R

GND

only)

D

ld

This can be used with any type of load.

The following is an indication on how to dimension the R

1. R

2. R

where -I

≤ 600mV / (I

GND

≥ (−VCC) / (-I

GND

is the DC reverse ground pin current and can be found in the absolute

GND

S(on)max

GND

)

)

maximum rating section of the device datasheet.

Power dissipation in R

P

= (-VCC)2/ R

D

GND

(when VCC<0: during reverse battery situations) is:

GND

This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum On-state currents of the different devices.

Please note that if the microprocessor ground is not shared by the device ground then the
R

will produce a shift (I

GND

S(on)max

* R

) in the input thresholds and the status output

GND

values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same R

GND

.

If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).

20/31 Doc ID 13493 Rev 4

resistor.

GND

S(on)max

becomes the sum of the

VN5160S-E Application Information

3.1.2 Solution 2: a diode (D

A resistor (R

=1kΩ) should be inserted in parallel to D

GND

GND

inductive load.

This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V

max DC rating. The same applies if the device is subject to transients on the VCC line

CC

that are greater than the ones shown in the ISO 7637-2: 2004(E) table.

3.3 MCU I/Os protection

If a ground protection network is used and negative transient are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (R
prevent the µC I/Os pins to latch-up.

The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os.

) in the ground line

if the device drives an

GND

prot

) in line to

-V

CCpeak/Ilatchup

≤ R

prot

≤ (V

OHμC-VIH-VGND

) / I

Calculation example:

For V

5kΩ ≤ R

Recommended R

CCpeak

prot

≤ 180kΩ.

= - 100V and I

values is 10kΩ.

prot

latchup

≥ 20mA; V

OHµC

3.4 Open load detection in off-state

Off-state open load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (V
microprocessor.

The external resistor has to be selected according to the following requirements:

1. no false open load indication when load is connected: in this case we have to avoid
V

to be higher than V

OUT

V

= (VPU/(RL+RPU))RL<V

OUT

; this results in the following condition

Olmin

Olmin

.

2. no misdetection when load is disconnected: in this case the V
V

Because I
up resistor R

; this results in the following condition RPU<(VPU–V

OLmax

may significantly increase if V

s(OFF)

should be connected to a supply that is switched OFF when the module is in

PU

standby.

PU

IHmax

≥ 4.5V

) like the +5V line used to supply the

has to be higher than

out

)/I

OLmax

is pulled high (up to several mA), the pull-

out

L(off2)

.

Doc ID 13493 Rev 4 21/31

Application Information VN5160S-E

The values of V

OLmin

, V

OLmax

and I

are available in the Electrical characteristics

L(off2)

section.

Figure 29. Open-load detection in off-state

CC

V

INPUT

STATUS

DRIVER

+

LOGIC

+

-

VOL

GROUND

V batt. VPU

L(off2)

I

OUT

R

R

PU

RL

22/31 Doc ID 13493 Rev 4

VN5160S-E Application Information

3.5 Maximum demagnetization energy (VCC = 13.5V)

Figure 30. Maximum turn-off current versus inductance

10

A

B

C

1

I (A)

0,1

0,1 1 10 100L (mH)

A: T

B: T

C: T

, I

V

IN

L

= 150°C single pulse

jstart

= 100°C repetitive pulse

jstart

= 125°C repetitive pulse

jstart

Demagnetization Demagnetization Demagnetization

Note: Values are generated with R

demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.

=0 Ω.In case of repetitive pulses, T

L

(at beginning of each

jstart

t

Doc ID 13493 Rev 4 23/31

Package and PCB thermal data VN5160S-E

4 Package and PCB thermal data

4.1 SO-8 thermal data

Figure 31. SO-8 PC board

Note: Layout condition of R

thickness=2 mm, Cu thickness= 35 µm, Copper areas: from minimum pad lay-out to 2 cm

Figure 32. R

RTHj_amb(°C/W)

thj-amb

110

100

90

80

70

60

0 0.5 1 1.5 2 2.5

and Zth measurements (PCB: FR4 area= 4.8 mm x 4.8 mm, PCB

th

vs PCB copper area in open box free air condition

2

).

PCB Cu heatsink area (cm^2)

24/31 Doc ID 13493 Rev 4

VN5160S-E Package and PCB thermal data

Figure 33. SO-8 Thermal impedance junction ambient single pulse

ZT H (°C / W)

1000

Footprint

100

2 cm

2

10

1

0.1

0.0001 0.001 0.01 0.1 1 10 100 1000

Time (s)

Equation 1: pulse calculation formula

Z

THδ

where δ = t

Figure 34. Thermal fitting model of a single-channel HSD in SO-8

R

TH

P

δ Z

/T

THtp

1 δ–()+⋅=

(1)

1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded

protections (power limitation or thermal cycling during thermal shutdown) are not triggered.

Doc ID 13493 Rev 4 25/31

Package and PCB thermal data VN5160S-E

Table 16. Thermal parameter

Area/island (cm2)Footprint2

R1 (°C/W) 1.2

R2 (°C/W) 6

R3 (°C/W) 3.5

R4 (°C/W) 21

R5 (°C/W) 16

R6 (°C/W) 58 28

C1 (W.s/°C) 0.0008

C2 (W.s/°C) 0.0016

C3 (W.s/°C) 0.0075

C4 (W.s/°C) 0.045

C5 (W.s/°C) 0.35

C6 (W.s/°C) 1.05 2

26/31 Doc ID 13493 Rev 4

VN5160S-E Package and packing information

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com

ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

5.2 Package mechanical data

Figure 35. SO-8 package dimensions

.

Doc ID 13493 Rev 4 27/31

Package and packing information VN5160S-E

SO-8

Table 17. SO-8 mechanical data

Dim.

Min. Typ. Max.

A 1.75

a1 0.1 0.25

a2 1.65

a3 0.65 0.85

b0.35 0.48

b1 0.19 0.25

C 0.25 0.5

c1 45 (typ.)

D4.8 5

E5.8 6.2

e1.27

Millimeter

e3 3.81

F3.8 4

L 0.4 1.27

M 0.6

S 8 (max.)

L1 0.8 1.2

28/31 Doc ID 13493 Rev 4

VN5160S-E Package and packing information

5.3 Packing information

Figure 36. SO-8 tube shipment (no suffix)

B

C

Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532

A

A 3.2
B 6
C (± 0.1) 0.6

All dimensions are in mm.

Figure 37. SO-8 tape and reel shipment (suffix “TR”)

Tape dimensions

According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986

Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (+ 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

End

Reel dimensions

Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4

All dimensions are in mm.

Start

Top

cover

tape

500mm min

Empty components pockets
saled with cover tape.

User direction of feed

No componentsNo components Components

500mm min

Doc ID 13493 Rev 4 29/31

Revision history VN5160S-E

6 Revision history

Table 18. Document revision history

Date Revision Changes

Feb-2007 1 Initial release.

May-2007 2

17-Dec-2007 3

23-Nov-2009 4

Document rewritten, restructured and put in corporate technical
literature template.

Table 4: Absolute maximum ratings: changed E

MAX value from

14 to 34 mJ.

Table 13: Electrical transient requirements (part 1/3): updated

test level values III and IV for test pulse 5b and notes.
Added Section 3.5: Maximum demagnetization energy (VCC =

13.5V).
Figure 34: Thermal fitting model of a single-channel HSD in

(1)

: added note.

SO-8

Updated Section 2.3: Electrical characteristics.
Updated Section 2.4: Electrical characteristics curves.
Updated Table 6: Power section.

30/31 Doc ID 13493 Rev 4

VN5160S-E

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Doc ID 13493 Rev 4 31/31