Datasheet UPD3737D Datasheet (NEC)

DATA SHEET

MOS INTEGRATED CIRCUIT

µ

PD3737

5150-BIT CCD LINEAR IMAGE SENSOR

The µPD3737 is a 5150-bit high sensitivity CCD (Charge Coupled Device) linear image sensor which

changes optical images to electrical signal.

The µPD3737 has high speed CCD register, so it is suitable for high resolution scanners and facsimiles

which scan high definition document at high speed.

FEATURES

• Valid photocell 5150-bit

• Photocell's pitch 7

• High response sensitivity Providing a response 4.3 times better than the existing equivalent NEC

• Peak response wavelength 550 nm (green)

• Resolution 16 dot/mm across the shorter side of an A3-size (297 × 420 mm) sheet,

• Power supply +12 V

• Drive clock level CMOS output under 5V operation

• High speed scan 252 µs/line

• Data rate 20 MHz

µ

m

µ

product (

24 dot/mm across the shorter side of an A4-size (210 × 297 mm) sheet

PD3571) to the light from a daylight fluorescent lamp

ORDERING INFORMATION

Part Number Package Quality Grade

µ

PD3737D CCD LINEAR IMAGE SENSOR 22 PIN CERAMIC DIP (CERDIP) (400 mil) Standard

Please refer to "Quality grade on NEC Semiconductor Devices" (Document number IEI-1209) published by
NEC Corporation to know the specification of quality grade on the devices and its recommended applications.

The information in this document is subject to change without notice.

Document No. IC-3352
(O. D. No. IC-8925)
Date Published July 1994 P
Printed in Japan

The mark shows revised points.

©

1994

BLOCK DIAGRAM

µ

PD3737

V

OD

4

22

R

φ

18

OUT

V

2

AGND

5

AGND

1L

φ

12

14

φ

1

Optical black (OB) 18 bits, invalid photocell 2 bits,
valid photocell 5150 bits, invalid photocell 2 bits

9

2L

φ

13

10

φ

TG

φ

2

2

PIN CONFIGURATION (Top View)

CCD LINEAR IMAGE SENSOR 22 PIN CERAMIC DIP (CERDIP) (400 mil)

µ

PD3737

No connection

Analog ground

No connection

Output unit drain voltage

Analog ground

No connection

No connection

No connection

Last-stage shift register clock 2

Shift register clock 2

No connection

122

NC

221

AGND

320

NC

OD

419

V

518

AGND

617

NC

716

NC

815

NC

2L

914

φ

2

φ

10 13

11 12

NC

R

φ

NC

NC

V

OUT

NC

1

φ

TG

φ

1L

φ

Reset gate clock

No connectionNC

No connection

No connection

Output

No connectionNC

No connection

No connectionNC

Shift register clock 1

Transfer gate clock

Last-stage shift register clock 1

PHOTOELEMENT STRUCTURE DIAGRAM

5 m

µ

Aluminum
electrode

µ

7 m

2 m

µ

Channel stopper

3

ABSOLUTE MAXIMUM RATINGS (Ta = +25 °C)

Parameter Symbol Ratings Unit

Output unit drain voltage VOD –0.3 to +15 V

Shift register clock voltage V

Last-stage shift register clock voltage V

Reset signal voltage V

Transfer gate signal voltage V

φ

1, φ2 –0.3 to +15 V

φ

1L, Vφ2L –0.3 to +15 V

φ

R –0.3 to +15 V

φ

TG –0.3 to +15 V

Operating ambient temperature Topt –25 to +55 °C
Storage temperature Tstg –40 to +100 °C

RECOMMENDED OPERATING CONDITIONS (Ta = –25 to + 55 °C)

Parameter Symbol MIN. TYP. MAX. Unit

Output unit drain voltage VOD 11.4 12.0 12.6 V

µ

PD3737

Shift register clock signal high level V

Shift register clock signal low level V

Reset signal φR high level V

Reset signal φR low level V

Transfer gate signal high level V

Transfer gate signal low level V

Data rate f

φ

1H, Vφ2H, 4.5 5.0 5.5 V

V

φ

1LH, Vφ2LH

φ

1L, Vφ2L, –0.3 0 +0.5 V

V

φ

1LL, Vφ2LL

φ

RBH 4.5 5.0 5.5 V

φ

RBL –0.3 0 +0.5 V

φ

TGH 4.5 Vφ1H Vφ1H V

φ

TGL –0.3 0 +0.5 V

φ

R 0.5 1 20 MHz

Remark 1. Input reset signal φR to pin 22 via capacitor. Concerning the connection method refer to APPLICATION

EXAMPLE.

2. Operating conditions of reset signal φR is not the condition at device pins but the conditions of the

signal which applied to capacitor.

φ

3. When V

TGH > Vφ1H, image lag increases.

4

µ

PD3737

ELECTRICAL CHARACTERISTICS

Ta = +25 °C, VDD = 12 V, f

light source: 3200 K halogen lamp + C500 (infrared cut filter), input clock = 5 V

Parameter Symbol Test Conditions MIN. TYP. MAX. Unit

Saturation voltage Vsat 1.0 1.5 V

Saturation exposure SE Daylight color fluorescent lamp 0.2 lx·s
Photo response non-uniformity PRNU VOUT = 500 mV ±5 ±10 %

Average dark signal ADS Light shielding 1.0 3.0 mV

Dark signal non-uniformity DSNU Light shielding

Power consumption PW 100 mW
Output impedance ZO 0.2 0.5 kΩ

Response RF Daylight color fluorescent lamp 6 7.5 9 V/lx·s

Response peak wavelength 550 nm

Image lag IL VOUT = 1 V 0.3 1 %

Offset level VOS 2.0 3.0 5.0 V

Input capacity of shift register clock C
pin C

Input capacity of last-stage shift C
register clock pin C

Input capacity of reset pin C

Input capacity of transfer gate clock C
pin

Output fall delay time td

Register imbalance RI VOUT = 500 mV 0 4 %

Transfer efficiency TTE VOUT = 500 mV, f

Dynamic range DR Vsat/DSNU 500 times

Reset feed-through noise RFSN Light shielding 250 500 mV

φ

1 = 0.5 MHz, data rate = 1 MHz, storage time = 10 ms

φ

1 800 pF

φ

2

φ

1L 50 pF

φ

2L

φ

R 10 pF

φ

TG 150 pF

Note

Time from 90 % to 10 % of φ2L fall 25 ns
is 5ns.

φ

R1 = 20 MHz 92 98 %

–3

P-P

+3
–1

+6

mV

Note td is defined as a time from 10 % of φ2L to 10 % of VOUT, output after passing through two steps of emitter

follower in the application example.

5

TIMING CHART 1

TG

φ

1

1

φ

2

φ
φ

R

2

µ

PD3737

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

VOUT

1 2 3 4 5 6 7 8 910111213141516171819202122232425262728293031323334353637

OB (Optical black) 18 bits

Valid photocell 5150 bits

Invalid

photocell

2 bits

5181

5182

photocell

5183

Invalid

2 bits

5184

5185

5186

6

TIMING CHART 2

µ

PD3737

t

1

t2

φ

φ

1L

φ

2L

φ

φ

VOUT

1

2

90 %

R

10 %

t3

t5

90 %

10 %

90 %

10 %

t

1′

90 %

10 %

90 %

10 %

t4

t6

90 %

td

10 %

t2′

7

TIMING CHART for φTG, φ1, φ2

µ

PD3737

t7

90 %

φ

φ

TG

φ

1

2

10 %

t10

90 %

t9

t8

t11

(Unit: ns)

Parameter MIN. TYP. MAX.

t1, t2 0 50 (150)

t1′, t2′ 0 5 (25)

t3 15 50 (500)

t4 5 20 (500)

t5, t6 0 20 (50)

t7, t8 0 50 (100)

t9 500 1000 (5000)

t10, t11 0 100 (500)

Remark The MAX. in the table above shows the operation range in which the output characteristics are kept

µ

almost enough for genaral purpose, does not show the limit above which the

PD3737 is destroied.

CROSS POINTS for φ1, φ2 CROSS POINTS for φ1L, φ2

1

φ

2 V or more 2 V or more

2

φ

2

φ

2 V or more

1L

φ

0.5 V or more

CROSS POINTS for φ1, φ2L

1

φ

2 V or more

φ

2L

Remark Adjust cross point of (φ1, φ2), (φ1L, φ2), (φ1, φ2L) by each pin external input resistor.

0.5 V or more

8

µ

PD3737

DEFINITIONS OF CHARACTERISTIC ITEMS

1. Saturation voltage: Vsat

Output signal voltage at which the response linearity is lost.

2. Saturation exposure: SE

Product of intensity of illumination (lx) and storage time (s) when saturation of output voltage occurs.

3. Photo response non-uniformity: PRNU

The peak/bottom ratio to the average output voltage of all the valid bits calculated by the following formula.

VMAX. or VMIN.

PRNU (%) =

Register Dark

DC level

4. Average dark signal: ADS

Output average voltage in light shielding.

ADS(mV) =

1

∑

n

n

j=1

n

1

V

∑

n

j=1

V

j

–1

j

x 100

V MIN.

n : Number of valid bits

V

j : Output voltage of each bit

n

1

V

j

V MAX.

∑

n

j=1

5. Dark signal non-uniformity: DSNU

The difference between peak or bottom output voltage in light shielding and ADS.

Register Dark

DC level

ADS

DSNU MIN.

DSNU MAX.

9

6. Output impedance: Zo

Output pin impedance viewed from outside.

7. Response: R

Output voltage divided by exposure (lx

Note that the response varies with the light source.

8. Image Lag: IL

The rate between the last output voltage and the next one after read out the data of a line.

TG

φ

•s).

µ

PD3737

Light

VOUT

IL =

VOUT

9. Register Imbalance: RI

The rate of the difference between the average of the output voltage of Odd and Even bits, against the average

output voltage of all the valid bits.

2

n

RI =

V1

n

2

∑

j=1

ON

x 100 (%)

V

(

2j–1–V2j

n

1

Vj

∑

n

j=1

)

x 100 (%)

OUT

V

OFF

V 1

10

STANDARD CHARACTERISTIC CURVES (Ta = 25 °C)

DARK OUTPUT TEMPERATURE
CHARACTERISTIC

8

4

2

1

0.5

Relative Output Voltage

0.25

STORAGE TIME OUTPUT VOLTAGE
CHARACTERISTIC

2

1

Relative Output Voltage

0.2

µ

PD3737

0.1
01020304050

Ambient Temperature T ( C)

100

80

60

40

Response Ratio (%)

0.1

°

a

SPECTRAL RESPONSE CHARACTERISTIC

5101

Storage Time (ms)

20

0

1200600400 1000800

Wavelength (nm)

11

APPLICATION EXAMPLE

+12 V

+ 47 F/25 V

AGND

1 1

51 Ω

µ

PD3737

R

φ

1

µ

4.7 kΩ

51 Ω

Tr1

47 Ω

Tr2

Output

1

1 kΩ

AGND

φ

TG

φ

1L

φ

1000 pF

AGND

22

φφφφ

R21NC20NC19NC18V

NC AGND NC V

1 234567891011

OD AGND NC NC NC 2L 2 NC

µ

0.1 F

+

–

47 F/25 V

µ

17

OUT

NC16NC15NC14 113 TG12 1L

PD3737D

µ

AGND

2 Ω

10 Ω110 Ω

φφ

10 Ω22 Ω

2

12

1. 74AC04 Tr1 2SA1005

2. 74AC04 Tr

2 2SC945

2

φ

2L

φ

PACKAGE DIMENSIONS

CCD LINEAR IMAGE SENSOR 22PIN CERAMIC DIP (CERDIP) (400mil)

(Unit : mm)

1bit

4.9±0.3

9.65±0.3

1.60±0.25

42.2±0.25

0.5

48.6 ±

10.16

µ

PD3737

1.02 ± 0.15

0.46 ± 0.06

25.4

2.54

(1.95)

0.3

2.38

±

4.33±0.5

0

~

(5.27)

4.68±0.5

Name Refractive index

Glass cap

Dimensions

47.5×9.25×0.7

10°

0.25±0.05

1.5

22D-1CCD-PKG7

13

RECOMMENDED SOLDERING CONDITIONS

The following conditions (see table below) must be met when soldering this product.

For more details, refer to our document “SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL”

(IEI-1207).

Please consult with our sales offices in case other soldering process is used, or in case soldering is done under

different conditions.

Table 1 Type of Through Hole Device

µ

PD3737D: CCD LINEAR IMAGE SENSOR 22 PIN CERAMIC DIP (CERDIP) (400 mil)

Soldering Process Soldering Conditions

Wave soldering Solder temperature: 260 ˚C or below,
(For leads only) Flow time: 10 seconds or below

Partial Pin temperature: 260 ˚C or below,
heating method Time: 10 seconds or below

Caution Do not jet molten solder on the surface of package.

µ

PD3737

14

NOTES FOR CMOS DEVICES

1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS

Note: Strong electric field, when exposed to a MOS device, can cause destruction of

the gate oxide and ultimately degrade the device operation. Steps must be

taken to stop generation of static electricity as much as possible, and quickly

dissipate it once, when it has occurred. Environmental control must be

adequate. When it is dry, humidifier should be used. It is recommended to

avoid using insulators that easily build static electricity. Semiconductor

devices must be stored and transported in an anti-static container, static

shielding bag or conductive material. All test and measurement tools including

work bench and floor should be grounded. The operator should be grounded

using wrist strap. Semiconductor devices must not be touched with bare

hands. Similar precautions need to be taken for PW boards with semiconductor

devices on it.

µ

PD3737

2 HANDLING OF UNUSED INPUT PINS FOR CMOS

Note: No connection for CMOS device inputs can be cause of malfunction. If no

connection is provided to the input pins, it is possible that an internal input

level may be generated due to noise, etc., hence causing malfunction. CMOS

devices behave differently than Bipolar or NMOS devices. Input levels of CMOS

devices must be fixed high or low by using a pull-up or pull-down circuitry. Each

unused pin should be connected to VDD or GND with a resistor, if it is considered

to have a possibility of being an output pin. All handling related to the unused

pins must be judged device by device and related specifications governing the

devices.

3 STATUS BEFORE INITIALIZATION OF MOS DEVICES

Note: Power-on does not necessarily define initial status of MOS device. Production

process of MOS does not define the initial operation status of the device.

Immediately after the power source is turned ON, the devices with reset

function have not yet been initialized. Hence, power-on does not guarantee

out-pin levels, I/O settings or contents of registers. Device is not initialized

until the reset signal is received. Reset operation must be executed immedi-

ately after power-on for devices having reset function.

15

[MEMO]

µ

PD3737

The application circuits and their parameters are for references only and are not intended for use in actual design-in's.

No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this
document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents,
copyrights or other intellectual property rights of NEC Corporation or others.
The devices listed in this document are not suitable for use in aerospace equipment, submarine cables, nuclear
reactor control systems and life support systems. If customers intend to use NEC devices for above applications
or they intend to use "Standard" quality grade NEC devices for applications not intended by NEC, please contact
our sales people in advance.
Application examples recommended by NEC Corporation

Standard: Computer, Office equipment, Communication equipment, Test and Measurement equipment,

Machine tools, Industrial robots, Audio and Visual equipment, Other consumer products, etc.

Special: Automotive and Transportation equipment, Traffic control systems, Antidisaster systems, Anticrime

systems, etc.

M4 92.6

16