Datasheet UPD3734ACY Datasheet (NEC)

DATA SHEET

MOS INTEGRATED CIRCUIT

µ

PD3734A

2660 PIXELS CCD LINEAR IMAGE SENSOR

The µPD3734A is a high sensitivity CCD (Charge Coupled Device) linear image sensor which changes optical

images to electrical signal.

The µPD3734A has 2660 pixels and an output amplifier which has high gain and wide output range, but low noise.
Built-in sample and hold circuit converts and outputs independent signal from CCD register in every pixel to

continuous video signal. So it is easy to interface to A/D converter or Bi-level converter.

FEATURES

• Valid photocell : 2660 pixels

• Photocell’s pitch : 11 µm

• High sensitivity : 70 V/lx·s TYP.

• Peak response wavelength : 550 nm (green)

• Resolution : 12 dot/mm A4 (210 × 297 mm) size (shorter side)
300 dpi US letter (8.5” × 11”) size (shorter side)

• Power supply : +12 V

• Drive clock level : CMOS output under 5 V operation

• High speed scan : 0.54 ms/line (S/H in used)

• Built-in circuit : Sample and hold circuit
Reset feed-through level clamp circuit
Clamp pulse generation circuit
Voltage amplifier

µ

• Low noise : A quarter of the

• Low image lag : 1 % MAX.

• Pin assign : Compatible with the

PD3734

µ

PD3734

ORDERING INFORMATION

Part Number Package

µ

PD3734ACY CCD linear image sensor 22-pin plastic DIP (400 mil)

The information in this document is subject to change without notice.

Document No. S11454EJ1V0DS00 (1st edition)
Date Published May 1996 P
Printed in Japan

©

1996

COMPARISON CHART

µ

PD3734A

Item
PIN CONFIGURATION Pin 13 No connection Digital GND
RECOMMENDED

OPERATING CONDITIONS

ELECTRICAL
CHARACTERISTICS

TIMING CHART t4 MIN. (ns) 90 150

DEFINITIONS OF Dark signal non-uniformity Absolute value Minus and plus value
CHARACTERISTICS ITEMS

Data rate MAX. (MHz)

Average dark signal MAX. (mV)
Dark signal MIN. –8

non-uniformity (mV) TYP. 4 ±4

MAX. 6 +8

Power consumption TYP. 190 170
(mW) MAX. 250 220

Image lag (%) TYP. 0.3 7

MAX. 1.0 14

Total transfer efficiency Data rate = 4 MHz Data rate = 3 MHz
(test conditions)

Reset feed-through MIN. –900 0
noise (mV) TYP. –200 1000

MAX. +500 1800
Bit noise TYP. (mVp-p) 4.5 16
Random noise (mV) 0.9 (S/H in used) No definition

t5 MIN. (ns) 70 150
t8 MIN. (ns) 20 80

Random noise Refer to DEFINITIONS OF No definition

µ

PD3734ACY

5 (S/H in used) 3 (No conditions)
4 (S/H not in used)

3.0 8.0

0.9 (S/H not in used)

CHARACTERISTICS ITEMS

11. Random noise

µ

PD3734CY-1

2

BLOCK DIAGRAM

AGND

φ

RB

10

21

V

OD

3

φ

2

14

φ

V

OUT

SHB

17

Voltage Amplifier

•

•

S/H circuit

•

Reset feed-through
level clamp circuit

Optical black (OB) 18 pixels, invalid 2 pixels,
valid photocell 2660 pixels, invalid 2 pixels

TG

φ

9

2

1

φ

15

4

AGND

µ

PD3734A

3

PIN CONFIGURATION (Top View)

CCD linear image sensor 22-pin plastic DIP (400 mil)

µ

PD3734A

No connection

Sample and hold clock

Output drain voltage

Analog GND

No connection

No connection

No connection

No connection

Transfer gate clock

Analog GND

No connection

NC

122

221

φ

SHB

V

320

OD

419

AGND

518

NC

617

NC

716

NC

815

NC

φ

TG

914

10 13

AGND

11 12

NC

NC

φ

RB

NC

NC

NC

V

OUT

NC

φ

1

φ

2

NC

NC

No connection

Reset gate clock

No connection

No connection

No connection

Output

No connection

Shift register clock 1

Shift register clock 2

No connection

No connection

PHOTOCELL STRUCTURE DIAGRAM

9 m

µ

Aluminum
electrode

µ

11 m

2 m

µ

Channel stopper

4

µ

PD3734A

ABSOLUTE MAXIMUM RATINGS (TA = +25 ˚C)

Parameter Symbol Ratings Unit
Output drain voltage VOD –0.3 to +15 V
Shift register clock voltage V
Reset gate clock voltage V
Transfer gate clock voltage V
Sample and hold clock voltage V

φ

1, Vφ2 –0.3 to +15 V

φ

RB –0.3 to +15 V

φ

TG –0.3 to +15 V

φ

SHB –0.3 to +15 V

Operating ambient temperature TA –25 to +60 ˚ C
Storage temperature Tstg –40 to +70 ˚ C

Caution Exposure to ABSOLUTE MAXIMUM RATING for extended periods may affect device reliability;

exceeding the ratings could cause permanent damage. The parameters apply independently.

RECOMMENDED OPERATING CONDITIONS (TA = –25 to +60 ˚C)

Parameter Symbol Conditions MIN. TYP. MAX. Unit
Output drain voltage VOD 11.4 12.0 12.6 V
Shift register clock high level V
Shift register clock low level V
Reset gate clock high level V
Reset gate clock low level V
Transfer gate clock high level V
Transfer gate clock low level V
Sample and hold clock high level V
Sample and hold clock low level V
Data rate f

φ

1H, Vφ2H 4.5 5.0 5.5 V

φ

1L, Vφ2L –0.3 0 +0.5 V

φ

RBH 4.5 5.0 5.5 V

φ

RBL –0.3 0 +0.5 V

φ

TGH 4.5 5.0 5.5 V

φ

TGL –0.3 0 +0.5 V

φ

SHBH 4.5 5.0 5.5 V

φ

SHBL –0.3 0 +0.5 V

φ

RB S/H in used 0.2 1 5 MHz

S/H not in used 0.2 1 4 MHz

5

µ

PD3734A

ELECTRICAL CHARACTERISTICS

TA = +25 ˚C, VOD = 12 V, f
light source: 3200 K halogen lamp + C-500S (infrared cut filter, t = 1 mm), input signal clock = 5 V

Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
Saturation voltage Vsat 1.5 2.0 V
Saturation exposure SE Daylight color fluorescent lamp 0.029 lx•s
Photo response non-uniformity PRNU VOUT = 500 mV ±2 ±8%
Average dark signal ADS Light shielding 1.0 3.0 mV
Dark signal non-uniformity DSNU Light shielding 4 6 mV
Power consumption PW 190 250 mW
Output impedance ZO 0.5 1 kΩ
Response RF Daylight color fluorescent lamp 49 70 91 V/Ix·s
Response peak wavelength 550 nm
Image lag IL VOUT = 1 V 0.3 1.0 %
Offset level VOS 3.5 4.5 5.5 V
Input capacitance of shift register C

clock pin C
Input capacitance of reset gate clock C

pin
Input capacitance of sample and hold C

clock pin
Input capacitance of transfer gate C

clock pin
Output fall delay time td 80 ns
Register imbalance RI VOUT = 500 mV 3 %
Total transfer efficiency TTE VOUT = 1 V, data rate = 4 MHz 92 %
Dynamic range DR Vsat/DSNU 500 times
Reset feed-through noise RFSN Light shielding –900 –200 +500 mV
Sample and hold noise SHSN Light shielding, –50 0 +50 mV

Bit noise BN 4.5 mVp-p
Random noise σ S/H in used 0.9 mV

Resolution MTF Modulation transfer function at 65 %

φ

1 = 0.5 MHz, data rate = 1 MHz, storage time = 10 ms

φ

1,

φ

2

φ

RB 5pF

φ

SHB 5pF

φ

TG 100 pF

φ

SHB series resistor 47 Ω

S/H not in used 0.9 mV

nyquist frequency

p-p

400 pF

6

TIMING CHART 1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

1346

1347

1348

123456789

101112131415161718192021222324252627282930313233343536

37

2691

2692

2693

2694

2695

2696

φ

TG

φ

1

φ

2

φ

RB

V

OUT

φ

SHB

V

OUT

(S/H)

OB (Optical black) 18 pixels

Valid photocell
2660 pixels

Invalid
photocell
2 pixels

Invalid
photocell
2 pixels

µ

PD3734A

Remark V OUT = Output when φSHB is not in used (When φSHB is not in used, connect φSHB pin to GND).

VOUT (S/H) = Output when φSHB is in used.

7

TIMING CHART 2

µ

PD3734A

t

1

t

2

φ

V

SHB

φ

V

(S/H)

φ

φ

RB

OUT

OUT

1

2

t6t3t

7

90 %

10 %

90 %

10 %

90 %

10 %

t

4

t

5

t

d

RFSN

Signal

10 %

90 %

10 %

t9t8t

10

11

t

V

OS

50 %

t

12

t

13

50 %
50 %

Sampling noise

Remark V OUT (S/H) = Output when φSHB is in used.

8

TIMING CHART for φTG, φ1, φ2

φ

TG

φ

1

2

φ

CROSS POINTS for φ1, φ2

1

φ

90 %

90 %

10 %

µ

PD3734A

t

t

14

t

17

16

t

15

t

18

2

φ

Remark Adjust cross point of φ1, φ2 by φ1, φ2 pin external input resistors.

Parameter MIN. TYP. MAX. Unit
t1 ,t2 0 50 (100) ns
t3 20 100 ns
t4 90 300 ns
t5 70 300 ns
t6, t7 050 ns
t8 20 200 ns
t9, t10, t11 050 ns
t12 0ns
t13 510ns
t14, t15 050 ns
t16 650 1000 (2000) ns
t17, t18 0 100 ns

2 V or more2 V or more

9

DEFINITIONS OF CHARACTERISTIC ITEMS

1. Saturation voltage: Vsat
Output signal voltage at which the response linearity is lost.

2. Saturation exposure: SE
Product of intensity of illumination (lx) and storage time (s) when saturation of output voltage occurs.

3. Photo response non-uniformity: PRNU
The peak/bottom ratio to the average output voltage of all the valid pixels calculated by the following formula.

µ

PD3734A




−

1

× 100






PRNU (%) =



V or V

MAX. MIN.







1

Vj

∑

n

jn=

1

n : Number of valid pixels
Vj : Output voltage of each pixel

V

MIN.

V

Register Dark

DC level

MAX.

4. Average dark signal: ADS
Output average voltage in light shielding.

n

ADS V

(mV)=

1

j

n

j

=∑1

n : Number of valid pixels

j : Output voltage of each pixel

V

5. Dark signal non-uniformity: DSNU
The difference between peak or bottom output voltage in light shielding and ADS.

1

V

j

∑

n

jn=

1

10

Register Dark

DC level

DSNU (mV): maximum of |V

j – ADS| j = 1 to n

n : Number of valid pixels
Vj : Output voltage of each pixel

ADS

DSNU

6. Output impedance: Zo
Output pin impedance viewed from outside.

7. Response: R
Output voltage divided by exposure (lx·s).
Note that the response varies with a light source.

8. Image Lag: IL
The rate between the last output voltage and the next one after read out the data of a line.

φ

TG

µ

PD3734A

Light

V

OUT

ON

1

IL

(%) =×

V

100

V

OUT

V

OUT

OFF

V

1

9. Register Imbalance: RI
The rate of the difference between the average of the output voltage of Odd and Even pixels, against the
average output voltage of all the valid pixels.

n
2

2

VV

jj

21 2

()

−

−

∑

n

j

1

=

j

×

100

n : Number of valid pixels

j : Output voltage of each pixel

V

RI

(%)=

n

1

V

∑

n

j

1

=

10. Bit Noise: BN
Output signal distribution of a photocell by scan.

11

11. Random noise: σ
Random noise σ is defined as the standard deviation of a valid photocell output signal with 100 times (= 100
lines) data sampling at dark (light shielding).

µ

PD3734A

100

∑

i

=

σ

(mV)= V

1

2

()

VV

i

−

100

,

=

1

100

100

∑

i

=

1

V

i

Vi: A valid photocell output signal among all of the valid photocells

OUT

1

V

2

…

V

100

line 1V

line 2

…

line 100

V

This is measured by the DC level sampling of only the signal level, not by CDS (Correlated Double Sampling).

12

STANDARD CHARACTERISTIC CURVES (TA = +25 ˚C)

g

)

DARK OUTPUT TEMPERATURE
CHARACTERISTIC

8

4

2

1

0.5

Relative Output Voltage

0.25

2

1

Relative Output Voltage

0.2

µ

STORAGE TIME OUTPUT VOLTAGE
CHARACTERISTIC

PD3734A

0.1
01020304050

Operating Ambient Temperature T

100

80

60

40

Response Ratio (%)

20

0.1

A

(˚C)

SPECTRAL RESPONSE CHARACTERISTIC

5101

Storage Time (ms)

0

Wavelen

th (nm

1200600400 1000800

13

APPLICATION CIRCUIT EXAMPLE

+5 V +12 V

µ

10 F

µ

/16 V

PD74HC04

µ

φ

RB

φ

SHB

10 F

µ

/16 V

++

0.1 F

µ

PD3734A

10 Ω0.1 F

µ

1

NC

1

φ

47 Ω

2

φ

φ

TG

10 Ω

2
3
4
5
6
7
8

9
10
11

φ

SHB

V

OD

AGND
NC
NC
NC
NC

φ

TG
AGND
NC

µ

PD3734A

22

NC

21

φ

RB

47 Ω

20

NC

19

NC

18

NC

17

OUT

V

NC

16

1

φ

15

2

14

φ

NC

13
12

NC

100 Ω

2 Ω
2 Ω

2 kΩ

100 Ω

OUT

V

Remark When internal sample and hold circuit of the µPD3734A is not necessary, connect pin 2 (φSHB) to GND.

14

PACKAGE DIMENSIONS

Name Dimensions

Refractive index

Plastic cap

1.5

22C-1CCD-PKG4

42.9 ✕ 8.35 ✕ 0.7

2

1 The bottom of the package The surface of the chip
2 The thickness of the cap over the chip

1bit

2.54

(5.42)

25.4

0.8±0.3

37.5

44.0±0.3

2.0

9.25±0.3

1.02±0.15

0.46±0.1

4.21±0.5

4.39±0.4

10.16

(1.99)

2.35±0.2
1

0~10°

0.25±0.05

CCD LINEAR IMAGE SENSOR 22PIN PLASTIC DIP (400 mil)

(Unit : mm)

µ

PD3734A

15

µ

PD3734A

RECOMMENDED SOLDERING CONDITIONS

When soldering this product, it is highly recommended to observe the conditions as shown below. If other soldering
processes are used, or if the soldering is performed under different conditions, please make sure to consult with our
sales offices.

For more details, refer to our document “SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL”

(C10535E).

Type of Through-hole Device

µ

PD3734ACY: CCD linear image sensor 22-pin plastic DIP (400 mil)

Process Conditions
Wave soldering (only to leads) Solder temperature: 260 ˚C or below, Flow time: 10 seconds or less.
Partial heating method Pin temperature: 260 ˚C or below, Heat time: 10 seconds or less (per each lead).

Caution For through-hole device, the wave soldering process must be applied only to leads, and make sure

that the package body does not get jet soldered.
During assembly care should be taken to prevent solder or flux from contacting the plastic cap.
The optical characteristics could be degraded by such contact.

16

µ

NOTES ON CLEANING THE PLASTIC CAP

1 CLEANING THE PLASTIC CAP

Care should be taken when cleaning the surface to prevent scratches.
The optical characteristics of the CCD will be degraded if the cap is scratched during
cleaning.

We recommend cleaning the cap with a soft cloth moistened with one of the recommended
solvents below. Excessive pressure should not be applied to the cap during cleaning. If the
cap requires multiple cleanings it is recommended that a clean surface or cloth be used.

PD3734A

2 RECOMMENDED SOLVENTS

The following are the recommended solvents for cleaning the CCD plastic cap. Use of
solvents other than these could result in optical or physical degradation in the plastic cap.
Please consult your sales office when considering an alternative solvent.

Solvents Symbol

Ethyl Alcohol EtOH
Methyl Alcohol MeOH
Isopropyl Alcohol IPA
N-methyl Pyrrolidone NMP

17

[MEMO]

µ

PD3734A

18

µ

NOTES FOR CMOS DEVICES

1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS

Note: Strong electric field, when exposed to a MOS device, can cause destruction

of the gate oxide and ultimately degrade the device operation. Steps must
be taken to stop generation of static electricity as much as possible, and
quickly dissipate it once, when it has occurred. Environmental control must
be adequate. When it is dry, humidifier should be used. It is recommended
to avoid using insulators that easily build static electricity. Semiconductor
devices must be stored and transported in an anti-static container, static
shielding bag or conductive material. All test and measurement tools
including work bench and floor should be grounded. The operator should
be grounded using wrist strap. Semiconductor devices must not be touched
with bare hands. Similar precautions need to be taken for PW boards with
semiconductor devices on it.

PD3734A

2 HANDLING OF UNUSED INPUT PINS FOR CMOS

Note: No connection for CMOS device inputs can be cause of malfunction. If no

connection is provided to the input pins, it is possible that an internal input
level may be generated due to noise, etc., hence causing malfunction. CMOS
device behave differently than Bipolar or NMOS devices. Input levels of
CMOS devices must be fixed high or low by using a pull-up or pull-down
circuitry. Each unused pin should be connected to VDD or GND with a
resistor, if it is considered to have a possibility of being an output pin. All
handling related to the unused pins must be judged device by device and
related specifications governing the devices.

3 STATUS BEFORE INITIALIZATION OF MOS DEVICES

Note: Power-on does not necessarily define initial status of MOS device. Produc-

tion process of MOS does not define the initial operation status of the device.
Immediately after the power source is turned ON, the devices with reset
function have not yet been initialized. Hence, power-on does not guarantee
out-pin levels, I/O settings or contents of registers. Device is not initialized
until the reset signal is received. Reset operation must be executed imme­diately after power-on for devices having reset function.

19

µ

PD3734A

The application circuits and their parameters are for references only and are not intended for use in actual design­in's.

No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this
document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents,
copyrights or other intellectual property rights of NEC Corporation or others.
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
NEC devices are classified into the following three quality grades:
“Standard“, “Special“, and “Specific“. The Specific quality grade applies only to devices developed based on
a customer designated “quality assurance program“ for a specific application. The recommended applications
of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each
device before using it in a particular application.

Standard: Computers, office equipment, communications equipment, test and measurement equipment,

audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots

Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster

systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)

Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life

support systems or medical equipment for life support, etc.
The quality grade of NEC devices in “Standard“ unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact NEC Sales Representative in advance.
Anti-radioactive design is not implemented in this product.

M4 94.11