Datasheet UMA1020AM Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

UMA1020AM

Low-voltage dual frequency
synthesizer for radio telephones

Product specification
Supersedes data of November 1994
File under Integrated Circuits, IC03

1995 Jul 06

Philips Semiconductors Product specification

Low-voltage dual frequency
synthesizer for radio telephones

FEATURES

• Low current from 3 V supply

• Fully programmable RF divider

• 3-line serial interface bus

• Second synthesizer to control first IF or offset loop

frequency

• Independent fully programmable reference dividers for
each loop, driven from external crystal oscillator

• Dual phase detector outputs to allow fast frequency
switching

• Dual power-down modes.

APPLICATIONS

• 1 to 1.7 GHz mobile telephones

• Portable battery-powered radio equipment.

GENERAL DESCRIPTION

The UMA1020AM BICMOS device integrates prescalers,
programmable dividers, and phase comparators to
implement two phase-locked loops. The device is
designed to operate from 3 NiCd cells, in pocket phones,
with low current and nominal 5 V supplies.

UMA1020AM

The principal synthesizer operates at RF input frequencies
up to 1.7 GHz the auxiliary synthesizer operates at
300 MHz. The auxiliary loop is intended for the first IF or to
transmit offset loop-frequency settings. Each synthesizer
has a fully programmable reference divider. All divider
ratios are supplied via a 3-wire serial programming bus.

Separate power and ground pins are provided to the
analog and digital circuits. The ground leads should be
externally short-circuited to prevent large currents flowing
across the die and thus causing damage. Digital supplies

and V

V

DD1

must be equal to or greater than VDD (i.e. VDD= 3 V and
VCC= 5 V for wider tuning range).

The principal synthesizer phase detector uses two charge
pumps, one provides normal loop feedback, while the
other is only active during fast mode to speed-up
switching. The auxiliary loop has a separate phase
detector. All charge pump currents (gain) are fixed by an
external resistance at pin I
filters are used; the charge-pumps function within a wide
voltage compliance range to improve the overall system
performance.

must also be at the same potential. V

DD2

(pin 14). Only passive loop

SET

CC

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

, V

CC

I

CC+IDD

DD

supply voltage VCC≥ V

DD

principal synthesizer supply current auxiliary synthesizer in

2.7 − 5.5 V

− 9.4 − mA

power-down mode

I

, I

CCPD

f

VCO

f

AI

f

XTAL

f

PPC

f

APC

T

amb

DDPD

principal and auxiliary synthesizer
supply current

current in power-down mode per supply − 12 −µA
principal input frequency 1000 1500 1700 MHz
auxiliary input frequency 20 − 300 MHz
crystal reference input frequency 3 − 40 MHz
principal phase comparator frequency − 200 − kHz
auxiliary phase comparator frequency − 200 − kHz
operating ambient temperature −30 − +85 °C

principal and auxiliary
synthesizers ON

− 12.1 − mA

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

UMA1020AM SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1

1995 Jul 06 2

Philips Semiconductors Product specification

Low-voltage dual frequency
synthesizer for radio telephones

BLOCK DIAGRAM

UMA1020AM

Fig.1 Block diagram.

1995 Jul 06 3

Philips Semiconductors Product specification

Low-voltage dual frequency
synthesizer for radio telephones

PINNING

SYMBOL PIN DESCRIPTION

FAST 1 control input to speed-up main

synthesizer

CPPF 2 principal synthesizer speed-up

charge-pump output

CPP 3 principal synthesizer normal

charge-pump output

V

DD1

V

DD2

PRI 6 1.7 GHz principal synthesizer

DGND 7 digital ground
f

XTAL

POFF 9 principal synthesizer power-down

n.c. 10 not connected
CLK 11 programming bus clock input
DATA 12 programming bus data input
E 13 programming bus enable input

I

SET

AUX 15 auxiliary synthesizer frequency input
AGND 16 analog ground
CPA 17 auxiliary synthesizer charge-pump

V

CC

AOFF 19 auxiliary synthesizer power-down

LOCK 20 in-lock detect output (main PLL); test

4 digital power supply 1
5 digital power supply 2

frequency input

8 common crystal frequency input from

TCXO

input

(active LOW)

14 regulator pin to set the charge-pump

currents

output

18 supply for charge-pump

input

mode output

UMA1020AM

Fig.2 Pin configuration.

FUNCTIONAL DESCRIPTION
Principal synthesizer

Programmable reference and main dividers drive the
principal PLL phase detector. Two charge pumps produce
phase error current pulses for integration in an external
loop filter. A hardwired power-down input POFF (pin 9)
ensures that the dividers and phase comparator circuits
can be disabled.

1995 Jul 06 4

The PRI input (pin 6) drives a preamplifier to provide the
clock to the first divider stage. The preamplifier has a high
input impedance, dominated by pin and pad capacitance.
The circuit operates with signal levels from 100 mV to
500 mV (RMS), and at frequencies up to 1.7 GHz.
The high frequency divider circuits use bipolar transistors,
slower bits are CMOS. Divider ratios (512 to 131071)
allow up to 2 MHz phase comparison frequency.

Philips Semiconductors Product specification

Low-voltage dual frequency
synthesizer for radio telephones

The reference and main divider outputs are connected to
a phase/frequency detector that controls two charge
pumps. The two pumps have a common bias-setting
current that is set by an external resistance. The ratio
between currents in fast and normal operating modes can
be programmed via the 3-wire serial bus. The low current
pump remains active except in power-down. The high
current pump is enabled via the control input FAST (pin 1).
By appropriate connection to the loop filter, dual bandwidth
loops are provided: short time constant during frequency
switching (FAST mode) to speed-up channel changes and
low bandwidth in the settled state (on-frequency) to reduce
noise and breakthrough levels.

The principal synthesizer speed-up charge pump (CPPF)
is controlled by the FAST input in synchronization with
phase detector operation in such a way that potential
disturbances are minimized. The dead zone (caused by
finite time taken to switch the current sources on or off) is
cancelled by feedback from the normal pump output to the
phase detector thereby improving linearity.

An open drain transistor drives the output pin LOCK
(pin 20). It is recommended that the pull-up resistor from
this pin to VDD is chosen such that the value is high enough
to keep the sink current in the LOW state below 400 µA.
The circuit can be programmed to output either the phase
error in the principal or auxiliary phase detectors or the
combination from both detectors (OR function). The
resultant output will be a current pulse with the duration of
the selected phase error. By appropriate external filtering
and threshold comparison, an out-of-lock or an in-lock flag
is generated.

Auxiliary synthesizer

The auxiliary synthesizer has a 14-bit main divider and an
11-bit reference divider. A separate power-down input
AOFF (pin 19), disables currents in the auxiliary dividers,
phase detector, and charge pump. The auxiliary input
signal is amplified and fed to the main divider. The input
buffer presents a high impedance, dominated by pin and
pad capacitance. First divider stages use bipolar
technology operating at input frequencies up to 300 MHz;
the slower bits are CMOS. The auxiliary loop phase
detector and charge pump use similar circuits to the main
loop low-current phase comparator, including dead-zone
compensation feedback.

UMA1020AM

Serial programming bus

A simple 3-line unidirectional serial bus is used to program
the circuit. The 3 lines are DATA, CLK and
The data sent to the device is loaded in bursts framed by
E. Programming clock edges and their appropriate data
bits are ignored untilE goes active LOW. The programmed
information is loaded into the addressed latch when E
returns inactive HIGH. Only the last 21 bits serially clocked
into the device are retained within the programming
register. Additional leading bits are ignored, and no check
is made on the number of clock pulses. The fully static
CMOS design uses virtually no current when the bus is
inactive. It can always capture new programmed data
even during power-down of main and auxiliary loops.

However when either principal synthesizer or auxiliary
synthesizer or both are powered-on, the presence of a
TCXO signal is required at pin 8 (f
programming.

Data format

Data is entered with the most significant bit first. The
leading bits make up the data field, while the trailing four
bits are an address field. The UMA1020AM uses 5 of the
16 available addresses. The data format is shown in
Table 1. The first entered bit is p1, the last bit is p21.

The trailing address bits are decoded on the inactive edge

E. This produces an internal load pulse to store the data

of
in one of the addressed latches. To ensure that the data is
correctly loaded on first power-up, E should be held LOW
and only taken HIGH after having programmed an
appropriate register. To avoid erroneous divider ratios, the
pulse is not allowed during data reads by the frequency
dividers.

This condition is guaranteed by respecting a minimum E
pulse width after data transfer. The corresponding
relationship between data fields and addresses is given in
Table 2.

XTAL

E (enable).

) for correct

The auxiliary reference divider is clocked on the opposite
edge of the principal reference divider to ensure that active
edges arrive at the auxiliary and principal phase detectors
at different times. This minimizes the potential for
interference between the charge pumps of each loop.

1995 Jul 06 5

1995 Jul 06 6

Table 1 Format of programmed data

LAST IN PROGRAMMING REGISTER BIT USAGE FIRST IN

p21 p20 p19 p18 p17 p16 ../.. p2 p1

ADD0 ADD1 ADD2 ADD3 DATA0 DATA1 ../.. DATA15 DATA16

LATCH ADDRESS LSB DATA COEFFICIENT MSB

Table 2 Bit allocation (note 1)

FT REGISTER BIT ALLOCATION LT

p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15 p16 p17 p18 p19 p20 p21
dt16 dt15 dt14 dt13 dt12 DATA FIELD dt4 dt3 dt2 dt1 dt0 ADDRESS

TEST BITS
X X X X OLP OLA CR1 CR0 X X sPOFF sAOFF X X X X X 0 0 0 1
PM16 PRINCIPAL MAIN DIVIDER COEFFICIENT PM0 0 1 0 0
X X X X X X PR10 PRINCIPAL REFERENCE DIVIDER COEFFICIENT PR0 0 1 0 1
X X X AM13 AUXILIARY MAIN DIVIDER COEFFICIENT AM0 0 1 1 0
X X X X X X AR10 AUXILIARY REFERENCE DIVIDER COEFFICIENT AR0 0 1 1 1

Notes

1. FT = first, LT = last; sPOFF = software power-down for principal synthesizer (1 = OFF); sAOFF = software power-down for auxiliary synthesizer
(1 = OFF).

2. The test register should not be programmed with any other value except all zeros for normal operation.

(2)

0000

Philips Semiconductors Product specification

Low-voltage dual frequency

synthesizer for radio telephones

Table 3 Out-of-lock select

OLP OLA OUT-OF-LOCK ON PIN 20

0 0 output disabled
0 1 auxiliary phase error
1 0 principal phase error
1 1 both auxiliary and principal

UMA1020AM

Philips Semiconductors Product specification

Low-voltage dual frequency

UMA1020AM

synthesizer for radio telephones

Table 4 Fast and normal charge pumps current ratio (note 1)

CR1 CR0 I

00 4×I
01 4×I
10 4×I
11 4×I

CPA

SET
SET
SET
SET

I

4 × I
4 × I
2 × I
2 × I

CPP

SET
SET
SET
SET

Note

V

14

1. I

= ; common bias current for charge pumps.

---------- -

SET

R

ext

Table 5 Power-down modes

AOFF POFF FAST

PRINCIPAL

DIVIDERS

AUXILIARY

DIVIDERS

1 1 X OFF OFF OFF OFF OFF
1 0 0 ON OFF OFF ON OFF
1 0 1 ON OFF OFF ON ON
0 1 X OFF ON ON OFF OFF
0 0 0 ON ON ON ON OFF
0 0 1 ON ON ONONON

I

CPPF

16 × I
32 × I
24 × I
32 × I

PUMP

CPA

SET
SET
SET
SET

PUMP

CPP

I

CPPF:ICPP

4:1

8:1
12 : 1
16 : 1

PUMP

CPPF

Power-down modes

The action of the control inputs on the state of internal
blocks is defined by Table 5.

Note that in Table 5, POFF and AOFF can be either the
software or hardware power-down signals. The dividers
are ON when both hardware and software power-down
signals are at logic 0.

When either synthesizer is reactivated after power-down
the main and reference dividers of that synthesizer are
synchronized to avoid the possibility of random phase
errors on power-up.

1995 Jul 06 7

Philips Semiconductors Product specification

Low-voltage dual frequency

UMA1020AM

synthesizer for radio telephones

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER MIN. MAX. UNIT

V

DD

V

CC

∆V

CC−DD

V

n

V

2, 3, 17

∆V

GND

P

tot

T

stg

T

amb

T

j

HANDLING

digital supply voltage −0.3 +5.5 V
analog supply voltage −0.3 +5.5 V
difference in voltage between VCC and V

DD

−0.3 +5.5 V
voltage at pins 1, 6, 8 to 15, 19 and 20 −0.3 VDD+ 0.3 V
voltage at pins 2, 3 and 17 −0.3 VCC+ 0.3 V
difference in voltage between AGND and DGND

−0.3 +0.3 V
(these pins should be connected together)

total power dissipation − 150 mW
storage temperature −55 +125 °C
operating ambient temperature −30 +85 °C
maximum junction temperature − 95 °C

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air 120 K/W

1995 Jul 06 8

Philips Semiconductors Product specification

Low-voltage dual frequency

UMA1020AM

synthesizer for radio telephones

CHARACTERISTICS

V

DD1=VDD2

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply; pins 4, 5 and 18

V

DD

V

CC

I

DD

I

CC

I

CCPD

RF principal main divider input; pin 6

f

VCO

V

6(rms)

Z

I

C

I

R

pm

f

PPCmax

f

PPCmin

= 2.7 to 5.5 V; VCC= 2.7 to 5.5 V; T

digital supply voltage V
analog supply voltage VCC≥ V
principal synthesizer digital

supply current
auxiliary synthesizer digital supply

current
charge pumps supply current VCC= 5.5 V;

, I

current in power-down mode per

DDPD

supply

RF input frequency 1000 1500 1700 MHz
AC-coupled input signal level

(RMS value)
input impedance (real part) f
typical pin input capacitance indicative, not tested − 2 − pF
principal main divider ratio 512 − 131071
maximum principal phase

comparator frequency
minimum principal phase

comparator frequency

=25°C; unless otherwise specified.

amb

DD1=VDD2

DD

2.7 − 5.5 V

2.7 − 5.5 V

VDD= 5.5 V − 911mA

= 5.5 V − 2.7 4.0 mA

V

DD

− 0.4 1.0 mA

R

=12 kΩ

ext

logic levels 0 or V

DD

− 12 50 µA

Rs=50Ω 100 − 500 mV

= 1.7 GHz − 300 −Ω

VCO

− 2000 − kHz

− 10 − kHz

Auxiliary main divider input; pin 15

f

AI

V

15(rms)

input frequency 20 − 300 MHz
AC-coupled input signal level

(RMS value)

Rs=50Ω;

2.7V<VDD< 3.5 V
R

=50Ω;

s

3.5V<VDD< 5.5 V

Z

I

C

I

R

am

f

APCmax

input impedance (real part) fAI= 100 MHz − 1 − kΩ
typical pin input capacitance indicative, not tested − 2 − pF
auxiliary main divider ratio 64 − 16383
maximum auxiliary loop

comparison frequency

f

APCmin

minimum auxiliary loop
comparison frequency

1995 Jul 06 9

50 − 500 mV

100 − 500 mV

− 2000 − kHz

− 10 − kHz

Philips Semiconductors Product specification

Low-voltage dual frequency

UMA1020AM

synthesizer for radio telephones

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Crystal reference dividers input; pin 8

f

XTAL

V

8(rms)

Z

I

C

I

R

pr

R

ar

Charge pump current setting resistor input; pin 14

R

ext

V

14

Charge pump outputs; pins 17, 3 and 2; R

I

Ocp

I

match

I

Lcp

V

cp

Interface logic input signal levels; pins 13, 12, 11 and 1

V

IH

V

IL

I

bias

C

I

Lock detect output signal; pin 20 open-drain output

V

OL

crystal reference input frequency 3 − 40 MHz
sinusoidal input signal level

(RMS value)
input impedance (real part) f

5MHz<f
3MHz<f

= 30 MHz − 2 − kΩ

XTAL

< 40 MHz 50 − 500 mV

XTAL

< 40 MHz 100 − 500 mV

XTAL

typical pin input capacitance indicative, not tested − 2 − pF
principal reference divider ratio 8 − 2047
auxiliary reference divider ratio 8 − 2047

external resistor from pin 14 to

12 − 60 kΩ

ground
regulated voltage at pin 14 R

ext

=12kΩ−1.15 − V

ext

=12kΩ

charge pump output current error −25 − +25 %
sink-to-source current matching Vcp in range −±5−%
charge pump off leakage current Vcp=1⁄2V

CC

−5 ±1+5nA

charge pump voltage compliance 0.4 − VCC− 0.4 V

HIGH level input voltage 0.7V
LOW level input voltage −0.3 − 0.3V

− VDD+ 0.3 V

DD

DD

V
input bias current logic 1 or logic 0 −5 − +5 µA
input capacitance indicative, not tested − 2 − pF

LOW level output voltage I

= 0.4 mA −−0.4 V

sink

1995 Jul 06 10

Philips Semiconductors Product specification

Low-voltage dual frequency

UMA1020AM

synthesizer for radio telephones

SERIAL BUS TIMING CHARACTERISTICS

V

DD=VCC

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

Serial programming clock; CLK

t

r

t

f

T

cy

Enable programming;

t

START

t

END

t

W

t

SU;E

Register serial input data; DATA

t

SU;DAT

t

HD;DAT

=3V; T

=25°C unless otherwise specified.

amb

input rise time − 10 40 ns
input fall time − 10 40 ns
clock period 100 −−ns

E

delay to rising clock edge 40 −−ns
delay from last falling clock edge −20 −−ns
minimum inactive pulse width 4000

(1)

−−ns

enable set-up time to next clock edge 20 −−ns

input data to clock set-up time 20 −−ns
input data to clock hold time 20 −−ns

Note

1. The minimum pulse width (t

) can be smaller than 4 µs provided all the following conditions are satisfied:

W

a) Principal main divider input frequency

b) Auxiliary main divider input frequency

c) Reference dividers input frequency

f

XTAL

f

VCO

f

AI

512

>

--------- ­t

W

32

>

-----­t

W

3

>

----- ­t

W

Fig.3 Serial bus timing diagram.

1995 Jul 06 11

Philips Semiconductors Product specification

Low-voltage dual frequency
synthesizer for radio telephones

APPLICATION INFORMATION

UMA1020AM

Fig.4 Typical application block diagram.

1995 Jul 06 12

1995 Jul 06 13

BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB

B

B

B

B

B

B

B

B

BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB

B

B

B

B

B

B

B

B

BBBBBBBBBB

BBBBBBBBBBB

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

BBBBBBBBBBB

BBBBBBBBBB

B

B

B

B

B

B

B

B

BBBBBBBBBB

BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

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BBBBBBBBB

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BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB

BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB

BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB

BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB

BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB

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BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

Philips Semiconductors Product specification

Low-voltage dual frequency

synthesizer for radio telephones

BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

BBBBBBBBB

UMA1020AM

Fig.5 Typical test and application diagram.

Philips Semiconductors Product specification

Low-voltage dual frequency
synthesizer for radio telephones

PACKAGE OUTLINE

SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm

20

D

c

y

Z

11

E

H

UMA1020AM

SOT266-1

A

X

v M

E

A

pin 1 index

110

w M

b

e

DIMENSIONS (mm are the original dimensions)

mm

A

max.

1.5

0.1501.4

1.2

0.25

b

3

p

0.32

0.20

UNIT A1A2A

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

p

cD

0.20

6.6

0.13

6.4

0 2.5 5 mm

scale

(1)E(1)

eHELLpQZywv θ

4.5

0.65 1.0 0.2

4.3

6.6

6.2

Q

A

2

A

1

detail X

0.75

0.65

0.45

0.45

(A )

L

p

L

A

3

θ

0.13 0.1

0.48

0.18

(1)

o

10

o

0

OUTLINE
VERSION

SOT266-1

IEC JEDEC EIAJ

REFERENCES

1995 Jul 06 14

EUROPEAN

PROJECTION

ISSUE DATE

90-04-05
95-02-25

Philips Semiconductors Product specification

Low-voltage dual frequency
synthesizer for radio telephones

SOLDERING SO or SSOP
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
cases reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

Reflow soldering

Reflow soldering techniques are suitable for all SO and
SSOP packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

Wave soldering

(order code 9398 652 90011).

UMA1020AM

SSOP
Wave soldering isnot recommended for SSOP packages.

This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

If wave soldering cannot be avoided, the following
conditions must be observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave)
soldering technique should be used.

• The longitudinal axis of the package footprint must

be parallel to the solder flow and must incorporate
solder thieves at the downstream end.

Even with these conditions, only consider wave
soldering SSOP packages that have a body width of

4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).

METHOD (SO OR SSOP)
During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal

of corrosive residues in most applications.
SO
Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be

parallel to the solder flow.

• The package footprint must incorporate solder thieves at

the downstream end.

1995 Jul 06 15

Repairing soldered joints

Fix the component by first soldering two diagonally-

opposite end leads. Use only a low voltage soldering iron

(less than 24 V) applied to the flat part of the lead. Contact

time must be limited to 10 seconds at up to 300 °C. When

using a dedicated tool, all other leads can be soldered in

one operation within 2 to 5 seconds at 270 to 320 °C.

Philips Semiconductors Product specification

Low-voltage dual frequency

UMA1020AM

synthesizer for radio telephones

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1995 Jul 06 16

Philips Semiconductors Product specification

Low-voltage dual frequency
synthesizer for radio telephones

UMA1020AM

NOTES

1995 Jul 06 17

Philips Semiconductors Product specification

Low-voltage dual frequency
synthesizer for radio telephones

UMA1020AM

NOTES

1995 Jul 06 18

Philips Semiconductors Product specification

Low-voltage dual frequency
synthesizer for radio telephones

UMA1020AM

NOTES

1995 Jul 06 19

Philips Semiconductors – a worldwide company

Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428)

BUENOS AIRES, Tel. [phone], Fax. [phone]

Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]

Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]

Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands,

Tel. [phone], Fax. [phone]

Brazil: Rua do Rocio 220 - 5

CEP: 04552-903-SÃO PAULO-SP, Brazil.
P.O. Box 7383 (01064-970),
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS:

Tel. [phone], Fax. [phone]

Chile: Av. Santa Maria 0760, SANTIAGO,

Tel. [phone], Fax. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,

72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17,

77621 BOGOTA, Tel. [phone],
Fax. [phone]

Denmark: Prags Boulevard 80, PB 1919, DK-2300

COPENHAGEN S, Tel. [phone], Fax. [phone]

Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]

France: 4 Rue du Port-aux-Vins, BP317,

92156 SURESNES Cedex,
Tel. [phone], Fax. [phone]

Germany: P.O. Box 10 63 23, 20043 HAMBURG,

Tel. [phone], Fax. [phone].

Greece: No. 15, 25th March Street, GR 17778 TAVROS,

Tel. [phone] 911, Fax. [phone]

India: Philips INDIA Ltd, Shivsagar Estate, A Block,

Dr. Annie Besant Rd. Worli, Bombay 400 018
Tel. [phone], Fax. [phone]

Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4,

P.O. Box 4252, JAKARTA 12950,
Tel. [phone], Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS S.r.l.,

Piazza IV Novembre 3, 20124 MILANO,
Tel. [phone], Fax. [phone]

Japan: Philips Bldg13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong,

Yongsan-ku, SEOUL, Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,

SELANGOR, Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905,

Tel. [phone], Fax. [phone]

th

floor, Suite 51,

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
(From 10-10-1995: Tel. [phone], Fax. [phone])

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]

Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: Philips Electrical Industries of Pakistan Ltd.,

Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton,
KARACHI 75600, Tel. [phone],
Fax. [phone]

Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Portugal: PHILIPS PORTUGUESA, S.A.,

Rua dr. António Loureiro Borges 5, Arquiparque - Miraflores,
Apartado 300, 2795 LINDA-A-VELHA,
Tel. [phone], Fax. [phone]

Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

South Africa: S.A. PHILIPS Pty Ltd.,

195-215 Main Road Martindale, 2092 JOHANNESBURG,
P.O. Box 7430, Johannesburg 2000,
Tel. [phone], Fax. [phone].

Spain: Balmes 22, 08007 BARCELONA,

Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM,

Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West

Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. [phone], Fax. [phone]

Turkey:Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors LTD.,

276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. [phone], Fax. [phone]

United States:811 East Arques Avenue, SUNNYVALE,

CA 94088-3409, Tel. [phone], Fax. [phone]

Uruguay: Coronel Mora 433, MONTEVIDEO,

Tel. [phone], Fax. [phone]

Internet: http://www.semiconductors.philips.com/ps/
For all other countries apply to: Philips Semiconductors,

International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. [phone] (from 10-10-1995: [phone])

SCD41 © Philips Electronics N.V. 1995

All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.

Printed in The Netherlands

413061/1500/02/pp20 Date of release: 1995 Jul 06
Document order number: 9397 750 00194