Datasheet tza3033 DATASHEETS (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TZA3033

SDH/SONET STM1/OC3
transimpedance amplifier

Product specification
Supersedes data of 1998 Jul 08
File under Integrated Circuits, IC19

2000 Sep 29

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

FEATURES

• Low equivalent input noise of 1 pA/√Hz (typical)

• Wide dynamic range from 0.25 µA to 1.6 mA (typical)

• Differential transimpedance of 44 kΩ

• Bandwidth typical 130 MHz

• Differential outputs

APPLICATIONS

• Digital fibre optic receiver in short, medium and long
haul optical telecommunications transmission systems
or in high speed data networks

• Wideband RF gain block.

GENERAL DESCRIPTION

• On-chip Automatic Gain Control (AGC)

• No external components required

• Single supply voltage from 3.0 to 5.5 V

• Bias voltage for PIN diode

• Pin compatible with SA5223.

TheTZA3033isalow-noisetransimpedanceamplifierwith
AGC designed to be used in STM1/OC3 fibre optic links.
It amplifies the current generated by a photo detector
(PIN diode or avalanche photodiode) and converts it to a
differential output voltage.

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

TZA3033T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
TZA3033U − bare die in waffle pack carriers; die dimensions 1.030 × 1.300 mm −

BLOCK DIAGRAM

handbook, full pagewidth

V

CC

1 nF

DREF

The numbers in brackets refer to the pad numbers of the bare die version.
(1) AGC analog I/O is only available on the TZA3033U (pad 15).

1 (1)

3 (5)IPhoto

250 Ω

CONTROL

65 pF

TZA3033

3

2, 4, 5 (3, 4, 7, 8, 9, 10)

GND

Fig.1 Block diagram.

(1)

AGC

GAIN

peak detector

A1

low noise

amplifier single-ended to

A2

differential converter

BIASING

V

CC

8 (13, 14)(15)

(12) 7 OUTQ
(11) 6 OUT

MGR368

2000 Sep 29 2

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

PINNING

SYMBOL

PIN

TZA3033T

PAD

TZA3033U

TYPE DESCRIPTION

DREF 1 1 analog output bias voltage for PIN diode; cathode should be connected to

this pin
TESTA − 2 − for test purposes only; to be left open in application
GND 2 3, 4 ground ground
IPhoto 3 5 analog input current input; anode of PIN diode should be connected to this

pin; DC bias voltage is 1048 mV
TESTB − 6 − for test purposes only; to be left open in application
GND 4 7, 8 ground ground
GND 5 9, 10 ground ground
OUT 6 11 output data output; pin OUT goes HIGH when current flows into

pin IPhoto
OUTQ 7 12 output data output; compliment of pin OUT
V

CC

8 13, 14 supply supply voltage

AGC − 15 input/output AGC analog I/O

handbook, halfpage

DREF

IPhoto

GND

1
2

TZA3033T

3
4

MGR369

V

8

CC

OUTQGND

7

OUT

6

GND

5

Fig.2 Pin configuration.

2000 Sep 29 3

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

FUNCTIONAL DESCRIPTION

The TZA3033 is a transimpedance amplifier intended for
use in fibre optic links for signal recovery in STM1/OC3
applications. It amplifies the current generated by a photo
detector (PIN diode or avalanche photodiode) and
transforms it into a differential output voltage. The most
important characteristics of theTZA3033 are highreceiver
sensitivity and wide dynamic range.

Highreceiver sensitivity is achieved by minimizing noisein
the transimpedance amplifier. The signal current
generated by a PIN diode can vary between

0.25 µA to 1.6 mA (p-p). An AGC loop (see Fig.1) is
implemented to make it possible to handle such a wide
dynamic range. The AGC loop increases the dynamic
range of the receiver by reducing the feedback resistance
of the preamplifier.

handbook, full pagewidth

V

CC

266 Ω 266 Ω

The AGC loop hold capacitor is integrated on-chip, so an
external capacitor is not needed for AGC. The AGC
voltage can be monitored at pad 15 on the bare die
(TZA3033U).Pad 15isnotbondedin the packaged device
(TZA3033T). This pad can be left unconnected during
normal operation. It can also be used to force an external
AGC voltage. If pad 15 (AGC) is connected to VCC, the
internal AGC loop is disabled and the receiver gain is at a
maximum. The maximum input current is then
approximately 10 µA.

A differential amplifier converts the output of the
preamplifier to a differential voltage (see Fig.3).

The logic level symbol definitions are shown in Fig.4.

30 Ω

30 Ω

OUTQ
OUT

handbook, full pagewidth

4.5 mA

2 mA

4.5 mA

MGT547

Fig.3 Data output circuit.

V

CC

V

O(max)

V

OQH

V

OH

V

o(p-p)

V

V

O(min)

OQL

V

OL

V

OO

MGR243

Fig.4 Logic level symbol definitions for data outputs OUT and OUTQ.

2000 Sep 29 4

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

PIN diode bias voltage DREF

The transimpedance amplifier together with the PIN diode
determine to a large extent the performance of an optical
receiver. The key parameters of a transimpedance
amplifier like sensitivity, bandwidth, and the PowerSupply

250 Ω

C1
65 pF

R1

V

CC

8

TZA3033

MGT548

Rejection Ratio (PSSR), are especially influenced by how
the PIN diode is connected to the input and the layout
around the input pin. The total capacitance at the input pin
is critical to obtain the highest sensitivity. It should be kept
to a minimum by reducing the capacitor of the PIN diode
and the parasitics around the input pin. The PIN diode
should be placed very close to the IC to reduce the
parasitics. Because the capacitance of the PIN diode
depends on the reverse voltage across it, the reverse
voltage should be selected as high as possible.

The PIN diode can be connected to the input as shown in
Fig.5. In Fig.5 the PIN diode is connected between DREF
and IPhoto. Pin DREF provides an easy bias voltage for
thePIN diode. The voltage atDREFis derived from VCCby
a low-pass filter. The low-pass filter consisting of the
internal resistor R1, the internal capacitor C1 and the
externalcapacitor C2rejectsthesupplyvoltagenoise.The
external capacitor C2 should be equal to or larger than
1 nF for a high PSRR.

DREF

1

C2

1 nF

I

i

3IPhoto

Fig.5 Connecting the PIN diode to the input.

It is preferable to connect the cathode of the PIN diode to
a voltage higher than VCC when such a voltage source is
available on the board. In this case the DREF pin can be
left unconnected.

The reverse voltage across the PIN diode is 3.95 V
(5 − 1.05 V) for a 5 V supply and 2.25 V (3.3 − 1.05 V) for
a 3.3 V supply.

2000 Sep 29 5

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

AGC

The TZA3033 transimpedance amplifier can handle input
currents from 0.25 µA to 1.6 mA. This means a dynamic
range of 79 dB. At low input currents, the transimpedance
mustbehigh to obtain an adequate output voltage,andthe
noise should be suitably low to guarantee minimum bit
error rate. At high input currents however, the
transimpedance should be low to avoid pulse width
distortion. This means that the gain of the amplifier has to
vary depending on the input signal level to handle such a
wide dynamic range. This is achieved in the TZA3033 by
implementing an Automatic Gain Control (AGC) loop.

TheAGCloop consists of a peak detector, aholdcapacitor
and a gain control circuit. The peak amplitude of the signal
is detected by the peak detector and stored on the hold
capacitor. The voltage across the hold capacitor is
compared to athreshold level. The threshold level is set at
an input current of 2.5 µA (p-p). AGC becomes active only
for input signals larger than the threshold level. It is
disabled for smaller signals. The transimpedance is then
at its maximum value (44 kΩ differential).

When the AGC is active, the feedback resistance of the
transimpedance amplifier is reduced to keep the output
voltage constant. The transimpedance is regulated from
44 kΩat low currents (I < 2.5 µA) to200 Ωat high currents
(I < 500 µA). Above 500 µA the transimpedance is at its
minimum and can not be reduced further but the front-end
remains linear until input currents of 1.6 mA (p-p).

The upper graph of Fig.5 shows the output voltages V
and V

of the TZA3033 as a function of the DC input

OUTQ

OUT

current for a supply voltage of 3 V. In the lower graph the
difference between both output voltages, V

, is shown

o(dif)

for supply voltages of 3, 3.3 and 5 V. It can seen from the
graph that the output changes linearly up to an input
current of 2.5 µA where the AGC becomes active. From
this point on, the AGC tries to keep the differential output
voltage constant around 110 mV for medium range input
currents (input currents < 200 µA). The AGC can not
regulate for input currents above 500 µA, and the output
voltage rises again with the input current.

2.05

handbook, full pagewidth

V

o

(V)

1.95

1.85

1.75

1.65
300

V

o(dif)

(mV)

200

100

0

−1

10

(1) VCC= 3.0 V.
(2) VCC= 3.3 V.
(3) VCC= 5.0 V.

(1)

11010

2103

(2)

(3)

V

OUT

VCC = 3 V

V

OUTQ

Ii (µA)

MGT562

4

10

Fig.5 AGC characteristics.

2000 Sep 29 6

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL PARAMETER MIN. MAX. UNIT

V
V

I

P
T
T
T

CC
n

n

tot
stg
j
amb

supply voltage −0.5 +5.5 V
DC voltage

pin 3/pad 5: IPhoto −0.5 +2 V
pins 6 and 7/pads 11 and 12: OUT and OUTQ −0.5 V
pad 15: AGC (TZA3033U only) −0.5 V
pin 1/pad 1: DREF −0.5 V

+ 0.5 V

CC

+ 0.5 V

CC

+ 0.5 V

CC

DC current

pin 3/pad 5: IPhoto −1 +2.5 mA
pins 6 and 7/pads 11 and 12: OUT and OUTQ −15 +15 mA
pad 15: AGC (TZA3033U only) −0.2 +0.2 mA

pin 1/pad 1: DREF −2.5 +2.5 mA
total power dissipation − 300 mW
storage temperature −65 +150 °C
junction temperature − 150 °C
ambient temperature −40 +85 °C

HANDLING

Precautions should be taken to avoid damage through electrostatic discharge. This is particularly important during
assembly and handling of the bare die. Additional safety can be obtained by bonding the VCC and GND pads first, the
remaining pads may then be bonded to their external connections in any order.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th(j-s)

thermal resistance from junction to solder point 160 K/W

2000 Sep 29 7

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

CHARACTERISTICS

For typical values T
temperature range and process spread; all voltages are measured with respect to ground; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

I

CC

P

tot

T

j

T

amb

R

tr

supply voltage 3 5 5.5 V
supply current AC coupled; RL=50Ω

total power dissipation VCC= 5 V 100 190 330 mW

junction temperature −40 − +125 °C
ambient temperature −40 +25 +85 °C
small-signal transresistance

of the receiver

f

−3dB(h)

high frequency −3 dB point AC coupled; measured

PSRR power supply rejection ratio measured differentially;

Bias voltage: pin DREF

R

DREF

resistance between pins
DREF and V

Input: pin IPhoto

V

bias(IPhoto)

input bias voltage on
pin IPhoto

I

i(IPhoto)(p-p)

input current on pin IPhoto
(peak-to-peak value)

R

i

I

n(tot)

small-signal input resistance fi= 1 MHz;

total integrated RMS noise
current over bandwidth
(referenced to input)

=25°C and VCC= 5 V; minimum and maximum values are valid over the entire ambient

amb

V

=5V 203860mA

CC

V

=3.3V 203550mA

CC

V

= 3.3 V 60 116 180 mW

CC

AC coupled; measured
differentially

R

= ∞ 42 90 112 kΩ

L

R

=50Ω 21 45 66 kΩ

L

differentially; Ci= 0.7 pF;
RL=50Ω

= 125 °C 90 130 − MHz

T

j

T

= 100 °C 100 130 − MHz

j

note 1

f = 100 kHz to 10 MHz − 0.5 −µA/V
f = 100 MHz − 10 −µA/V

DC tested 210 245 290 Ω

CC

800 1050 1300 mV

note 2

V

=5V 011800µA

CC

V

= 3.3 V 0 1 1600 µA

CC

− 330 −Ω

input current < 0.5 µA
∆f = 90 MHz; note 3 − 16 − nA

2000 Sep 29 8

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Data outputs: OUT and OUTQ

V

o(cm)

V

o(se)(p-p)

V

OO

R

o(se)

t

r

t

f

Automatic gain control loop: pad AGC

I

th(AGC)

t

att(AGC)

t

decay(AGC)

Notes

1. PSRR is defined as the ratio of the equivalent current change at the input (∆I
PSRR

For example, a + 4 mV disturbance on V
external capacitor between DREF and GND has a large impact on PSRR. The specification is valid with an external
capacitor of 1 nF. The PSSR is guaranteed by design.

2. The Pulse Width Distortion (PWD) is <5% over the whole input current range. The PWD is defined as:
PWD

PRBS pattern of 10

3. All I

photodiode itself, with 0.3 pF allowed for the printed-circuit board layout and 0.2 pF intrinsic to the package. Noise
performance is measured differentially.

common mode output voltage AC coupled; RL=50Ω VCC− 1.34 VCC− 1.15 VCC− 0.96 V
single-ended output voltage

(peak-to-peak value)
differential output offset

voltage
single-ended output

AC coupled; RL=50Ω;
input current = 100 µA

40 110 200 mV

(p-p)

VCC=5V −50 +55 +150 mV
V

= 3.3 V −50 +35 +100 mV

CC

DC tested 36 44 57 Ω

resistance
rise time 20% to 80% − 2.3 3.9 ns
fall time 80% to 20% − 2.3 3.9 ns

AGC threshold current referred to the peak input

− 2.5 −µA

current; tested at 10 MHz
AGC attack time − 5 −µs
AGC decay time − 10 − ms

) to a change in supply voltage:

IPhoto

∆I

IPhoto

=

------------------ ­∆V

CC

at 10 MHz will typically add an extra 2 nA to the photodiode current. The

CC

pulse width



----------------------------- -



T

measurements were made with an input capacitance of Ci= 1 pF. This was comprised of 0.5 pF for the

n(tot)

−23

1–

.

where T is the clock period. The PWD is measured differentially with

100%×=

2000 Sep 29 9

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

TYPICAL PERFORMANCE CHARACTERISTICS

36.5

handbook, halfpage

I

CC

(mA)

36.0

35.5

35.0

34.5

34.0

3.0 5.5

3.5 4.0 4.5 5.0

MGT549

VCC (V)

Fig.6 Supply current as a function of the supply

voltage.

50

handbook, halfpage

I

CC

(mA)

45

40

35

30

25

−40 0 40 120

(1) VCC=5V.
(2) VCC= 3.3 V.
(3) VCC=3V.

MGT550

(1)

(2)
(3)

80

Tj (°C)

Fig.7 Supply current as a function of the junction

temperature.

1.055

handbook, halfpage

V

i

(V)

1.050

1.045

1.040

1.035

1.030

3.0 5.5

3.5 4.0 4.5 5.0

MGT551

VCC (V)

Fig.8 Input voltage as a function of the supply

voltage.

1.12

handbook, halfpage

V

i

(V)

1.10

1.08

1.06

1.04

1.02

1.00

−40 0 40 120

(1) VCC=5V.
(2) VCC= 3.3 V.
(3) VCC=3V.

(1)

(2)

(3)

MGT552

80

Tj (°C)

Fig.9 Input voltage as a function of the junction

temperature.

2000 Sep 29 10

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

1.130

handbook, halfpage

V

o(cm)

(V)

1.129

1.128

1.127

3.0 5.5

(1) VCC− V
(2) VCC− V

OUT
OUTQ

(1)

(2)

3.5 4.0 4.5 5.0

.

.

MGT553

VCC (V)

Fig.10 Common mode voltage at the output as a

function of supply voltage.

1.155

handbook, halfpage

V

o(cm)

(V)

1.145

1.135

1.125

1.115

1.105

1.095

−40 0 40 120

VCC=5V.
(1) VCC− V
(2) VCC− V

OUT
OUTQ

(1)(2)

.

.

MGT554

80

Tj (°C)

Fig.11 The common mode voltageat the output as

a function of the junction temperature.

APPLICATION INFORMATION

handbook, full pagewidth

DREF

1

IPhoto

3

1 nF

2

22 nF

GND

10 µH

V

CC

8

TZA3033T

4

GND5GND

V

680 nF

P

7

6

OUTQ

OUT

Fig.12 Application diagram.

Zo = 50 Ω

Zo = 50 Ω

100 nF

100 nF

R3
50 Ω

R4
50 Ω

MGR370

2000 Sep 29 11

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2000 Sep 29 12

V

CC

handbook, full pagewidth

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

100
nF

DREF

IPhoto

1

3

2

(1) (1) (1)

22 nF

V

CC

8

OUTQ

7

TZA3033T TZA3034

OUT

6

GND4GND5GND

31 pF

noise filter:
1-pole, 100 MHz

29.2
pF

optional noise filter:
3-pole, 120 MHz Bessel

680 nF

64.4 nH

64.4 nH

100 Ω

10 nF

10 nF

4.5
pF

DIN

DINQ

100 nF

6

(11, 12)

4 (7)

5 (8)

(3, 4, 6, 9)

3

AGND

V

CCA

(1, 14)

1

16

(30)

SUB

135 kΩ

RSET

(16)

8

JAM

(13)

CF

7

(17)

9

STQ

V

ref

15

(29)

(19, 20, 22, 25)

(18)

10

ST

V

14

(27, 28)

(24) 13

(23) 12

11

DGND

CCD

100 nF

DOUT

DOUTQ

1 kΩ

50 Ω 50 Ω

MGT555

100 nF

data out

100 nF

level detect
status

VCC − 2 V

(1) Ferrite bead e.g. Murata BLM10A700S.

Fig.13 STM1/OC3 receiver using the TZA3033 and TZA3034.

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

Test circuits

handbook, full pagewidth

NETWORK ANALYZER

S-PARAMETER TEST SET

PORT 1 PORT 2

PATTERN

GENERATOR

23

−1 PRBS

2
DATA

Zo = 50 Ω

10 nF

51 Ω

1 kΩ

R

IN

TZA3033T

V

CC

GND

100 nF

OUT

OUTQ

100 nF

Zo = 50 Ω

SAMPLING OSC

1
2

trigger
input

23

2

−1 PRBS CLOCK

Total impedance of the test circuit is ZT and is calculated by the equation ZT=S21x(R+ZIN)x2
where S

Typical values: R = 1 kΩ, Z

is the insertion loss of ports 1 and 2.

21

= 330 Ω.

IN

Fig.14 Test circuit.

Zo = 50 Ω

MGT556

2000 Sep 29 13

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

handbook, full pagewidth

23

2

-1 PRBS

PATTERN

GENERATOR

C

D

C

155.520 Mb/s

LIGHTWAVE MULTIMETER

−9.54 dBm

OPTICAL ATTENUATOR
0 dBm/1300

LASER DRIVER

TRD
C IN

TZA3041

DIN

DINQ

OPTICAL

INPUT

IN OUT

Laser

ERROR DETECTOR

DatainClock

in

V

10%90%

PIN

10 nF

OM5804OM5802

CC

BLM

DREF

IPhoto

TZA3033

22 nF

OUT

OUTQ

100 nF

100 nF

Zo =
50 Ω

SAMPLING

OSCILLOSCOPE/

TDR/TDT

1
2

Zo = 50 Ω

MGT557

TR

Fig.15 Optical test circuit.

2000 Sep 29 14

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

handbook, full pagewidth

Fig.16 Differential output with −35 dBm optical input power [input current of 0.517 µA (p-p)].

MGT558

handbook, full pagewidth

Fig.17 Differential output with −25 dBm optical input power [input current of 5.17 µA (p-p)].

2000 Sep 29 15

MGT559

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

handbook, full pagewidth

Fig.18 Differential output with −15 dBm optical input power [input current of 51.7 µA (p-p)].

MGT560

handbook, full pagewidth

Fig.19 Differential output with −2 dBm optical input power [input current of 1030 µA (p-p)].

2000 Sep 29 16

MGT561

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

BONDING PAD LOCATIONS

COORDINATES

(1)

SYMBOL PAD

xy

DREF 1 95 881
TESTA 2 95 735
GND 3 95 618
GND 4 95 473
IPhoto 5 95 285
TESTB 6 95 147
GND 7 215 95
GND 8 360 95
GND 9 549 95
GND 10 691 95
OUT 11 785 501
OUTQ 12 785 641
V

CC

V

CC

13 567 1055
14 424 1055

AGC 15 259 1055

Note

1. All coordinates are referenced, in µm, to the bottom
left-hand corner of the die.

VCCV

13

CC

GND

12

11

10

GND

MGT563

1300

µm

DREF

TESTA

GND

GND

IPhoto

TESTB

x

0

AGC

14

15

1

2

3

4

5

6

0

y

TZA3033U

7

89

GND

GND

1030 µm

Fig.20 Bonding pad locations of the TZA3033U.

OUTQ

OUT

Physical characteristics of the bare die

PARAMETER VALUE

Glass passivation 2.1 µm PhosphoSilicate Glass (PSG) on top of 0.65 µm oxynitride
Bonding pad dimension minimum dimension of exposed metallization is 90 × 90 µm (pad size = 100 × 100 µm)
Metallization 1.22 µm W/AlCu/TiW
Thickness 380 µm nominal
Size 1.03 × 1.30 mm (1.34 mm

2

)
Backing silicon; electrically connected to GND potential through substrate contacts
Attach temperature <440 °C; recommended die attach is glue
Attach time <15 s

2000 Sep 29 17

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

PACKAGE OUTLINE

SO8: plastic small outline package; 8 leads; body width 3.9 mm

SOT96-1

y

Z

8

pin 1 index

1

D

c

5

A

2

A

1

4

e

w M

b

p

E

H

E

detail X

A

X

v M

A

Q

(A )

L

p

L

A

3

θ

0 2.5 5 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

OUTLINE
VERSION

SOT96-1

A

max.

1.75

0.069

A1A2A

0.25

1.45

0.10

1.25

0.010

0.057

0.004

0.049

IEC JEDEC EIAJ

076E03 MS-012

0.25

0.01

b

3

p

0.49

0.25

0.36

0.19

0.019

0.0100

0.014

0.0075

UNIT

inches

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

(1)E(2)

cD

5.0

4.8

0.20

0.19

REFERENCES

4.0

3.8

0.16

0.15

1.27

0.050

2000 Sep 29 18

eHELLpQZywv θ

1.05

1.0

0.4

0.039

0.016

0.7

0.6

0.028

0.024

0.25 0.10.25

0.010.010.041 0.004

EUROPEAN

PROJECTION

6.2

5.8

0.244

0.228

(1)

0.7

0.3

0.028

0.012

ISSUE DATE

97-05-22
99-12-27

o

8

o

0

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

SOLDERING
Introduction to soldering surface mount packages

Thistextgives a very brief insight toacomplextechnology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering can still be used for
certainsurfacemountICs, but it is not suitable for finepitch
SMDs. In these situations reflow soldering is
recommended.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board by screenprinting, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.

Wave soldering

Conventional single wave soldering is not recommended
forsurfacemountdevices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswithleads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

2000 Sep 29 19

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

WAVE REFLOW

(1)

BGA, LFBGA, SQFP, TFBGA not suitable suitable

SOLDERING METHOD

HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable

(3)

PLCC

, SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

(2)

(3)(4)
(5)

suitable

suitable
suitable

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

2000 Sep 29 20

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

DATA SHEET STATUS

DATA SHEET STATUS

Objective specification Development This data sheet contains the design target or goal specifications for

Preliminary specification Qualification Thisdata sheet contains preliminary data, and supplementary data will be

Product specification Production This data sheet contains final specifications. Philips Semiconductors

Note

1. Please consult the most recently issued data sheet before initiating or completing a design.

DEFINITIONS
Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseor at any other conditionsabovethosegiven in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuch applications will be
suitable for the specified use without further testing or
modification.

DISCLAIMERS
Life support applications  These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personalinjury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

PRODUCT

STATUS

DEFINITIONS

product development. Specification may change in any manner without
notice.

published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.

reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.

Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofany of these products, conveys no licence ortitle
under any patent, copyright, or mask work right to these
products,and makes no representations orwarrantiesthat
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.

BARE DIE DISCLAIMER

All die are tested and are guaranteed to comply with all
data sheet limits up to the point of wafer sawing for a
periodof ninety (90) daysfrom the dateof Philips' delivery.
If there are data sheet limits not guaranteed, these will be
separately indicated in the data sheet. There are no post
packing tests performed on individual die or wafer. Philips
Semiconductorshas no control of thirdparty procedures in
the sawing, handling, packing or assembly of the die.
Accordingly, Philips Semiconductors assumes no liability
for device functionality or performance of the die or
systems after third party sawing, handling, packing or
assembly of the die. It is the responsibility of the customer
to test and qualify their application in which the die is used.

(1)

2000 Sep 29 21

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

NOTES

2000 Sep 29 22

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

NOTES

2000 Sep 29 23

Philips Semiconductors – a w orldwide compan y

Argentina: see South America
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Tel. [phone], Fax. [phone]
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Tel. [phone], Fax. [phone]
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Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
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Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. [phone], Fax. [phone]

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Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
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Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. [phone], Fax [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
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Portugal: see Spain
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Tel. [phone], Fax. [phone]
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Slovenia: see Italy
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Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
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Taiwan: Philips Semiconductors, 5F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
60/14 MOO 11, Bangna Trad Road KM. 3, Bagna, BANGKOK 10260,
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Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
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Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone], Fax. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN,
The Netherlands, Fax. [phone]

© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

2000

Internet: http://www.semiconductors.philips.com

70

Printed in The Netherlands 403510/200/02/pp24 Date of release: 2000 Sep 29 Document order number: 9397 750 07308