Datasheet TXS0101 Datasheet (Texas Instruments)

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Page 1

1.8V

System

Controller

TXS0101

3.3V

System

Data A B Data

GND GND GND

CCA

CCB

Product Folder

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Support & Community

TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

TXS0101 1-Bit Bidirectional Level-Shifting, Voltage-Level Translator With Auto-Direction-

Sensing for Open-Drain and Push-Pull Applications

1 Features

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

• ESD Protection Exceeds JESD 22 – A Port

– 2500 V Human-Body Model (A114-B) – 200 V Machine Model (A115-A) – 1500 V Charged-Device Model (C101)

– B Port

– 8 kV Human-Body Model (A114-B) – 200 V Machine Model (A115-A) – 1500 V Charged-Device Model (C101)

• No Direction-Control Signal Needed

• Maximum Data Rates – 24 Mbps (Push Pull) – 2 Mbps (Open Drain)

• Available in the Texas Instruments NanoFree™ Package

• 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (V

• VCCIsolation Feature – If Either VCCInput Is at GND, Both Ports Are in the High-Impedance State

• No Power-Supply Sequencing Required – Either V

CCA

• I

Supports Partial-Power-Down Mode Operation

off

CCA

or V

≤ V

)

CCB

Can be Ramped First

CCB

2 Applications

• Handsets

• Smartphones

• Tablets

• Desktop PCs

3 Description

This one-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track V voltage from 1.65 V to 3.6 V. The B port is designed to track V V

. V

CCB

. V

CCB

CCA

accepts any supply voltage from 2.3 V to

CCB

5.5 V. This allows for low voltage bidirectional translation between any of the 1.8 V, 2.5 V, 3.3 V, and 5 V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pull-down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Device Information

PART NUMBER PACKAGE BODY SIZE (NOM)

TXS0101DBV SOT-23 (6) 2.90 mm × 1.60 mm TXS0101DCK SC70 (6) 2.00 mm × 1.25 mm TXS0101DRL SOT-5X3 (6) 1.90 mm × 1.60 mm TXS0101YZP DSBGA (6) 0.89 mm × 1.39 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

CCA

. V

accepts any supply

CCA

must be less than or equal to

(1)

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

Typical Operating Circuit

Page 2

TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

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1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description ............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 4

6.1 Absolute Maximum Ratings ...................................... 4

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions ...................... 5

6.4 Thermal Information ................................................. 5

6.5 Electrical Characteristics .......................................... 6

6.6 Timing Requirements: V

6.7 Timing Requirements V

6.8 Timing Requirements: 3.3 V ± 0.3 V ........................ 7

6.9 Switching Characteristics: V

6.10 Switching Characteristics: V

6.11 Switching Characteristics: V

6.12 Typical Characteristics ......................................... 13

= 1.8 V ± 0.15 V ........ 7

CCA

= 2.5 V ± 0.2 V ............ 7

CCA

= 1.8 V ± 0.15 V .... 8

CCA

= 2.5 V ± 0.2 V .... 9

CCA

= 3.3 V ± 0.3 V .. 12

CCA

7 Parameter Measurement Information ................ 14

7.1 Load Circuits ........................................................... 14

7.2 Voltage Waveforms................................................. 15

8 Detailed Description............................................ 16

8.1 Overview................................................................. 16

8.2 Functional Block Diagram....................................... 16

8.3 Feature Description................................................. 17

8.4 Device Functional Modes........................................ 17

9 Application and Implementation ........................ 18

9.1 Application Information............................................ 18

9.2 Typical Application ................................................. 18

10 Power Supply Recommendations ..................... 20

11 Layout................................................................... 20

11.1 Layout Guidelines ................................................. 20

11.2 Layout Example .................................................... 20

12 Device and Documentation Support ................. 21

12.1 Device Support...................................................... 21

12.2 Receiving Notification of Documentation Updates 21

12.3 Community Resources.......................................... 21

12.4 Trademarks........................................................... 21

12.5 Electrostatic Discharge Caution............................ 21

12.6 Glossary................................................................ 21

13 Mechanical, Packaging, and Orderable

Information........................................................... 21

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision C (December 2015) to Revision D Page

• Changed YZP package pinout diagram with new image and added YZP pin assignments in Pin Functions table .............. 3

• Added Junction temperature, TJin Absolute Maximum Ratings table ................................................................................... 4

• Added Receiving Notification of Documentation Updates section ....................................................................................... 21

Changes from Revision B (January 2009) to Revision C Page

• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and

Mechanical, Packaging, and Orderable Information section.................................................................................................. 1

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Page 3

1 2

Not to scale

A B

GND OE

CCAVCCB

CCA

GND

CCB

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5 Pin Configuration and Functions

TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

DBV, DCK, and DRL Package 6-Pin SOT-23, SC70, and SOT

Top View

YZP Package 6-Pin DSBGA

Bottom View

Pin Functions

NAME

DBV, DCK,

DRL

YZP

A 3 C1 I/O Input/output A. Referenced to V B 4 C2 I/O Input/output B. Referenced to V GND 2 B1 G Ground OE 5 B2 I Output enable. Pull OE low to place all outputs in 3-state mode. Referenced to V V

CCA

CCB

1 A1 I A-port supply voltage. 1.65 V ≤ V 6 A2 I B-port supply voltage. 2.3 V ≤ V

TYPE DESCRIPTION

CCA CCB

≤ 3.6 V and V

CCA

CCB

≤ 5.5 V

CCA

≤ V

CCB

CCA

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TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

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6 Specifications

6.1 Absolute Maximum Ratings

(2) (3)

(1)

MIN MAX UNIT

A port –0.5 4.6 B port, OE –0.5 6.5 A port –0.5 4.6 B port –0.5 6.5 A port –0.5 V B port –0.5 V

CCA CCB

+ 0.5 + 0.5

over operating free-air temperature range (unless otherwise noted)

V V

T T

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. (3) The value of V

Supply voltage –0.5 4.6 V

CCA

Supply voltage –0.5 6.5 V

CCB

Input voltage

Voltage range applied to any output

in the high-impedance or power-off state

Voltage range applied to any output in the high or low state

(2)

Input clamp current VI< 0 –50 mA Output clamp current VO< 0 –50 mA Continuous output current ±50 mA Continuous current through V Junction temperature 150 °C

Storage temperature –65 150 °C

stg

CCA

, V

, or GND ±100 mA

CCB

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

CCA

and V

are provided in the recommended operating conditions table.

CCB

6.2 ESD Ratings

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, A Port Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, B Port

Electrostatic discharge

(ESD)

Charged device model (CDM), per JEDEC specification JESD22-C101,

(2)

B Port Machine model (MM, A115-A), A Port ±200

(1) JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.

(1) (1)

VALUE UNIT

±2500 ±8000

±1500

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6.3 Recommended Operating Conditions

(1) (2)

See

CCA

CCB

Δt/Δv

(1) V (2) V (3) V

Supply voltage

High-level input voltage

Low-level input voltage

Input transition rise or fall rate

Operating free-air temperature –40 85 °C

is the supply associated with the input port.

CCI

is the supply associated with the output port.

CCO

must be less than or equal to V

CCA

(3)

A-port I/Os

B-port I/Os OE input V A-port I/Os

OE input 0 V A-port I/Os, push-

pull driving

pull driving Control Input 10

CCB

, and V

must not exceed 3.6 V.

CCA

SCES638D –OCTOBER 2007–REVISED JUNE 2017

CCA

1.65 V to 1.95 V

2.3 V to 3.6 V V

CCB

2.3 V to 5.5 V

1.65 V to 3.6 V 2.3 V to 5.5 V

TXS0101

MIN MAX UNIT

1.65 3.6

2.3 5.5

– 0.2 V

CCI

– 0.4 V

CCI

– 0.4 V

CCI

× 0.65 5.5

CCA

0 0.15

CCA

CCI CCI CCI

× 0.35

VB-port I/Os 0 0.15

ns/VB-port I/Os, push-

6.4 Thermal Information

TXS0101

THERMAL METRIC

R R R

Junction-to-ambient thermal resistance 223.9 266.9 204.2 107.8 °C/W

θJA

Junction-to-case (top) thermal resistance 185.6 80.4 76.4 1.6 °C/W

θJC(top)

Junction-to-board thermal resistance 63.5 99.1 38.7 10.8 °C/W

θJB

Junction-to-top characterization parameter 63.5 1.5 3.4 3.1 °C/W

Junction-to-board characterization parameter 71.8 98.3 38.5 10.8 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(1)

UNITDBV (SOT-23) DCK (SC70) DRL (SOT) DSBGA (YZP)

6 PINS 6 PINS 6 PINS 6 PINS

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TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

6.5 Electrical Characteristics

over recommended operating free-air temperature range of –40°C to 85°C (unless otherwise noted) See

PARAMETER

OHA

OLA

OHB

OLB

off

CCA

CCB

+ I

CCA

CIOE

(1) V

CCI

(2) V

CCO

(3) V

CCA

A port

B port

A or B port

CCB

A port

B port

is the VCCassociated with the input port.

is the VCCassociated with the output port. must be less than or equal to V

TEST

CONDITIONS

IOH= –20 μA, VIB≥ V

CCB

– 0.4 V

IOL= 1 mA, VIB≤ 0.15 V

IOH= –20 μA, VIA≥ V

CCA

– 0.2 V

IOL= 1 mA, VIA≤ 0.15 V

TA= 25°C –40°C to 85°C ±2 TA= 25°C –40°C to 85°C ±2 TA= 25°C –40°C to 85°C ±2 TA= 25°C –40°C to 85°C ±2

VI= VO= open,

CCA

1.65 V to 3.6 V 2.3 V to 5.5 V V

CCB

MIN TYP MAX UNIT

× 0.67 V

CCA

1.65 V to 3.6 V 2.3 V to 5.5 V 0.4 V

1.65 V to 3.6 V 2.3 V to 5.5 V V

× 0.67 V

CCB

1.65 V to 3.6 V 2.3 V to 5.5 V 0.4 V

1.65 V to 3.6 V 1.65 V to 5.5 V

0 V 0 to 5.5 V

0 to 3.6 V 0 V

1.65 V to 3.6 V 2.3 V to 5.5 V

1.65 V to V

CCB

2.3 V to 5.5 V 2.4

IO= 0

0 V 5.5 V –1

VI= VO= open,

1.65 V to V

CCB

2.3 V to 5.5 V 12

IO= 0

0 V 5.5 V 1

VI= V IO= 0

TA= 25°C –40°C to 85°C 3.5

CCI

1.65 V to V

CCB

2.3 V to 5.5 V 14.4 μA

3.3 V 3.3 V

TA= 25°C –40°C to 85°C 6 TA= 25°C 6

3.3 V 3.3 V

–40°C to 85°C 7.5

CCB

, and V

must not exceed 3.6 V.

CCA

(1) (2) (3)

2.5

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±1

μA

μA3.6 V 0 V 2.2

μA3.6 V 0 V –1

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TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

6.6 Timing Requirements: V

Push-pull driving, Figure 4

Data rate

Open-drain driving, Figure 5

Push-pull driving, Figure 4

Pulse duration Figure 7

Open-drain driving, Figure 5

6.7 Timing Requirements V

Push-pull driving, Figure 4

Data rate

Open-drain driving, Figure 5

Push-pull driving, Figure 4

Pulse duration Figure 7

Open-drain driving, Figure 5

= 1.8 V ± 0.15 V

CCA

= 2.5 V ± 0.2 V

CCA

Data inputs

MIN NOM MAX UNIT

= 2.5 V, ± 0.2 V 21

CCB

= 3.3 V, ± 0.3 V 22

CCB

= 5 V, ± 0.5 V 24

CCB

= 2.5 V, ± 0.2 V 2

CCB

= 3.3 V, ± 0.3 V 2

CCB

= 5 V, ± 0.5 V 2

CCB

= 2.5 V, ± 0.2 V 47

CCB

= 3.3 V, ± 0.3 V 45

CCB

= 5 V, ± 0.5 V 41

CCB

= 2.5 V, ± 0.2 V 500

CCB

= 3.3 V, ± 0.3 V 500

CCB

= 5 V, ± 0.5 V 500

CCB

MIN NOM MAX UNIT

= 2.5 V, ± 0.2 V 20

CCB

= 3.3 V, ± 0.3 V 22

CCB

= 5 V, ± 0.5 V 24

CCB

= 2.5 V, ± 0.2 V 2

CCB

= 3.3 V, ± 0.3 V 2

CCB

= 5 V, ± 0.5 V 1

CCB

= 2.5 V, ± 0.2 V 50

CCB

= 3.3 V, ± 0.3 V 45

CCB

= 5 V, ± 0.5 V 41

CCB

= 2.5 V, ± 0.2 V 500

CCB

= 3.3 V, ± 0.3 V 500

CCB

= 5 V, ± 0.5 V 500

CCB

Mbps

6.8 Timing Requirements: 3.3 V ± 0.3 V

Push-pull driving, Figure 4

Data rate

Open-drain driving, Figure 5

Push-pull driving, Figure 4

Pulse duration Figure 7

Open-drain driving, Figure 5

Data inputs

MIN NOM MAX UNIT

= 3.3 V, ± 0.3 V 23

CCB

= 5 V, ± 0.5 V 24

CCB

= 3.3 V, ± 0.3 V 2

CCB

= 5 V, ± 0.5 V 2

CCB

= 3.3 V, ± 0.3 V 43

CCB

= 5 V, ± 0.5 V 41

CCB

= 3.3 V, ± 0.3 V 500

CCB

= 5 V, ± 0.5 V 500

CCB

Mbps

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SCES638D –OCTOBER 2007–REVISED JUNE 2017

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6.9 Switching Characteristics: V

= 1.8 V ± 0.15 V

CCA

over recommended operating free-air temperature range, V

PARAMETER

Figure 8

PHL

Figure 8

PLH

Figure 8

PHL

Figure 8

PLH

tenFigure 9 OE A or B Push-pull, Figure 6

Figure 9 OE A or B

dis

FROM

(INPUT)TO(OUTPUT)

A B

B A

A-port rise time

B-port rise time

TEST CONDITIONS (DRIVING) MIN MAX UNIT

Push-pull, Figure 4

Open-drain, Figure 5

Push-pull, Figure 4

Open-drain, Figure 5

Push-pull, Figure 4

Open-drain, Figure 5

Push-pull, Figure 4

Open-drain, Figure 5

Push-pull

Open-drain

Push-pull

Open-drain

= 2.5 V ± 0.2 V (unless otherwise noted)

CCA

= 2.5 V ± 0.2 V 5.3

CCB

= 3.3 V ± 0.3 V 5.4

CCB

= 5 V ± 0.5 V 6.8

CCB

= 2.5 V ± 0.2 V 2.3 8.8

CCB

= 3.3 V ± 0.3 V 2.4 9.6

CCB

= 5 V ± 0.5 V 2.6 10

CCB

= 2.5 V ± 0.2 V 6.8

CCB

= 3.3 V ± 0.3 V 7.1

CCB

= 5 V ± 0.5 V 7.5

CCB

= 2.5 V ± 0.2 V 45 260

CCB

= 3.3 V ± 0.3 V 36 208

CCB

= 5 V ± 0.5 V 27 198

CCB

= 2.5 V ± 0.2 V 4.4

CCB

= 3.3 V ± 0.3 V 4.5

CCB

= 5 V ± 0.5 V 4.7

CCB

= 2.5 V ± 0.2 V 1.9 5.3

CCB

= 3.3 V ± 0.3 V 1.1 4.4

CCB

= 5 V ± 0.5 V 1.2 4

CCB

= 2.5 V ± 0.2 V 5.3

CCB

= 3.3 V ± 0.3 V 4.5

CCB

= 5 V ± 0.5 V 0.5

CCB

= 2.5 V ± 0.2 V 45 175

CCB

= 3.3 V ± 0.3 V 36 140

CCB

= 5 V ± 0.5 V 27 102

CCB

= 2.5 V ± 0.2 V 200

CCB

= 3.3 V ± 0.3 V 200

CCB

= 5 V ± 0.5 V 200

CCB

= 2.5 V ± 0.2 V 50

CCB

= 3.3 V ± 0.3 V 40

CCB

= 5 V ± 0.5 V 35

CCB

= 2.5 V ± 0.2 V 3.2 9.5

CCB

= 3.3 V ± 0.3 V 2.3 9.3

CCB

= 5 V ± 0.5 V 2 7.6

CCB

= 2.5 V ± 0.2 V 38 165

CCB

= 3.3 V ± 0.3 V 30 132

CCB

= 5 V ± 0.5 V 22 95

CCB

= 2.5 V ± 0.2 V 1.1 10.8

CCB

= 3.3 V ± 0.3 V 1 9.1

CCB

= 5 V ± 0.5 V 1 7.6

CCB

= 2.5 V ± 0.2 V 34 145

CCB

= 3.3 V ± 0.3 V 23 106

CCB

= 5 V ± 0.5 V 10 76

CCB

nsV

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TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

Switching Characteristics: V

= 1.8 V ± 0.15 V (continued)

CCA

over recommended operating free-air temperature range, V

PARAMETER

Max data rate A or B

FROM

(INPUT)TO(OUTPUT)

A-port fall time

B-port fall time

TEST CONDITIONS (DRIVING) MIN MAX UNIT

Push-pull

Open-drain

Push-pull

Open-drain

Push-pull

Open-drain

= 2.5 V ± 0.2 V (unless otherwise noted)

CCA

= 2.5 V ± 0.2 V 1.9 5.9

CCB

= 3.3 V ± 0.3 V 1.9 6

CCB

= 5 V ± 0.5 V 1.4 13.3

CCB

= 2.5 V ± 0.2 V 4.4 6.9

CCB

= 3.3 V ± 0.3 V 4.3 6.4

CCB

= 5 V ± 0.5 V 4.2 6.1

CCB

= 2.5 V ± 0.2 V 2.2 13.8

CCB

= 3.3 V ± 0.3 V 2.2 16.2

CCB

= 5 V ± 0.5 V 2.6 16.2

CCB

= 2.5 V ± 0.2 V 6.9 13.8

CCB

= 3.3 V ± 0.3 V 7.5 16.2

CCB

= 5 V ± 0.5 V 7 16.2

CCB

= 2.5 V ± 0.2 V 21

CCB

= 3.3 V ± 0.3 V 22

CCB

= 5 V ± 0.5 V 24

CCB

= 2.5 V ± 0.2 V 2

CCB

= 3.3 V ± 0.3 V 2

CCB

= 5 V ± 0.5 V 2

CCB

Mbps

6.10 Switching Characteristics: V

= 2.5 V ± 0.2 V

CCA

over recommended operating free-air temperature range, V

PARAMETER

Figure 8

PHL

Figure 8

PLH

FROM

(INPUT)TO(OUTPUT)

A B

TEST CONDITIONS (DRIVING) MIN MAX UNIT

Push-pull, Figure 4

Open-drain, Figure 5

Push-pull, Figure 4

Open-drain, Figure 5

= 2.5 V ± 0.2 V (unless otherwise noted)

CCA

= 2.5 V ± 0.2 V 3.2

CCB

= 3.3 V ± 0.3 V 3.7

CCB

= 5 V ± 0.5 V 3.8

CCB

= 2.5 V ± 0.2 V 1.7 6.3

CCB

= 3.3 V ± 0.3 V 2 6

CCB

= 5 V ± 0.5 V 2.1 5.8

CCB

= 2.5 V ± 0.2 V 3.5

CCB

= 3.3 V ± 0.3 V 4.1

CCB

= 5 V ± 0.5 V 4.4

CCB

= 2.5 V ± 0.2 V 43 250

CCB

= 3.3 V ± 0.3 V 36 206

CCB

= 5 V ± 0.5 V 27 190

CCB

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SCES638D –OCTOBER 2007–REVISED JUNE 2017

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Switching Characteristics: V

= 2.5 V ± 0.2 V (continued)

CCA

over recommended operating free-air temperature range, V

PARAMETER

Figure 8

PHL

Figure 8

PLH

tenFigure 9 OE A or B

Figure 9 OE A or B

dis

FROM

(INPUT)TO(OUTPUT)

B A

A-port rise time

B-port rise time

A-port fall time

B-port fall time

TEST CONDITIONS (DRIVING) MIN MAX UNIT

Push-pull, Figure 4

Open-drain, Figure 5

Push-pull, Figure 4

Open-drain, Figure 5

Push-pull, Figure 6

Push-pull

Open-drain

Push-pull

Open-drain

Push-pull

Open-drain

Push-pull

Open-drain

= 2.5 V ± 0.2 V (unless otherwise noted)

CCA

= 2.5 V ± 0.2 V 3

CCB

= 3.3 V ± 0.3 V 3.6

CCB

= 5 V ± 0.5 V 4.3

CCB

= 2.5 V ± 0.2 V 1.8 4.7

CCB

= 3.3 V ± 0.3 V 1.6 4.2

CCB

= 5 V ± 0.5 V 1.2 4

CCB

= 2.5 V ± 0.2 V 2.5

CCB

= 3.3 V ± 0.3 V 1.6

CCB

= 5 V ± 0.5 V 1

CCB

= 2.5 V ± 0.2 V 44 170

CCB

= 3.3 V ± 0.3 V 37 140

CCB

= 5 V ± 0.5 V 27 103

CCB

= 2.5 V ± 0.2 V 200

CCB

= 3.3 V ± 0.3 V 200

CCB

= 5 V ± 0.5 V 200

CCB

= 2.5 V ± 0.2 V 50

CCB

= 3.3 V ± 0.3 V 40

CCB

= 5 V ± 0.5 V 35

CCB

= 2.5 V ± 0.2 V 2.8 7.4

CCB

= 3.3 V ± 0.3 V 2.1 6.6

CCB

= 5 V ± 0.5 V 0.9 5.6

CCB

= 2.5 V ± 0.2 V 34 149

CCB

= 3.3 V ± 0.3 V 28 121

CCB

= 5 V ± 0.5 V 24 89

CCB

= 2.5 V ± 0.2 V 1.3 8.3

CCB

= 3.3 V ± 0.3 V 0.9 7.2

CCB

= 5 V ± 0.5 V 0.4 6.1

CCB

= 2.5 V ± 0.2 V 35 151

CCB

= 3.3 V ± 0.3 V 24 112

CCB

= 5 V ± 0.5 V 12 81

CCB

= 2.5 V ± 0.2 V 1.9 5.7

CCB

= 3.3 V ± 0.3 V 1.4 5.5

CCB

= 5 V ± 0.5 V 0.8 5.3

CCB

= 2.5 V ± 0.2 V 4.4 6.9

CCB

= 3.3 V ± 0.3 V 4.3 6.2

CCB

= 5 V ± 0.5 V 4.2 5.8

CCB

= 2.5 V ± 0.2 V 2.2 7.8

CCB

= 3.3 V ± 0.3 V 2.4 6.7

CCB

= 5 V ± 0.5 V 2.6 6.6

CCB

= 2.5 V ± 0.2 V 5.1 8.8

CCB

= 3.3 V ± 0.3 V 5.4 9.4

CCB

= 5 V ± 0.5 V 5.4 10.4

CCB

nsV

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TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

Switching Characteristics: V

= 2.5 V ± 0.2 V (continued)

CCA

over recommended operating free-air temperature range, V

PARAMETER

Max data rate A or B

FROM

(INPUT)TO(OUTPUT)

TEST CONDITIONS (DRIVING) MIN MAX UNIT

Push-pull

Open-drain

= 2.5 V ± 0.2 V (unless otherwise noted)

CCA

= 2.5 V ± 0.2 V 20

CCB

= 3.3 V ± 0.3 V 22

CCB

= 5 V ± 0.5 V 24

CCB

= 2.5 V ± 0.2 V 2

CCB

= 3.3 V ± 0.3 V 2

CCB

= 5 V ± 0.5 V 2

CCB

Mbps

Product Folder Links: TXS0101

Page 12

TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

www.ti.com

6.11 Switching Characteristics: V

= 3.3 V ± 0.3 V

CCA

over recommended operating free-air temperature range, V

PARAMETER

Figure 8

PHL

FROM

(INPUT)

A B

Figure 8

PLH

Figure 8

PHL

B A

Figure 8

PLH

tenFigure 9 OE A or B

Figure 9 OE A or B

dis

A-port rise time

B-port rise time

A-port fall time

B-port fall time

Max data rate A or B

(OUTPUT)

TEST CONDITIONS (DRIVING) MIN MAX UNIT

Push-pull, Figure 4

Open-drain, Figure 5

Push-pull, Figure 4

Open-drain, Figure 5

Push-pull, Figure 4

Open-drain, Figure 5

Push-pull, Figure 4

Open-drain, Figure 5

Push-pull, Figure 6

Push-pull

Open-drain

Push-pull

Open-drain

Push-pull

Open-drain

Push-pull

Open-drain

Push-pull

Open-drain

= 3.3 V ± 0.3 V (unless otherwise noted)

CCA

= 3.3 V ± 0.3 V 2.4

CCB

= 5 V ± 0.5 V 3.1

CCB

= 3.3 V ± 0.3 V 1.3 4.2

CCB

= 5 V ± 0.5 V 1.4 4.6

CCB

= 3.3 V ± 0.3 V 4.2

CCB

= 5 V ± 0.5 V 4.4

CCB

= 3.3 V ± 0.3 V 36 204

CCB

= 5 V ± 0.5 V 28 165

CCB

= 3.3 V ± 0.3 V 2.5

CCB

= 5 V ± 0.5 V 3.3

CCB

= 3.3 V ± 0.3 V 1 124

CCB

= 5 V ± 0.5 V 1 97

CCB

= 3.3 V ± 0.3 V 2.5

CCB

= 5 V ± 0.5 V 2.6

CCB

= 3.3 V ± 0.3 V 3 139

CCB

= 5 V ± 0.5 V 3 105

CCB

= 3.3 V ± 0.3 V 200

CCB

= 5 V ± 0.5 V 200

CCB

= 3.3 V ± 0.3 V 40

CCB

= 5 V ± 0.5 V 9.8

CCB

= 3.3 V ± 0.3 V 2.3 5.6

CCB

= 5 V ± 0.5 V 1.9 4.8

CCB

= 3.3 V ± 0.3 V 25 116

CCB

= 5 V ± 0.5 V 19 85

CCB

= 3.3 V ± 0.3 V 1.6 6.4

CCB

= 5 V ± 0.5 V 0.6 7.4

CCB

= 3.3 V ± 0.3 V 26 116

CCB

= 5 V ± 0.5 V 14 72

CCB

= 3.3 V ± 0.3 V 1.4 5.4

CCB

= 5 V ± 0.5 V 1 5

CCB

= 3.3 V ± 0.3 V 4.3 6.1

CCB

= 5 V ± 0.5 V 4.2 5.7

CCB

= 3.3 V ± 0.3 V 2.3 7.4

CCB

= 5 V ± 0.5 V 2.4 7.6

CCB

= 3.3 V ± 0.3 V 5 7.6

CCB

= 5 V ± 0.5 V 4.8 8.3

CCB

= 3.3 V ± 0.3 V 23

CCB

= 5 V ± 0.5 V 24

CCB

= 3.3 V ± 0.3 V 2

CCB

= 5 V ± 0.5 V 2

CCB

Mbps

Product Folder Links: TXS0101

Page 13

Low-Level Current (mA)

Low-Level Output Voltage (mV)

0 2 4 6 8 10 12 14 16

100

200

300

400

500

600

700

D002

CCB

= 3.3 V

Low-Level Current (mA)

Low-Level Output Voltage (mV)

0 2 4 6 8 10 12 14 16

100

200

300

400

500

600

700

D001

CCB

= 2.7 V

CCB

= 3.3 V

CCB

= 5 V

Low-Level Current (mA)

Low-Level Output Voltage (mV)

0 2 4 6 8 10 12 14 16

100

200

300

400

500

600

700

D003

CCB

= 3.3 V

CCB

= 5 V

www.ti.com

6.12 Typical Characteristics

= 1.8 V V

CCA

IL(A)

= 150 mV

= 2.7 V V

CCA

TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

= 150 mV

IL(A)

Figure 1. Low-Level Output Voltage (V

Current (I

OL(Bx)

= 3.3 V V

CCA

Figure 3. Low-Level Output Voltage (V

OL(Bx)

)

) vs Low-Level

Figure 2. Low-Level Output Voltage (V

Current (I

= 150 mV

IL(A)

) vs Low-Level Current (I

OL(Bx)

)

OL(Bx)

)

) vs Low-Level

Product Folder Links: TXS0101

Page 14

Under Test

2 × V

CCO

50 k

15 pF

Open

1 M

15 pF

CCO

CCI

DUT

OUT

1 M

15 pF

CCO

CCI

DUT

OUT

TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

www.ti.com

7 Parameter Measurement Information

7.1 Load Circuits

Figure 4 shows the push-pull driver circuit used for measuring data rate, pulse duration, propagation delay,

output rise-time and fall-time. Figure 5 shows the open-drain driver circuit used for measuring data rate, pulse duration, propagation delay, output rise-time and fall-time.

Figure 4. Data Rate, Pulse Duration, Propagation

Delay, Output Rise-Time and Fall-Time

Measurement Using a Push-Pull Driver

Figure 6. Load Circuit for Enable-Time and Disable-Time Measurement

TEST S1

/ t

PZL

PLZ

)

dis

/ t

PHZ

PZH

(ten)

1. t

2. t

3. V

4. V

and t

PLZ

and t

PZL

is the VCCassociated with the input port.

CCI

is the VCCassociated with the output port.

CCO

are the same as t

PHZ

are the same as ten.

PZH

dis

Figure 5. Data Rate, Pulse Duration, Propagation

Delay, Output Rise-Time and Fall-Time

Measurement Using an Open-Drain Driver

2 × V

CCO

Open

Product Folder Links: TXS0101

Page 15

Output

Waveform 1

(see Note 2)

CCO

OE input

Output

Waveform 2

S1 at GND

(see Note 2)

PZL

PZH

PLZ

PHZ

V / 2

CCA

V / 2

CCA

0 V

CCO

× 0.2

V / 2

CCO

VOH × 0.9

V / 2

CCO

0 V

CCA

PLH

PHL

CCI

0 V

CCO

Input

CCI

/2 V

CCI

0.9 V

CCO

0.1 V

CCO

OHA/VOHB

CCI

0 V

www.ti.com

7.2 Voltage Waveforms

TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

Figure 7. Pulse Duration (Push-Pull)

Figure 8. Propagation Delay Times

• CLincludes probe and jig capacitance.

• Waveform 1 in Figure 9 is for an output with internal such that the output is high, except when OE is high (see

Figure 6). Waveform 2 in Figure 9 is for an output with conditions such that the output is low, except when OE is

high.

• All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO= 50 Ω, dv/dt ≥ 1 V/ns.

• The outputs are measured one at a time, with one transition per measurement.

• t

• V

PLZ PZL PLH

and t and t and t

CCI CCO

are the same as t

PHZ

are the same as ten.

PZH

are the same as tpd.

PHL

dis

is the VCCassociated with the input port.

is the VCCassociated with the output port.

Figure 9. Enable and Disable Times

Product Folder Links: TXS0101

Page 16

One Shot

Accelerator

Gate Bias

VCCA VCCB

One Shot

Accelerator

10NŸ

TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

www.ti.com

8 Detailed Description

8.1 Overview

The TXS0101 device is a directionless voltage-level translator specifically designed for translating logic voltage levels. The A port is able to accept I/O voltages ranging from 1.65 V to 3.6 V, while the B port can accept I/O voltages from 2.3 V to 5.5 V. The device is a pass gate architecture with edge rate accelerators (one shots) to improve the overall data rate. 10 kΩ pullup resistors, commonly used in open drain applications, have been conveniently integrated so that an external resistor is not needed. While this device is designed for open drain applications, the device can also translate push-pull CMOS logic outputs.

8.2 Functional Block Diagram

Product Folder Links: TXS0101

Page 17

Gate Bias

One

shot

T2T1

CCA

CCB

Gate Bias

Oneshot

10k

R2 10k

One

shot

Oneshot

TXS0101

www.ti.com

SCES638D –OCTOBER 2007–REVISED JUNE 2017

8.3 Feature Description

8.3.1 Architecture

The TXS0101 architecture (see Figure 10) does not require a direction-control signal to control the direction of data flow from A to B or from B to A.

Figure 10. Architecture of a TXS01xx Cell

Each A-port I/O has an internal 10 kΩ pullup resistor to V resistor to V

. The output one-shots detect rising edges on the A or B ports. During a rising edge, the one-shot

CCB

, and each B-port I/O has an internal 10 kΩ pullup

CCA

turns on the PMOS transistors (T1,T2) for a short duration, which speeds up the low-to-high transition.

8.3.2 Input Driver Requirements

The fall time (tfA, tfB) of a signal depends on the output impedance of the external device driving the data I/Os of the TXS0101. Similarly, the t The values for tfA, tfB, t

PHL

and max data rates also depend on the output impedance of the external driver.

PHL

, and maximum data rates in the data sheet assume that the output impedance of the

external driver is less than 50 Ω.

8.3.3 Power Up

During operation, ensure that V

CCA

≤ V

at all times. During power-up sequencing, V

CCB

CCA

≥ V

CCB

does not

damage the device, so any power supply can be ramped up first.

8.3.4 Enable and Disable

The TXS0101 has an OE input that is used to disable the device by setting OE low, which places all I/Os in the Hi-Z state. The disable time (t

) indicates the delay between the time when OE goes low and when the outputs

dis

actually get disabled (Hi-Z). The enable time (ten) indicates the amount of time the user must allow for the oneshot circuitry to become operational after OE is taken high.

8.3.5 Pullup or Pulldown Resistors on I/O Lines

Each A-port I/O has an internal 10 kΩ pullup resistor to V resistor to V to V

CCA

or V

. If a smaller value of pullup resistor is required, an external resistor must be added from the I/O

CCB

(in parallel with the internal 10 kΩ resistors).

CCB

, and each B-port I/O has an internal 10 kΩ pullup

CCA

8.4 Device Functional Modes

The TXS0101 device has two functional modes, enabled and disabled. To disable the device set the OE input low, which places all I/Os in a high impedance state. Setting the OE input high will enable the device.

Product Folder Links: TXS0101

Page 18

Data

GNDGNDGND

Data

CCA

CCB

3.3 V1.8 V

1.8-V

System

Controller

A B

3.3-V

System

TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

www.ti.com

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TXS0101 can be used in level-translation applications for interfacing devices or systems operating at different interface voltages with one another. The TXS0101 is ideal for use in applications where an open-drain driver is connected to the data I/Os. The TXB0101 can also be used in applications where a push-pull driver is connected to the data I/Os, but the TXB0102 might be a better option for such push-pull applications.

9.2 Typical Application

Figure 11. Typical Application Schematic

9.2.1 Design Requirements

For this design example, use the parameters listed in Table 1.

Table 1. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE

Input voltage range 1.65 to 3.6 V

Output voltage range 2.3 to 5.5 V

9.2.2 Detailed Design Procedure

To begin the design process, determine the following:

• Input voltage range – Use the supply voltage of the device that is driving the TXS0101 device to determine the input voltage

range. For a valid logic high the value must exceed the VIHof the input port. For a valid logic low the value must be less than the VILof the input port.

• Output voltage range – Use the supply voltage of the device that the TXS0101 device is driving to determine the output voltage

range.

– The TXS0101 device has 10 kΩ internal pullup resistors. External pullup resistors can be added to reduce

the total RC of a signal trace if necessary.

Product Folder Links: TXS0101

Page 19

2 V/div

2 V

5 V

10 ns/div

TXS0101

www.ti.com

SCES638D –OCTOBER 2007–REVISED JUNE 2017

• An external pull down resistor decreases the output VOHand VOL. Use Equation 1 to calculate the VOHas a result of an external pull down resistor.

VOH= V

× RPD/ (RPD+ 10 kΩ)

CCx

where

• V

• RPDis the value of the external pull down resistor (1)

is the supply voltage on either V

CCx

CCA

or V

CCB

9.2.3 Application Curve

= 1.8 V V

CCA

CCB

= 5 V

Figure 12. Level-Translation of a 2.5-MHz Signal

Product Folder Links: TXS0101

Page 20

GND

CCB

LEGEND

VIA to Power Plane

VIA to GND Plane (Inner Layer)

Polygonal Copper Pour

CCA

Keep OE low until V

CCA

and V

CCB

are powered up

Bypass Capacitor

TXS0101

CCA

To/From

Controller/System

To/From

Controller/System

TXS0101

SCES638D –OCTOBER 2007–REVISED JUNE 2017

10 Power Supply Recommendations

www.ti.com

The TXS0101 device uses two separate configurable power-supply rails, V supply voltage from 2.3 V to 5.5 V and V less than or equal to V

. The A port and B port are designed to track V

CCB

accepts any supply voltage from 1.65 V to 3.6 V as long as Vs is

CCA

and V

CCB

. V

CCB

respectively allowing for

accepts any

low voltage bidirectional translation between any of the 1.8 V, 2.5 V, 3.3 V, and 5 V voltage nodes. The TXS0101 device does not require power sequencing between V

supply rails can be ramped in any order. A V damage the device, but during operation, V

CCA

value greater than or equal to V

CCA

must be less than or equal to V

The output-enable (OE) input circuit is designed so that it is supplied by V

CCA

and V

CCA

during power-up so the power-

CCB

CCB(VCCA

≤ V

CCB

≥ V

CCB

) at all times.

and when the (OE) input is low, all

) does not

outputs are placed in the high-impedance state. To ensure the high-impedance state of the outputs during power up or power down, the OE input pin must be tied to GND through a pulldown resistor and must not be enabled until V

CCA

and V

are fully ramped and stable. The minimum value of the pulldown resistor to ground is

CCB

determined by the current-sourcing capability of the driver.

11 Layout

11.1 Layout Guidelines

To ensure reliability of the device, following common printed-circuit board layout guidelines is recommended.

• Bypass capacitors should be used on power supplies.

• Short trace lengths should be used to avoid excessive loading.

• PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than the one shot duration, approximately 30 ns, ensuring that any reflection encounters low impedance at the source driver.

• Placing pads on the signal paths for loading capacitors or pullup resistors to help adjust rise and fall times of signals depending on the system requirements

11.2 Layout Example

Figure 13. Typical Layout of TXS0101

Product Folder Links: TXS0101

Page 21

TXS0101

www.ti.com

SCES638D –OCTOBER 2007–REVISED JUNE 2017

12 Device and Documentation Support

12.1 Device Support

12.1.1 Related Documentation

For related documentation, see the following:

• A Guide to Voltage Translation With TXS-Type Translators, SCEA044

• Introduction to Logic, SLVA700

12.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

12.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of

Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration

among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and

contact information for technical support.

12.4 Trademarks

NanoFree, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners.

12.5 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

12.6 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Product Folder Links: TXS0101

Page 22

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

PACKAGING INFORMATION

Orderable Device Status

TXS0101DBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 (NFFF, NFFR)

TXS0101DBVRG4 ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 (NFFF, NFFR)

TXS0101DBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 NFFR TXS0101DCKR ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 2GO TXS0101DCKT ACTIVE SC70 DCK 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 2GO TXS0101DRLR ACTIVE SOT-5X3 DRL 6 4000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 2GR

TXS0101DRLRG4 ACTIVE SOT-5X3 DRL 6 4000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 2GR

TXS0101YZPR ACTIVE DSBGA YZP 6 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 (2G7, 2GN)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

Package Type Package

(1)

Drawing

Pins Package

Qty

Eco Plan

(2)

Lead finish/ Ball material

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

(2)

RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3)

MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)

Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

Samples

Addendum-Page 1

Page 23

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

Page 24

PACKAGE MATERIALS INFORMATION

www.ti.com 5-Jan-2021

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type

TXS0101DBVR SOT-23 DBV 6 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TXS0101DBVT SOT-23 DBV 6 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3

TXS0101DCKR SC70 DCK 6 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3

TXS0101DCKT SC70 DCK 6 250 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3 TXS0101DRLR SOT-5X3 DRL 6 4000 180.0 8.4 1.98 1.78 0.69 4.0 8.0 Q3 TXS0101YZPR DSBGA YZP 6 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 Q1

Package Drawing

Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm)B0(mm)K0(mm)P1(mm)W(mm)

Pin1

Quadrant

Pack Materials-Page 1

Page 25

PACKAGE MATERIALS INFORMATION

www.ti.com 5-Jan-2021

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TXS0101DBVR SOT-23 DBV 6 3000 202.0 201.0 28.0 TXS0101DBVT SOT-23 DBV 6 250 202.0 201.0 28.0

TXS0101DCKR SC70 DCK 6 3000 200.0 183.0 25.0

TXS0101DCKT SC70 DCK 6 250 200.0 183.0 25.0 TXS0101DRLR SOT-5X3 DRL 6 4000 202.0 201.0 28.0 TXS0101YZPR DSBGA YZP 6 3000 220.0 220.0 35.0

Pack Materials-Page 2

Page 26

PACKAGE OUTLINE

PIN 1

INDEX AREA

2X 0.95

1.9

0.50

0.25

0.2 C A B

3.05

2.75

SOT-23 - 1.45 mm max heightDBV0006A

SMALL OUTLINE TRANSISTOR

0.1 C

1.45 MAX

(1.1)

0.15

0.00

TYP

SCALE 4.000

3.0

2.6

1.75

1.45

0.25

GAGE PLANE

TYP

0.6

0.3

TYP

SEATING PLANE

0.22

0.08

TYP

4214840/B 03/2018

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side.

4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.

5. Refernce JEDEC MO-178.

www.ti.com

Page 27

EXAMPLE BOARD LAYOUT

SOT-23 - 1.45 mm max heightDBV0006A

SMALL OUTLINE TRANSISTOR

2X (0.95)

(R0.05) TYP

SOLDER MASK OPENING

6X (0.6)

6X (1.1)

PKG

(2.6)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

METAL

METAL UNDER SOLDER MASK

SYMM

SOLDER MASK OPENING

EXPOSED METAL

0.07 MAX ARROUND

NON SOLDER MASK

DEFINED

(PREFERRED)

EXPOSED METAL

0.07 MIN ARROUND

SOLDER MASK

DEFINED

SOLDER MASK DETAILS

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

4214840/B 03/2018

www.ti.com

Page 28

EXAMPLE STENCIL DESIGN

SOT-23 - 1.45 mm max heightDBV0006A

SMALL OUTLINE TRANSISTOR

PKG

6X (1.1)

6X (0.6)

2X(0.95)

(R0.05) TYP

(2.6)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

SYMM

4214840/B 03/2018

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations.

9. Board assembly site may have different recommendations for stencil design.

www.ti.com

Page 29

PACKAGE OUTLINE

2X 1

4X 0.5

SCALE 8.000

1.7

1.5 PIN 1

ID AREA

1.3

1.1

1.7

1.5

NOTE 3

0.3

0.1

SOT - 0.6 mm max heightDRL0006A

PLASTIC SMALL OUTLINE

0.05

TYP

0.00

0.6 MAX

0.18

0.08

SYMM

0.4

0.2

SEATING PLANE

0.05 C

0.27

0.15

0.1 C A B

0.05 4223266/B 12/2020

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side.

4. Reference JEDEC registration MO-293 Variation UAAD

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Page 30

EXAMPLE BOARD LAYOUT

SOT - 0.6 mm max heightDRL0006A

PLASTIC SMALL OUTLINE

0.05 MAX AROUND

6X (0.3)

4X (0.5)

(R0.05) TYP

6X (0.67)

SYMM

(1.48)

LAND PATTERN EXAMPLE

SCALE:30X

0.05 MIN

AROUND

SYMM

SOLDER MASK OPENING

METAL

NON SOLDER MASK

DEFINED

(PREFERRED)

METAL UNDER SOLDER MASK

SOLDER MASK

DEFINED

SOLDERMASK DETAILS

NOTES: (continued)

5. Publication IPC-7351 may have alternate designs.

6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com

SOLDER MASK OPENING

4223266/B 12/2020

Page 31

EXAMPLE STENCIL DESIGN

SOT - 0.6 mm max heightDRL0006A

PLASTIC SMALL OUTLINE

6X (0.3)

4X (0.5)

(R0.05) TYP

6X (0.67)

SYMM

(1.48)

SOLDER PASTE EXAMPLE

BASED ON 0.1 mm THICK STENCIL

SCALE:30X

SYMM

4223266/B 12/2020

NOTES: (continued)

7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations.

8. Board assembly site may have different recommendations for stencil design.

www.ti.com

Page 32

Page 33

Page 34

PACKAGE OUTLINE

BALL A1

CORNER

0.5 MAX

B E

SCALE 9.000

DSBGA - 0.5 mm max heightYZP0006

DIE SIZE BALL GRID ARRAY

SEATING PLANE

NOTES:

0.19

0.15

SYMM

0.25

0.21

0.015 C A B

0.5 TYP

SYMM

BALL TYP

0.5

TYP

0.05 C

D: Max = E: Max =

1.418 mm, Min =

0.918 mm, Min =

NanoFree Is a trademark of Texas Instruments.

1.358 mm

0.858 mm

4219524/A 06/2014

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. NanoFree

package configuration.

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Page 35

6X ( )0.225

(0.5) TYP

EXAMPLE BOARD LAYOUT

DSBGA - 0.5 mm max heightYZP0006

DIE SIZE BALL GRID ARRAY

(0.5) TYP

(

0.225

METAL

SOLDER MASK

OPENING

)

NON-SOLDER MASK

DEFINED

(PREFERRED)

SYMM

LAND PATTERN EXAMPLE

SCALE:40X

0.05 MAX

0.05 MIN

SOLDER MASK

DEFINED

METAL UNDER MASK

)

0.225

( SOLDER MASK OPENING

SOLDER MASK DETAILS

NOT TO SCALE

NOTES: (continued)

4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SBVA017 (www.ti.com/lit/sbva017).

www.ti.com

4219524/A 06/2014

Page 36

6X (

0.25)

(0.5) TYP

EXAMPLE STENCIL DESIGN

DSBGA - 0.5 mm max heightYZP0006

DIE SIZE BALL GRID ARRAY

(0.5) TYP

(R ) TYP0.05

METAL

TYP

SYMM

SOLDER PASTE EXAMPLE

BASED ON 0.1 mm THICK STENCIL

SCALE:40X

SYMM

NOTES: (continued)

5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.

www.ti.com

4219524/A 06/2014

Page 37

IMPORTANT NOTICE AND DISCLAIMER

TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.

These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources.

TI’s products are provided subject to TI’s Terms of Sale (https:www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

Datasheet TXS0101 Datasheet (Texas Instruments)

1 Features

2 Applications

3 Description

Table of Contents

4 Revision History

5 Pin Configuration and Functions

6 Specifications

6.1 Absolute Maximum Ratings

6.2 ESD Ratings

6.3 Recommended Operating Conditions

6.4 Thermal Information

6.5 Electrical Characteristics

6.8 Timing Requirements: 3.3 V ± 0.3 V

6.12 Typical Characteristics

7 Parameter Measurement Information

7.1 Load Circuits

7.2 Voltage Waveforms

8 Detailed Description

8.1 Overview

8.2 Functional Block Diagram

8.3 Feature Description

8.3.1 Architecture

8.3.2 Input Driver Requirements

8.3.3 Power Up

8.3.4 Enable and Disable

8.3.5 Pullup or Pulldown Resistors on I/O Lines

8.4 Device Functional Modes

9 Application and Implementation

9.1 Application Information

9.2 Typical Application

9.2.1 Design Requirements

9.2.2 Detailed Design Procedure

9.2.3 Application Curve

10 Power Supply Recommendations

11 Layout

11.1 Layout Guidelines

11.2 Layout Example

12 Device and Documentation Support

12.1 Device Support

12.1.1 Related Documentation

12.2 Receiving Notification of Documentation Updates

12.3 Community Resources

12.4 Trademarks

12.5 Electrostatic Discharge Caution

12.6 Glossary

13 Mechanical, Packaging, and Orderable Information