Datasheet tsa5523m DATASHEETS (Philips)

Page 1
INTEGRATED CIRCUITS
DATA SH EET
TSA5523M
1.4 GHz I
2
multimedia synthesizer
Product specification File under Integrated Circuits, IC02
1996 Dec 17
Page 2
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia synthesizer

FEATURES

• Complete 1.4 GHz single-chip system
• Adaptive DC/DC converter driver output
• On-board tuning amplifier output
• Varicap drive disable
• Four NPN open-collector output ports (10 mA)
• Four bus-controlled bidirectional ports
(NPN open-collector outputs)
• In-lock detector
• 5-step Analog-to-Digital Converter (ADC)
• Mixer/Oscillator (M/O) band-switch output
• 15-bit programmable divider
• Programmable reference divider ratio
(512, 640 or 1024)
• Programmable charge-pump current (50 or 250 µA)
2
C-bus format
• I – Address plus four data bytes transmission
(write mode)
– Address plus one status byte transmission
(read mode)
– Four independent addresses
• Low power, low radiation.
TSA5523M
An output is provided to control a Philips mixer/oscillator IC controlled by bits P7, P5 and P4. Depending on the reference divider ratio (512, 640 or 1024), the phase comparator operates at 3.90625, 6.25 or 7.8125 kHz with a 4 MHz crystal.
The lock detector bit FL is set to logic 1 when the loop is locked and is read on the SDA line (status byte) during a read operation. The ADC is available for digital AFC control. The ADC code is read during a read operation on
2
the I
C-bus. The ADC input is combined with the port P6. In the test mode, this port is also used as a test output for f
and f
ref
a DC/DC converter driver connected to the IDC pin to control the amplitude of an external oscillator followed by a voltage rectifier.
The voltage rectifier is used to generate the correct tuning supply voltage to maintain a constant current into the tuning amplifier. The DC/DC converter driver can be disabled by setting the IDC pin to V tuning supply voltage is delivered by a fixed 33 V supply.
(see Table 4). In addition, the circuit includes
div/2
in this event the
CC1

GENERAL DESCRIPTION

The device is a single chip PLL frequency synthesizer designed for TV and VCR tuning systems. The circuit consists of a divide-by-eight prescaler with its own preamplifier, a 15-bit programmable divider, a crystal oscillator and its programmable reference divider, a phase/frequency detector combined with a charge-pump which drives the tuning amplifier, including 33 V output. Three NPN open-collector outputs are provided for band switching together with five open-collector NPN outputs. Four of these ports can also be used as input ports (one ADC and three general purpose I/O ports).

ORDERING INFORMATION

TYPE
NUMBER
TSA5523M/C1 SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1
NAME DESCRIPTION VERSION
Five serial bytes (including address byte) are required to address the device, select the VCO frequency, program the ports, set the charge-pump current and set the reference divider ratio. The device has four independent I2C-bus addresses which can be selected by applying a specific voltage on the AS input (see Table 3).

APPLICATIONS

• Multimedia TV tuners and front-ends
• VCR tuners.
PACKAGE
1996 Dec 17 2
Page 3
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia TSA5523M
synthesizer

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
CC1
I
CC1
f
RF
V
iRF
f
XTAL
I
NPN
T
amb
T
stg
supply voltage 4.5 − 5.5 V supply current − 22 30 mA RF frequency range 64 − 1400 MHz RF input voltage level 80 to 150 MHz −25 − +3 dBm
150 MHz to 1 GHz −28 − +3 dBm
1 to 1.4 GHz −26 − +3 dBm crystal oscillator frequency − 4 − MHz NPN open-collector output
− 10 15 mA
current operating ambient temperature −20 − +85 °C IC storage temperature −40 − +150 °C
1996 Dec 17 3
Page 4
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia synthesizer

BLOCK DIAGRAM

tune
V
CP
9
AMP
BUMP
CHARGE
PHASE
COMPARATOR
LOGIC
CP
T2, T1, T0
handbook, full pagewidth
IDC
8
DC/DC
DRIVER
10
DIGITAL
IN-LOCK
DETECTOR
OS
LOCK
CC1
V
20
RSA, RSB
GND
16
REGISTER
7-BIT CONTROL
T2, T1, T0
BS
17
BAND
SWITCH
TSA5523M
MGG747
div
f
15-BIT
DIVIDER
PROGRAMMABLE
DIVIDE-BY-8
PRESCALER
19
18
RF1
RF2
ref
f
DIVIDER
512/640/1024
XTAL
OSCOLLATOR
1
XTAL
TSA5523M
15-BIT
RSBRSA
POWER-ON
REGISTER
FREQUENCY
RESET
4
C-BUS
2
I
TRANSCEIVER
3
SCL
SDA
2
AS
REGISTER
8-BIT PORTS
GATE
COMPARATORS
ADC
Fig.1 Block diagram.
13 12 11 15 5 6 7 14
P3 P2 P1 P0 P6 P4 P5 P7
1996 Dec 17 4
Page 5
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia synthesizer

PINNING

SYMBOL PIN DESCRIPTION
XTAL 1 crystal oscillator input AS 2 address selection input SDA 3 serial data input/output SCL 4 serial clock input P4 5 Port 4 NPN open-collector
band-switch output
P5 6 Port 5 NPN open-collector
band-switch output
P7 7 Port 7 NPN open-collector
band-switch output
IDC 8 DC/DC converter control I/O
terminal
V
tune
CP 10 NPN open-collector I/O port P0 11 Port 0 NPN open-collector I/O port P1 12 Port 1 NPN open-collector I/O port P2 13 Port 2 NPN open-collector I/O port P3 14 Port 3 NPN open-collector output P6 15 Port 6 NPN open-collector
GND 16 ground BS 17 band-switch output to
RF2 18 RF signal input 2 RF1 19 RF signal input 1 V
CC1
9 tuning voltage output
output/ADC input
mixer/oscillator driver
20 supply voltage (+5 V)
handbook, halfpage
XTAL
1
AS
2
SDA
3
SCL
4
P4
5
TSA5523M
P5
6
P7
7 8
IDC
V
9
tune
CP
10
MGG746
Fig.2 Pin configuration.
TSA5523M
V
20
CC1
19
RF1
18
RF2
17
BS
16
GND P6
15
P3
14
P2
13
P1
12
P0
11
1996 Dec 17 5
Page 6
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia synthesizer

FUNCTIONAL DESCRIPTION

The device is controlled via the two-wire I2C-bus. For programming, there is one module address (7 bits) and the R/W bit for selecting the read or the write mode.
Write mode: R/
After the address transmission (first byte), data bytes can be sent to the device. Four data bytes are needed to fully program the device. The bus transceiver has an auto-increment facility which permits the programming of the device within one single transmission (address + 4 data bytes).
The device can also be partially programmed providing that the first data byte following the address is Divider Byte 1 (DB1) or Control Byte (CB). The meaning of the bits in the data bytes is given in Table 1.
Table 1 I2C-bus data format
W=0(see Table 1)
TSA5523M
The first bit of the first data byte transmitted indicates whether frequency data (first bit = 0) or control and ports data (first bit = 1) will follow. Until an I condition is sent by the controller, additional data bytes can be entered without the need to re-address the device. The frequency register is loaded after the 8th clock pulse of the second Divider Byte (DB2), the control register is loaded after the 8th clock pulse of the control byte and the ports register is loaded after the 8th clock pulse of the Ports Byte (PB).
2
C-bus address selection
I
The module address contains programmable address bits (MA1 and MA0) which offer the possibility of having several synthesizers (up to 4) in one system by applying a specific voltage to the AS input. The relationship between MA1 and MA0 and the input voltage on the AS input is given in Table 2.
2
C-bus STOP
DATA BYTES MSB LSB ACK
Address Byte (ADR) 11000MA1MA00A Divider Byte 1 (DB1) 0 N14 N13 N12 N11 N10 N9 N8 A Divider Byte 2 (DB2) N7 N6 N5 N4 N3 N2 N1 N0 A Control Byte (CB) 1 CP T2 T1 T0 RSA RSB OS A Ports Byte (PB) P7 P6 P5 P4 P3 P2 P1 P0 A
(1) (1) (1) (1) (1)
Note
1. A = Acknowledge.
Table 2 Explanation to Table 1
SYMBOL DESCRIPTION
MA1 and MA0 programmable address bits (see Table 3) N14 to N0 programmable divider bits N = N14 × 2
14+213
+ ... + N1 × 2+N0 CP charge-pump current CP = 0 50 µA CP = 1 250 µA T2, T1 and T0 test bits; normal operation; T2 = 0, T1 = 0, T0 = 1 (see Table 4) RSA and RSB reference divider ratio select bits (see Table 5) OS tuning amplifier control bit OS = 0 normal operation; tuning voltage is ON OS = 1 tuning voltage is OFF (high impedance), IDC output voltage is LOW P7 to P0 NPN open-collector control bits Pn = 0 output n is OFF Pn = 1 output n is ON
1996 Dec 17 6
Page 7
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia synthesizer
Table 3 Address selection
INPUT VOLTAGE APPLIED TO PIN AS MA1 MA0
0 V to 0.1V open-circuit or 0.2V
0.4V
0.9V
Table 4 Test bits
T2 T1 T0 DEVICE OPERATION
0 0 1 normal mode 0 1 X charge-pump is OFF 1 1 0 charge-pump is sinking
1 1 1 charge-pump is sourcing
100f 101f
Table 5 Ratio select bits
RSA RSB REFERENCE DIVIDER
Table 6 Band-switch output levels
P7 P5 P4
1 1 0 0.25 V band A 1 0 1 0.4V 0 1 1 0.8V 111 V
CC1
to 0.3V
CC1 CC1
to 0.6V to V
CC1
CC1
CC1
CC1
current
current
is available on P6 output
ref
is available on P6 output
div/2
X 0 640
0 1 1024 1 1 512
OUTPUT
VOLTAGE
ON PIN BS
CC1 CC1
CC1
all other codes V
CC1
PHILIPS M/O
IC’s BAND
band B band C band C band C
TSA5523M
00 01 10 11

Read mode: R/W=1(see Table 7) Data can be read out of the device by setting the R/W bit

to logic 1. After the slave address has been recognized, the device generates an acknowledge pulse and the first data byte (status byte) is transferred on the SDA line (MSB first). Data is valid on the SDA line during a HIGH level of the SCL clock signal. A second data byte can be read out of the device if the processor generates an acknowledge on the SDA line (master acknowledge).
End of transmission will occur if no master acknowledge occurs. The device will then release the data line to allow the processor to generate a STOP condition. When Ports P0 to P2 are used as inputs, the corresponding bits must be logic 0 (high-impedance state). The Power-On Reset flag (POR) is set to logic 1 at power-on. It is reset when an end-of-data is detected by the device (end of a read sequence). Control of the loop is made possible with the in-lock flag FL (FL = 1) which indicates when the loop is locked. The bits I2, I1 and I0 represent the status of the I/O Ports P2, P1 and P0 respectively.
A logic 0 indicates a LOW level and a logic 1 indicates a HIGH level (see threshold level in the “Characteristics”). A built-in ADC is available on pin P6. This converter can be used to feed AFC information to the controller from the IF section of the television. The relationship between bits A2, A1 and A0 is given in Table 9.
At power-on, the device is reset as follows: all ports are set to the high-impedance state, except P4, P5 and P7 which are set to logic 1. The tuning amplifier is in the high-impedance state (OS = 1). The POR level is fixed to 3 × V
(2.1 V typ.). If V
BE
circuit is reset.
goes below the POR level the
CC1
1996 Dec 17 7
Page 8
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia TSA5523M
synthesizer
Table 7 Read data format
BYTE MSB
(1)
Address Byte (ADB) 11000MA1MA01A Status Byte (SB) POR FL I2 I1 I0 A2 A1 A0 −
Notes
1. MSB is transmitted first.
2. A: Acknowledge.
Table 8 Explanation to Table 7
SYMBOL DESCRIPTION
POR power-on reset flag (POR = 1 at power-on) FL in-lock flag (FL = 1 when the loop is phase-locked) I2, I1 and I0 digital levels for I/O ports P2, P1 and P0 respectively A2, A1 and A0 digital outputs of the 5-level ADC
Table 9 Analog-to-digital converter levels; note 1
LSB ACK
(2)
VOLTAGE APPLIED ON PORT P6 A2 A1 A0
0.6V
CC1
0.45V
CC1
0.3V
CC1
0.15V
CC1
0 to 0.15V
to V
CC1
to 0.6V
to 0.45V
to 0.3V
CC1
CC1 CC1 CC1
100 011 010 001 000
Note
1. Accuracy is 0.03V
CC1
.
1996 Dec 17 8
Page 9
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia TSA5523M
synthesizer

LIMITING VALUES

In according with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
iRF
V
CC1
V
oIDC
V
oNPN
I
oNPN
V
oCP
V
o(tune)
V
oBS
V
iSCL
V
i/oSDA
I
oSDA
V
iAS
V
iXTAL
T
stg
T
j(max)
t
sc
prescaler input voltage −0.3 V
CC1
supply voltage (+5 V) −0.3 +6 V IDC output voltage −0.3 V
CC1
NPN open-collector output voltage −0.3 +16 V NPN open-collector output current −1 +15 mA charge-pump output voltage −0.3 V
CC1
tuning voltage output see Fig.3 −0.3 +40 V band-switch output voltage −0.3 V
CC1
serial clock input voltage −0.3 +6 V serial data input/output voltage −0.3 +6 V data output current −1+5mA address selection input voltage −0.3 V crystal input voltage −0.3 V
CC1 CC1
IC storage temperature −40 +150 °C maximum junction temperature − +150 °C short-circuit time every pin to V
or GND − 10 s
CC1
V
V
V
V
V V
handbook, halfpage
3
I
max
(mA)
2
1
0
02040 8060
Fig.3 Rating power on V
1996 Dec 17 9
output pin.
tune
V
tune
MGG751
(V)
Page 10
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia TSA5523M
synthesizer

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling bipolar devices. Every pin withstands the ESD test in accordance with Every pin withstands the EDS test in accordance with Philips Semiconductors Machine Model 0 Ω, 200 pF (200 V).

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT
R
th j-a
thermal resistance from junction to ambient in free air 120 K/W

CHARACTERISTICS

= 4.5 to 5.5 V; T
V
CC1
= −20 to +85 °C; see note 1; unless otherwise specified.
amb
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
General
V
CC1
I
CC1
V
PORth
T
amb
supply voltage 4.5 − 5.5 V supply current V power-on reset threshold
voltage
T slope is −6 mV/°C
operating ambient temperature
f
iRF
RF input frequency 64 − 1400 MHz
N divider ratio 15-bit frequency word 256 − 32767 −
“MIL-STD-883C
=5V − 22 30 mA
CC1
=25°C
amb
category B” (2000 V).
1.5 2.0 − V
−20 − +85 °C
XTAL oscillator
f
XTAL
Z
XTAL
DL
XTAL(p-p)
frequency range R input impedance f = 4 MHz 600 1200 −Ω drive level on pin XTAL
(peak-to-peak value)
Prescaler
V
Z
RFin
iRF
input level V
input impedance see Fig.5 −−−
=25to200Ω 3.2 4.0 4.48 MHz
XTAL
series capacitor = 18 pF;
− 110 − mV crystal Philips 4333 1430 4881
= 4.5 to 5.5 V;
CC1
T
= −20 to +85 °C;
amb
see Fig.4
f = 80 to 150 MHz −25 − +3 dBm f = 150 to 1000 MHz −28 − +3 dBm f = 1000 to 1400 MHz −26 − +3 dBm
1996 Dec 17 10
Page 11
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia TSA5523M
synthesizer
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
NPN open-collector outputs P7 to P0; note 2
I
LI
leakage current V leakage current P4, P5, P7 V
V
cesatN
output saturation voltage on Ports P4, P5 and P7
output saturation voltage I
C
Pn
allowed capacitive loading on
output pins Input ports P2, P1 and P0; note 3 V
IL
V
IH
I
IL
I
IH
LOW level input voltage −−1.5 V
HIGH level input voltage 3 −−V
LOW level input current Vi=0V −10 −−µA
HIGH level input current V
AS input (Address Selection)
I
IH
I
IL
HIGH level input current VIH=V
LOW level input current VIL=0V −50 −−µA
SCL and SDA inputs
V
IL
V
IH
I
IH
I
IL
f
CLK
SDA output (I
I
LI
V
oSDA
LOW level input voltage −−1.5 V
HIGH level input voltage 3.0 − 5.5 V
HIGH level input current VIH= 5.5 V; V
LOW level input current VIL=0V; V
clock frequency − 100 400 kHz
2
C-bus mode)
leakage current V
output voltage I
BS output (mixer/oscillator IC band selection)
V V V
oBSA oBSB oBSC
output voltage for band A IL=20µA − 0.25 0.5 V
output voltage for band B IL=20µA 0.36V
output voltage for band C IL=20µA 0.7V
IDC output
V
IDCoff
voltage to switch-off DC/DC
converter driver I
oIDC
G
t
IDC output current R
transfer gain I9= 100 µA − 1000 −µA/V
= 5.5 V; Vo= 13.5 V −−10 µA
CC1
= 5.5 V; Vo= 1.5 V −−1µA
CC1
I
= 100 µA −−0.2 V
sink
=10mA − 0.2 0.4 V
sink
=2mA − 0.2 0.3 V
I
sink
VPn= 5.5 V −−10 nF
= 5.5 V; Vo= 13.5 V −−10 µA
CC1
CC1
=0V −−10 µA
CC1
= 5.5 V; V
V
IH
= 5.5 V −−10 µA
SDA
=3mA −−0.4 V
sink
=50µA 3.1 −−V
I
L
= 100 kΩ−10 − +100 µA
ext
= 5.5 V −−10 µA
CC1
= 5.5 V −10 −−µA
CC1
−−50 µA
0.4V
CC1
CC1
V
CC1
0.8V
− 0.5 − V
CC1 CC1
0.43V
0.9V
CC1
CC1
CC1
V V
V
1996 Dec 17 11
Page 12
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia TSA5523M
synthesizer
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Charge-pump output CP
HIGH level input current
I
IH
(absolute value)
LOW level input current
I
IL
(absolute value)
V
oCP
I
LIos
Tuning voltage output; V
I
9(off)
output voltage in-lock; T off-state leakage current T2 = 0; T1 = 1 −5 +1 +15 nA
tune
leakage current when switched-off
V
o9
output voltage when the loop is closed
I
bias
V
ripple(p-p)
tuning amplifier bias current DC/DC converter loop is
acceptable ripple voltage on V
(peak-to-peak value)
CC1
Notes
1. When a port is active, the collector voltage must not exceed 6 V.
2. All other ports are switched ON with 10 mA during test.
3. When a port is used as input port, the corresponding bit must be programmed to the high-impedance state.
4. FM deviation is 2 kHz (max).
CP = 1 − 250 −µA
CP = 0 − 50 −µA
=25°C − 1.95 − V
amb
OS = 1; V
OS = 0; T2 = 0; T1 = 0;
=33V −−10 µA
tune
0.3 − 32.7 V T0 = 1; RL=27kΩ; V
=33V
tune
70 100 130 µA
active f
= 20 Hz to 500 kHz;
ripple
−−30 mV note 4
12
handbook, halfpage
P
tot
(dBm)
0
−12
−24
−36
−48
0 1.5
0.5 1.0
Fig.4 Prescaler typical input sensitivity curve (pin 2).
1996 Dec 17 12
MGG752
f (GHz)
Page 13
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia synthesizer
handbook, full pagewidth
0.5
0.2
j
+
0
− j
0.2
0.2 0.5 1 2 5 10
1.3 GHz
0.5
TSA5523M
1
2
5
10
∞
100 MHz
10
500 MHz
1 GHz
2
5
Fig.5 Prescaler Smith chart (S11) of typical input impedance (ZL=50Ω; pin 2).
APPLICATION INFORMATION Tuning amplifier
The tuning amplifier is able to drive the varicap voltage without an external transistor. The V
output must be
tune
connected to an external load of 27 kΩ connected to the tuning voltage supply. Figures 6 and 7 illustrate a possible loop filter. The component values depend on the oscillator characteristics and the selected reference frequency.
1
MGG753

Crystal oscillator

The crystal oscillator uses a 4.0 MHz crystal in series with an 18 pF capacitor. The crystal operates in the series resonance mode. The connection to V
is preferred, but
CC1
it can also be connected to GND.
1996 Dec 17 13
Page 14
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia synthesizer
handbook, full pagewidth
P0 P1 P2 P3 P6
BS RF RF
+5 V
10 nF
1 nF 1 nF
GND
V
P0 P1 P2 P3 P6
BS RF2 RF1 CC1
V
tune
11 12 13 14 15
TSA5523M
16 17 18 19 20 1
18 pF
4 MHz
10 nF
100 nF
CP
10
V
tune
9
IDC
8
P7
7 6 5 4 3 2
P5 P4 SCL SDA AS XTAL
UHF VHFH VHFL SCL SDA AS
27 kΩ
2.2 nF
27 kΩ
22 kΩ
BAV99
10 nF
200 kΩ
10 nF
33 nF
220 pF
4.7 nF
2 nF
1 mH
BC847
TSA5523M
1 mH
56 Ω
33 nF
MGG749
+5 V
handbook, full pagewidth
P0 P1 P2 P3 P6
BS RF RF
+5 V
Fig.6 Typical application with DC/DC converter.
V
tune
10 nF
100 nF
4 MHz
CP
10
V
tune
9
IDC
8
P7
7
P5
6
P4
5
SCL
4
SDA
3
AS
2
XTAL
MGG750
10 nF
1 nF 1 nF
GND
V
P0 P1 P2 P3 P6
BS RF2 RF1 CC1
11 12 13 14 15
TSA5523M
16 17 18 19 20 1
18 pF
27 kΩ
2.2 nF
27 kΩ
+33 V
+5 V
UHF VHFH VHFL SCL SDA AS
Fig.7 Standard application.
1996 Dec 17 14
Page 15
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia synthesizer
handbook, full pagewidth
XTAL
SDA
SCL
1
2
AS
3
4
5
P4
1 kΩ
1 kΩ
3 kΩ
1 kΩ
V
CC1
V
CC1
AS
V
CC
V
CC
V
CC1
TSA5523M
TSA5523M
20
V
CC1
V
to prescaler
V
ref
V
CC1
CC1
19
RF1
V
CC1
18
RF2
V
CC1
17
BS
16
GND
V
V
6
P5
7
P7
8
IDC
9
V
tune
10
CP
CC1
V
CC1
CONTROL
DOWN
UP
V
CC1
V
CC1
V
CC1
CC1
×4
V
CC1
V
CC1
V
CC1
V
CC1
V
CC1
V
CC1
V
CC1
V
CC1
15
P6
14
P3
13
P2
12
P1
11
P0
Fig.8 Input/output pin schematic.
1996 Dec 17 15
MGG748
Page 16
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia synthesizer

PACKAGE OUTLINE

SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm
20
D
c
y
Z
11
E
H
TSA5523M

SOT266-1

A
X
v M
E
A
pin 1 index
110
w M
b
e
DIMENSIONS (mm are the original dimensions)
UNIT A1A
mm
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
A
max.
1.5
0.1501.4
1.2
2
A3b
0.25
p
0.32
0.20
p
cD
0.20
6.6
0.13
6.4
0 2.5 5 mm
scale
(1)E(1)
eHELLpQZywv θ
4.5
0.65 1.0 0.2
4.3
6.6
6.2
Q
A
2
A
1
detail X
0.65
0.75
0.45
0.45
(A )
L
p
L
A
3
θ
0.13 0.1
0.48
0.18
(1)
o
10
o
0
OUTLINE VERSION
SOT266-1
IEC JEDEC EIAJ
REFERENCES
1996 Dec 17 16
EUROPEAN
PROJECTION
ISSUE DATE
90-04-05 95-02-25
Page 17
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia synthesizer
SOLDERING Introduction
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used.
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our
“IC Package Databook”
Reflow soldering
Reflow soldering techniques are suitable for all SSOP packages.
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C.
Wave soldering
Wave soldering isnot recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices.
(order code 9398 652 90011).
TSA5523M
If wave soldering cannot be avoided, the following conditions must be observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering technique should be used.
• The longitudinal axis of the package footprint must
be parallel to the solder flow and must incorporate solder thieves at the downstream end.
Even with these conditions, only consider wave soldering SSOP packages that have a body width of
4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1).
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
1996 Dec 17 17
Page 18
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia TSA5523M
synthesizer

DEFINITIONS

Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
PURCHASE OF PHILIPS I
Purchase of Philips I components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
2
C COMPONENTS
2
C components conveys a license under the Philips’ I2C patent to use the
1996 Dec 17 18
Page 19
Philips Semiconductors Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
NOTES
TSA5523M
1996 Dec 17 19
Page 20
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© Philips Electronics N.V. 1996 SCA52 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
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Printed in The Netherlands 537021/1200/01/pp20 Date of release: 1996 Dec 17 Document order number: 9397 750 01313
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