Datasheet tsa5522 DATASHEETS (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TSA5522

1.4 GHz I

2

C-bus controlled

synthesizer

Product specification
Supersedes data of 1995 Mar 22
File under Integrated Circuits, IC02

1996 Jan 23

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

FEATURES

• Complete 1.4 GHz single chip system

• Three PNP band switch buffers (20 mA)

• Four bus-controlled bidirectional ports (NPN

open-collector outputs); only one port in 16-pin version

• 33 V tuning voltage output

• In-lock detector

• 5-step ADC

• Mixer-Oscillator (M/O) band switch output

• 15-bit programmable divider

• Programmable reference divider ratio (512, 640

or 1024)

• Programmable charge-pump current (50 or 250 µA)

• Varicap drive disable

2

C-bus format

• I
– address plus 4 data bytes transmission (write mode)
– address plus 1 status byte transmission (read mode)
– three independent addresses

• Low power and low radiation.

TSA5522

APPLICATIONS

• TV tuners and front-ends

• VCR tuners.

ORDERING INFORMATION

TYPE NUMBER

NAME DESCRIPTION VERSION

TSA5522M SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1
TSA5522T SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

PACKAGE

1996 Jan 23 2

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

TSA5522

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC1

V

CC2

I

CC1

I

CC2

f

RF

V

i(RF)

f

xtal

I

o(PNP)

I

o(NPN)

T

amb

T

stg

supply voltage (+5 V) 4.5 − 5.5 V
band switch supply voltage (+12 V) V

CC1

12 13.5 V
supply current − 22 30 mA
band switch supply current note 1 − 27 32 mA
RF input frequency 64 − 1400 MHz
RF input voltage fi= 80 to 150 MHz − 25 − 3 dBm

= 150 to 1000 MHz − 28 − 3 dBm

f

i

f

= 1000 to 1400 MHz − 26 − 3 dBm

i

crystal oscillator input frequency − 4 − MHz
PNP band switch buffers output current − 20 25 mA
NPN open-collector output current − 20 25 mA
operating ambient temperature −20 − +85 °C
storage temperature (IC) −40 − +150 °C

Note

1. One band switch buffer ON; I

= 20 mA.

o

GENERAL DESCRIPTION (see Fig.1) The device is a single chip PLL frequency synthesizer

designed for TV and VCR tuning systems. The circuit
consists of a divide-by-eight prescaler with its own
preamplifier, a 15-bit programmable divider, a crystal
oscillator and its programmable reference divider and a
phase/frequency detector combined with a charge-pump
which drives the tuning amplifier, including 33 V output.
Three high-current PNP band switch buffers are provided
for band switching together with four open-collector NPN
outputs (only one open-collector output on 16-pin
devices). These ports can also be used as input ports [one
Analog-to Digital Converter (ADC) and three general
purpose I/O ports (not available on 16-pin devices)]. An
output is provided to control a Philips mixer/oscillator IC in
combination with the PNP buffers state.

Depending on the reference divider ratio (512, 640
or 1024), the phase comparator operates at 3.90625 kHz,

6.25 kHz or 7.8125 kHz with a 4 MHz crystal. The LOCK
detector bit FL is set to logic 1 when the loop is locked and
is read on the SDA line (status byte) during a read
operation.

The ADC is available for digital AFC control. The ADC

2

code is read during a read operation on the I

C-bus. The
ADC input is combined with the port P6. In the TEST
mode, this port is also used as a TEST output for f

1

⁄2f

(see Table 4).

div

2

C-bus format

I

ref

and

Five serial bytes (including address byte) are required to
address the device, select the VCO frequency, program
the ports, set the charge-pump current and the reference
divider ratio. The device has three independent I2C-bus
addresses selected by applying a specific voltage on AS
input (see Table 3). The general address C2 is always
valid.

1996 Jan 23 3

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

BLOCK DIAGRAM

tune

CP

V

12

11

AMP

LOGIC

OS

CP

PUMP

CHARGE

T2,T1,T0

TSA5522

PHASE

DIGITAL

div

f



15-BIT

DIVIDER

PROGRAMMABLE

COMPARATOR

ref

f

DIVIDER

512/640/1024

RSA RSB

IN-LOCK

DETECTOR



15-BIT

REGISTER

FREQUENCY



LOCK

V

CC1

V

1

5

RSA,RSB

EE



REGISTER

7-BIT CONTROL



REGISTER

7-BIT PORTS



T2,T1,T0

GATE

BS

4

BAND

SWITCH

PNP

BUFFERS

TSA5522

MLD226



P7

P5

P4

P6

P2

P1

P0n.c. V

67 10 9 8 13161514

CC2

Fig.1 Block diagram (SSOP20).

DIVIDE-BY-8

PRESCALER





XTAL

2

3

RF2

RF1

handbook, full pagewidth

28

OSCILLATOR

XTAL

RESET

POWER-ON

17

SCL

1996 Jan 23 4



2

I C -BUS

TRANSCEIVER

18

19

SDA

ADC COMPARATORS

AS

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

PINNING

SYMBOL SO16 SSOP20 DESCRIPTION

V

CC1

RF1 2 2 RF signal input 1
RF2 3 3 RF signal input 2
BS 4 4 band switch output to mixer/oscillator drive
V

EE

V

CC2

n.c. − 7 not connected
P2 7 8 PNP band switch buffer output 2
P1 8 9 PNP band switch buffer output 1
P0 9 10 PNP band switch buffer output 0
CP 10 11 charge-pump output
V

tune

P6 12 13 NPN open-collector output/ADC input
P7 − 14 NPN open-collector output/comparator input
P5 − 15 NPN open-collector output/comparator input
P4 − 16 NPN open-collector output/comparator input
SCL 13 17 serial clock input
SDA 14 18 serial data input/output
AS 15 19 address selection input
XTAL 16 20 crystal oscillator input

1 1 voltage supply (+5 V)

5 5 ground
6 6 voltage supply (+12 V)

11 12 tuning voltage output

TSA5522

handbook, halfpage

V

V

CC1
RF1

RF2

V

CC2

BS

EE

P2
P1

1
2
3
4

TSA5522T

5
6
7
8

MLD225

16

XTAL

15

AS

14

SDA
SCL

13
12

P6
V

11

tune

CP

10

PO

9

Fig.2 Pin configuration (SO16).

1996 Jan 23 5

handbook, halfpage

V

V

CC1

RF1
RF2

V

CC2

n.c.

BS

EE

P2
P1
P0

1
2
3
4
5

TSA5522M

6
7
8
9

10

MLD230

XTAL

20
19

AS

18

SDA
SCL

17
16

P4

15

P5

14

P7

13

P6
V

12

tune

11

CP

Fig.3 Pin configuration (SSOP20).

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

FUNCTIONAL DESCRIPTION

The device is controlled via the two-wire I2C-bus. For
programming, there is one module address (7 bits) and the
R/W bit for selecting the READ or the WRITE mode.

2

C-bus mode

I

W

RITE MODE (R/W = 0); see Table 1

Data bytes can be sent to the device after the address
transmission (first byte). Four data bytes are required to
fully program the device. The bus transceiver has an
auto-increment facility which permits the programming of
the device within one single transmission
(address + 4 data bytes).

The device can also be partially programmed providing
that the first data byte following the address is divider
byte 1 (DB1) or control byte (CB). The bits in the data
bytes are defined in Table 1. The first bit of the first data

Table 1 I2C-bus data format

TSA5522

byte transmitted indicates whether frequency data
(first bit = 0) or control and ports data (first bit = 1) will
follow. Until an I
controller, additional data bytes can be entered without the
need to re-address the device. The frequency register is
loaded after the 8th clock pulse of the second divider
byte (DB2), the control register is loaded after the 8th clock
pulse of the control byte (CB) and the ports register is
loaded after the 8th clock pulse of the ports byte (PB).

2

C-BUS ADDRESS SELECTION

I
The module address contains programmable address bits

(MA1 and MA0) which offer the possibility of having
several synthesizers (up to 3) in one system by applying a
specific voltage on the AS input.

The relationship between MA1 and MA0 and the input
voltage on the AS input is given in Table 3.

2

C-bus STOP command is sent by the

BYTE MSB DATA BYTE LSB COMMAND

Address byte (ADB) 1 1 0 0 0 MA1 MA0 0 A
Divider byte 1 (DB1) 0 N14 N13 N12 N11 N10 N9 N8 A
Divider byte 2 (DB2) N7 N6 N5 N4 N3 N2 N1 N0 A
Control byte (CB) 1 CP T2 T1 T0 RSA RSB OS A
Ports byte (PB) P7

(1)

P6 P5

(1)

P4

(1)

XP2P1P0 A

Note

1. Not available on 16-pin devices.

Table 2 Description of Table 1

SYMBOL DESCRIPTION

MA1, MA0 programmable address bits (see Table 3)

14

N14 to N0 programmable divider bits N = N14 × 2

+ N13 × 213+ ... + N1 × 2 + N0
CP charge-pump current; CP = 0 = 50 µA; CP = 1 = 250 µA
T2 to T0 test bits (see Table 4). For normal operation T2 = 0; T1 = 0; T0 = 1
RSA, RSB reference divider ratio select bits (see Table 5)
OS tuning amplifier control bit; for normal operation OS = 0 and tuning voltage is ON; when

OS = 1 tuning voltage is OFF (high impedance)
P2 to P0 PNP band switch buffers control bits
P7 to P4 NPN open collector control bits when P

= 0 output n is OFF; when Pn= 1 output n is ON

n

X don’t care

1996 Jan 23 6

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

Table 3 Address selection

VOLTAGE APPLIED ON AS

INPUT

0 to 0.1V

CC1

Always valid 0 1

CC1
CC1

to 0.6V
to V

CC1

CC1

0.4V

0.9V

Table 4 Test bits

T2 T1 T0 DEVICE OPERATION

0 0 1 normal mode
0 1 X charge-pump is OFF
1 1 0 charge-pump is sinking current
1 1 1 charge-pump is sourcing current
100f
101

is available at LOCK output

ref

1

⁄2f

is available at LOCK output

div

Table 5 Ratio select bits

RSA RSB REFERENCE DIVIDER

X 0 640

0 1 1024
1 1 512

Table 6 Band switch output levels

MA1 MA2

00

10
11

TSA5522

READ MODE; R/W = 1 (see Table 7)
Data can be read from the device by setting the R/W bit to

logic 1. After the slave address has been recognized, the
device generates an acknowledge pulse and the first data
byte (status byte) is transferred on the SDA line (MSB
first). Data is valid on the SDA line during a HIGH level of
the SCL clock signal. A second data byte can be read from
the device if the microcontroller generates an
acknowledge on the SDA line (master acknowledge). End
of transmission will occur if no master acknowledge
occurs. The device will then release the data line to allow
the microcontroller to generate a STOP condition. When
ports P4 to P7 are used as inputs, the corresponding bits
must be logic 0 (high impedance state). The POR flag is
set to logic 1 at power-on. The flag is reset when an
end-of-data is detected by the device (end of a read
sequence). Control of the loop is made possible with the
in-lock flag (FL) which indicates when the loop is locked
(FL = 1).

The bits I2, to I0 represent the status of the I/O ports
P7, P5 and P4 respectively. A logic 0 indicates a LOW
level and a logic 1 indicates a HIGH level
(see “Characteristics”).

A built-in ADC is available at pin P6. This converter can be
used to apply AFC information to the microcontroller from
the IF section of the television. The relationship between
the bits A2 to A0 is given in Table 8.

P2 P1 P0

VOLTAGE

ON BS

OUTPUT

PHILIPS M/O

BAND

0 1 0 0.25 V band A
1 0 0 0.4V
0 0 1 0.8V

CC1
CC1

band B
band C

Table 7 READ data format

BYTE MSB DATA BYTE LSB COMMAND

Address byte (ADB) 11000MA1MA01 A
Status byte (SB) POR

(2)

FL

(3)

(4)

I2

(4)

I1

(4)

I0

A2

(5)

A1

(5)

A0

(5)

(1)

−

Notes

1. A = acknowledge.

2. POR = power-on-reset (POR = 1 at power-on).

3. FL = in-lock flag (FL = 1 when loop is locked).

4. I2 to I0 = digital levels for I/O ports P7, P5 and P4 respectively.

5. A2 to A0 = digital outputs of the 5-level ADC.

1996 Jan 23 7

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

TSA5522

Table 8 ADC levels

VOLTAGE APPLIED ON

(1)

CC1
CC1
CC1

0.6V

CC1

0.45V

CC1

0.3V

CC1

0.15V

CC1

0 to 0.15V

PORT P6

to 13.5V 1 0 0

to 0.6V

to 0.45V

to 0.3V

CC1

A2 A1 A0

011
010
001
000

Note

1. Accuracy is 0.02V

CC1

.

LIMITING VALUES

In accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER MIN. MAX UNIT

V

CC1

V

CC2

V

i(RF)

V

o(BS)

V

o(PNP)

I

o(PNP)

V

NPN

I

NPN

V

o(CP)

V

o(tune)

V

i(SCL)

V

i/o(SDA)

I

o(SDA)

V

i(AS)

V

i(xtal)

T

stg

T

j

t

sc

supply voltage +5 V −0.3 6.0 V
supply voltage + 12 V −0.3 16 V
prescaler input voltage −0.3 V
band switch output voltage −0.3 V
PNP band switch buffer output voltage − 0.3 V

CC1
CC1
CC2

PNP band switch buffers output current −125mA
NPN open-collector output voltage −0.3 16 V
NPN open-collector output current −125mA
charge-pump output voltage −0.3 V

CC1

output tuning voltage −0.3 35 V
serial clock input voltage −0.3 6.0 V
serial data input/output voltage −0.3 6.0 V
serial data output current −15 mA
address selection input voltage −0.3 V
crystal oscillator input voltage −0.3 V

CC1
CC1

storage temperature range (IC) −40 +150 °C
maximum junction temperature − +150 °C
short circuit time; every pin to V

or GND − 10 s

CC1

V
V
V

V

V
V

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling bipolar devices. Every pin withstands the ESD test in
accordance with

MIL-STD-883C

category B (2000 V). Every pin withstands the ESD test in accordance with Philips

Semiconductors Machine Model 0 Ω, 200 pF (200 V).

1996 Jan 23 8

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

TSA5522

THERMAL CHARACTERISTICS

SYMBOL PARAMETER MAX UNIT

R

th j-a

thermal resistance from junction to ambient in free air

SO16 110 K/W
SSOP20 120 K/W

CHARACTERISTICS

= 4.5 to 5.5 V; V

V

CC1

CC2=VCC1

to 13.2 V; T

= −20 to 85 °C; unless otherwise specified; see note 1

amb

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX UNIT

V
V
I
I

f

CC1

CC2
CC1
CC2

RF

supply voltage (+5 V) 4.5 − 5.5 V
supply voltage (+12 V) V

CC1

− 13.5 V
supply current − 22 30 mA
supply current One band switch buffer is ON;

I

=20mA

source

− 27 32 mA

RF input frequency 64 − 1400 MHz

DR divider ratio 15-bit frequency word 256 − 32767 MHz

Crystal oscillator

f

xtal

crystal oscillator input

R

=25to300Ω 3.2 4 4.48 MHz

xtal

frequency

Z

xtal

crystal oscillator input

fi= 4 MHz 600 1200 −Ω

impedance (absolute value)

Prescaler

V

i(RF)

RF input level V

= 4.5 to 5.5 V; see Fig.4;

CC1

fi= 80 to 150 MHz
V

= 4.5 to 5.5 V; see Fig.4;

CC1

fi= 150 to 1000 MHz

= 4.5 to 5.5 V; see Fig.4;

V

CC1

fi= 1000 to 1400 MHz

PNP band switch buffers outputs

|ILO| output leakage current V
V

o(sat)

output saturation voltage I

= 13.5 V; Vo=0V −10 −− µA

CC2

= 20 mA; note 1 - 0.2 0.5 V

source

NPN open-collector outputs P4, P5, P6 and P7; see note 2

| output leakage current V

|I

LO

V
C

o(sat)

OL

output saturation voltage I
allowed capacitive loading

= 5.5 V; Vo= 13.5 V −−10 µA

CC1

= 20 mA; note 3 − 0.2 0.5 V

sink

VOL= 13.5 V 10 nF

on output pins

Input ports P7, P5 and P4; see note 2
V

IL

V

IH

LOW level input voltage −−1.5 V
HIGH level input voltage 3 −− V

AS input (Address Selection)

I

IH(AS)

HIGH level input current VAS=V

CC1

−25 − 3dB

−28 − 3dB

−26 − 3dB

−−50 µA

1996 Jan 23 9

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

TSA5522

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX UNIT

I

IL(AS)

LOW level input current VAS= 0 V −50 −− µA

SCL and SDA inputs

V

IL

V

IH

I

IH

I

IL

f

clk

SDA output (I

I

ILO

V

o

LOW level input voltage −−1.5 V
HIGH level input voltage 3.0 − 5.5 V
HIGH level input current VIH= 5.5 V; V

V

= 5.5 V; V

IH

LOW level input current VIL=0V; V

=0V −−10 µA

CC1

= 5.5 V −−10 µA

CC1

= 5.5 V −10 −− µA

CC1

input clock frequency − 100 400 kHz

2

C bus mode)

output leakage current VO= 5.5 V −−10 µA
output voltage I

=3mA −−0.4 µA

sink

BS output (M/O band selection)

V

o(BS)

output voltage band A; I

band B; I
band C; I
band C; I

=20µA − 0.25 0.5 V

source

=20µA 0.36V

source

=20µA 0.7V

source

=50µA 3.1 −− V

source

CC1

CC1

0.4V

0.8V

CC1
CC1

0.43V

0.9V

CC1

CC1

V
V

Charge-pump output CP

 HIGH charge pump current

I

ICPH

CP = 1 − 250 −µA

(absolute value)

 LOW charge pump current

I

ICPL

CP = 0 − 50 −µA

(absolute value)

V

o(CP)

I

LI(off)

output voltage in-lock; T
off-state leakage current T2 = 0; T1 = 1 −5 1 15 nA

Tuning voltage output V

I

LO(off)

leakage current when

tune

OS = 1; V

= +25 °C − 1.95 − V

amb

=33V −−10 µA

tune

switched-off

V

o

V

ripple(p-p)

output voltage when the
loop is closed

acceptable ripple voltage
on V

(peak-to-peak

CC1

OS = 0; T2 = 0; T1 = 0; T0 = 1;
RL=27kΩ; V

f

= 300 Hz to 300 kHz −−30 mV

ripple

tune

=33V

0.4 − 32.6 V

value)

Notes

1. A single PNP band switch buffer is ON.

2. P4, P5 and P7 I/O ports are not available in 16-pin package. In 20-pin package, when a port is active, the collector
voltage must not exceed 6 V.

3. A single NPN open-collector output is ON.

1996 Jan 23 10

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

12

handbook, full pagewidth

power
(dBm)

0

12

24

36

48

0 200 400 1400 1600800 1000 1200

600

TSA5522

MLD227

f (MHz)

i

Fig.4 Prescaler typical input sensitivity curve.

1996 Jan 23 11

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

INTERNAL PIN CONFIGURATION

handbook, full pagewidth

V

CC1

to presscaler

divider

V

CC1

RF1

RF2

V

CC1

V

V

CC1

BS

CC1

V

ref

TSA5522

V

3 kΩ

300 µF

V

CC1

AS

V

CC1

1 kΩ

V

CC1

V

CC1

1 kΩ

CC1

XTAL

1 kΩ

V

CC1

AS

SDA

SCL

P4

V

EE

TSA5522

V

CC2

V

n.c.

P2

P1

P0

CC2

V

CC2

V

CC2

V

V

V

CC1

CC1

V

CC1

X4

CC1

control

down

V

CC1

P5

V

CC1

P7

V

CC1

P6

V

tune

CP

up

MLD228

Fig.5 Internal pin configuration.

1996 Jan 23 12

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

APPLICATION INFORMATION
Tuning amplifier

The tuning amplifier is capable of driving the varicap
voltage without an external transistor. The tuning voltage
output must be connected to an external load of 27 kΩ
which is connected to the tuning voltage supply rail.
Figure 6 shows a possible loop filter. The component
values depend on the oscillator characteristics and the
selected reference frequency.

handbook, full pagewidth

39 nF

180 nF

22 kΩ

P6
SCL
SDA

AS

P0
CP

V

tune
P6
SCL
SDA
AS
XTAL

TSA5522T

TSA5522

Crystal oscillator

The crystal oscillator uses a 4 MHz crystal connected in
series with an 18 pF capacitor thereby operating in the
series resonance mode. Connecting the oscillator to the
supply voltage is preferred, but it can, however, also be
connected to ground.

V

tune

33 V
UHF
VHF1
VHF3
12 V

BS

RF
RF

5 V

10 nF

V

V

P1
P2

CC2
V

EE

BS
RF2
RF1

CC1

27 kΩ

1 nF

1 nF

4 MHz 18 pF

Fig.6 Typical application (SO16).

1996 Jan 23 13

MLD229

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

Flock flag (FL) definition

When the LOCK output is LOW the maximum frequency
deviation (∆f) from stable frequency can be expressed as

K

follows:

∆f

VCO

-------------­K

O

where:

K

= oscillator slope Hz/V

vco

ICP = charge-pump current (A)
KO = 4 × 10E6
C1, C2 = loop filter capacitors.

In the application:

K

= 16 MHz/V (UHF band)

VCO

ICP= 250 µA
C1 = 180 nF, C2 = 39 nF
∆f=±31.2 kHz.

Table 9 LOCK output / FL flag setting

C1 C2+()

I

××±=

-----------------------------

CP

C1 C2×()

andbook, halfpage

TSA5522

C2

C1

R

MBE331

Fig.7 Loop filter.

DESCRIPTION CONDITION MIN. MAX. UNIT

Time span between actual phase lock and LOCK bit is LOW
(or FL flag = 1)

Time span between the loop losing lock and LOCK bit is
HIGH or (FL flag = 0)

RSA = 1; RSB = 1 1024 1152 µs
RSA = 1; RSB = 1 2048 2304 µs
RSB = 0 1280 1440 µs

0 300 µs

1996 Jan 23 14

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

PACKAGE OUTLINES

SO16: plastic small outline package; 16 leads; body width 3.9 mm

D

c

y

Z

16

9

TSA5522

SOT109-1

E

H

E

A

X

v M

A

pin 1 index

1

e

0 2.5 5 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

A

max.

1.75

0.069

A1A2A

0.25

1.45

0.10

1.25

0.0098

0.057

0.0039

0.049

0.25

0.01

b

3

p

0.49

0.25

0.36

0.19

0.0098

0.019

0.0075

0.014

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

(1)E(1) (1)

cD

10.0

9.8

0.39

0.38

8

b

p

scale

eHELLpQZywv θ

4.0

1.27

3.8

0.16

0.050

0.15

w M

6.2

5.8

0.24

0.23

A

2

1.05

0.041

Q

A

1

detail X

1.0

0.7

0.4

0.6

0.028

0.039

0.020

0.016

(A )

L

p

L

0.25 0.1

0.25

0.01

0.01 0.004

A

3

θ

0.7

0.3

0.028

0.012

o

8

o

0

OUTLINE
VERSION

SOT109-1

IEC JEDEC EIAJ

076E07S MS-012AC

REFERENCES

1996 Jan 23 15

EUROPEAN

PROJECTION

ISSUE DATE

91-08-13
95-01-23

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm

20

D

c

y

Z

11

E

H

E

TSA5522

SOT266-1

A

X

v M

A

pin 1 index

110

w M

b

e

DIMENSIONS (mm are the original dimensions)

mm

A

max.

1.5

0.1501.4

1.2

0.25

b

3

p

0.32

0.20

UNIT A1A2A

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

p

cD

0.20

6.6

0.13

6.4

0 2.5 5 mm

scale

(1)E(1)

eHELLpQZywv θ

4.5

0.65 1.0 0.2

4.3

6.6

6.2

Q

A

2

A

1

detail X

0.65

0.75

0.45

0.45

(A )

L

p

L

A

3

θ

0.13 0.1

0.48

0.18

(1)

o

10

o

0

OUTLINE
VERSION

SOT266-1

IEC JEDEC EIAJ

REFERENCES

1996 Jan 23 16

EUROPEAN

PROJECTION

ISSUE DATE

90-04-05
95-02-25

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

Reflow soldering

Reflow soldering techniques are suitable for all SO and
SSOP packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

Wave soldering

(order code 9398 652 90011).

TSA5522

SSOP
Wave soldering isnot recommended for SSOP packages.

This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

If wave soldering cannot be avoided, the following
conditions must be observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave)
soldering technique should be used.

• The longitudinal axis of the package footprint must

be parallel to the solder flow and must incorporate
solder thieves at the downstream end.

Even with these conditions, only consider wave
soldering SSOP packages that have a body width of

4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).

ETHOD (SO AND SSOP)

M
During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal

of corrosive residues in most applications.
SO
Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be

parallel to the solder flow.

• The package footprint must incorporate solder thieves at

the downstream end.

1996 Jan 23 17

Repairing soldered joints

Fix the component by first soldering two diagonally-

opposite end leads. Use only a low voltage soldering iron

(less than 24 V) applied to the flat part of the lead. Contact

time must be limited to 10 seconds at up to 300 °C. When

using a dedicated tool, all other leads can be soldered in

one operation within 2 to 5 seconds between

270 and 320 °C.

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

TSA5522

PURCHASE OF PHILIPS I

Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

2

C COMPONENTS

2

C components conveys a license under the Philips’ I2C patent to use the

1996 Jan 23 18

Philips Semiconductors Product specification

1.4 GHz I2C-bus controlled synthesizer

NOTES

TSA5522

1996 Jan 23 19

Philips Semiconductors – a worldwide company

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BUENOS AIRES, Tel. [phone], Fax. [phone]

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Piazza IV Novembre 3, 20124 MILANO,
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Korea: Philips House, 260-199 Itaewon-dong,

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Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,

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Tel. [phone], Fax. [phone]

th

floor, Suite 51,

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

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Norway: Box 1, Manglerud 0612, OSLO,

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Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton,
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Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
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209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. [phone], Fax. [phone]

Turkey:Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. [phone], Fax. [phone]

Ukraine: Philips UKRAINE, 2A Akademika Koroleva str., Office 165,

252148 KIEV, Tel.[phone], Fax. [phone]

United Kingdom: Philips Semiconductors LTD.,

276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. [phone], Fax. [phone]

United States:811 East Arques Avenue, SUNNYVALE,

CA 94088-3409, Tel. [phone], Fax. [phone]

Uruguay: Coronel Mora 433, MONTEVIDEO,

Tel. [phone], Fax. [phone]

Internet: http://www.semiconductors.philips.com/ps/
For all other countries apply to: Philips Semiconductors,

International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. [phone]

SCDS47 © Philips Electronics N.V. 1996

All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.

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