Datasheet tsa5520, tsa5521 DATASHEETS (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TSA5520; TSA5521

1.3 GHz universal bus-controlled
TV synthesizer

Product specification
Supersedes data of 1995 Mar 16
File under Integrated Circuits, IC02

1996 Oct 10

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TV synthesizer

FEATURES

• Complete 1.3 GHz single chip system

• Four PNP band switch buffers (40 mA)

• 33 V output tuning voltage

• In-lock detector

• 15-bit programmable divider

• Programmable reference divider ratio

(512, 640 or 1024)

• Programmable charge-pump current (60 or 280 µA)

• Varicap drive disable

2

• Universal bus protocol I
TSA5520/TSA5521 I2C-bus mode only includes the
write mode; if both read and write modes are required
the TSA5526/TSA5527 devices should be selected):

– bus protocol for 18 or 19 bits transmission

(3-wire bus)

– extra protocol for 27 bits for test and features

(3-wire bus)
– address plus 4 data bytes transmission (I2C-bus)
– three independent I2C-bus addresses

• Low power and low radiation.

C-bus or 3-wire bus (the

TSA5520; TSA5521

APPLICATIONS

• TV tuners and front ends

• VCR tuners.

ORDERING INFORMATION

TYPE NUMBER

NAME DESCRIPTION VERSION

TSA5520M SSOP16 plastic shrink small outline package; 16 leads; body width 4.4 mm SOT369-1
TSA5520T SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
TSA5521M SSOP16 plastic shrink small outline package; 16 leads; body width 4.4 mm SOT369-1
TSA5521T SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

PACKAGE

1996 Oct 10 2

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TSA5520; TSA5521

TV synthesizer

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC1

V

CC2

I

CC1

I

CC2

f

RF

V

i(RF)

f

xtal

I

o(PNP)

P

tot

T

stg

T

amb

Notes

1. One band switch buffer ON with 40 mA.

2. One buffer ON, I

3. The power dissipation is calculated as follows:
P

D

supply voltage (+5 V) 4.5 − 5.5 V
band switch supply voltage (12 V) V

CC1

12 13.5 V
supply current − 20 25 mA
band switch supply current note 1 − 50 55 mA
RF input frequency 64 − 1300 MHz
RF input voltage 80 to 150 MHz −25 − +3 dBm

150 MHz to 1 GHz −28 − +3 dBm

1 to 1.3 GHz −15 − +3 dBm
crystal oscillator input frequency 3.2 4.0 4.48 MHz
PNP band switch buffers output current note 2 4 − 50 mA
total power dissipation note 3 − 250 400 mW
IC storage temperature −40 − +150 °C
operating ambient temperature −20 − +85 °C

= 40 mA; two buffers ON, maximum sum of Io= 50 mA.

o

V

CC1ICC1VCC2ICC2Io

–()I

V

o

CE satPNP()

V33 2⁄()

2

27 kΩ⁄+×+×+×=

1996 Oct 10 3

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TV synthesizer

GENERAL DESCRIPTION

The device is a single-chip PLL frequency synthesizer
designed for TV and VCR tuning systems. The circuit
consists of a divide-by-eight prescaler with its own
preamplifier, a 15-bit programmable divider, a crystal
oscillator and its programmable reference divider and a
phase/frequency detector combined with a charge-pump
which drives the tuning amplifier and the 33 V output.
Four high-current PNP band switch buffers are provided
for band switching. Two PNP buffers can be switched on
simultaneously. The sum of the collector currents is limited
to 50 mA.

Depending on the reference divider ratio (512, 640 or

1024), the phase comparator operates at 3.90625 kHz,

6.25 kHz or 7.8125 kHz using a 4 MHz crystal.
The lock detector output is LOW when the PLL loop is

locked. In the test mode, this output is used as a test
output for f

and 1/2f

ref

controlled in accordance with the I2C-bus format or the
3-wire bus format depending on the voltage applied to the
SW input (see Table 2).

2

I

C-bus format (SW = LOW)

(see Table 6). The device can be

div

TSA5520; TSA5521

The device has three independent I2C-bus addresses
which can be selected by applying a specific voltage on the
CE input (see Table 5). The general address C2 is always
valid. When the I2C-bus format is fully used, TSA5520 and
TSA5521 are equal.

3-wire bus format (SW = V

Data is transmitted to the device during a HIGH level on
the CE input (enable line pin 15). The device is compatible
with 18-bit and 19-bit data formats. The first four bits are
used to program the PNP band switch buffers and the
remaining bits are used to control the programmable
divider. A 27-bit data format may also be used to set the
charge-pump current, the reference divider ratio and for
test purposes. The difference between TSA5520 and
TSA5521 are given in Table 1.

When the 27-bit format is used, the TSA5520 and
TSA5521 are equal and the reference divider is controlled
by the RSA and RSB bits (see Table 7). More details are
given in Chapter “Functional description” Section “3-wire
bus mode (SW = open-circuit or V
Figs 3, 4 and 5”.

or open-circuit)

CC1

); see

CC1

Five serial bytes (including address byte) are required to
address the device, select the VCO frequency, program
the four PNP band switch buffers, set the charge-pump
current and the reference divider ratio.

Table 1 Differences between TSA5520 and TSA5521

TYPE NUMBER DATA WORD REFERENCE DIVIDER FREQUENCY STEP (kHz)

TSA5520 18-bit 512
TSA5520 19-bit 1024
TSA5521 18-bit or 19-bit 640

(1)

(2)

(1)

62.5

31.25

Notes

1. The selection of the reference divider is given by an automatic identification of the data word length.

2. The reference divider is set to 640 at power-on reset.

50

1996 Oct 10 4

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TV synthesizer

BLOCK DIAGRAM

handbook, full pagewidth

RF

XTAL

SCL

SDA

CE

SW

1

16

OSCILLATOR

13
14
15

11

AMP

XTAL

POWER-ON

RESET

2

I C/3-WIRE BUS

RECEIVER

PRESCALER

DIVIDE-BY-8

DIVIDER

512/640/1024

RSA

RSB

PROGRAMMABLE

15-BIT FREQUENCY

4-BIT BAND SWITCH

15-BIT

DIVIDER

REGISTER

REGISTER

f

div

f

ref

GATE

DIGITAL

PHASE

COMPARATOR

T2,T1,T0

IN-LOCK

DETECTOR

LOCK

RSA,RSB

7-BIT CONTROL

REGISTER

TSA5520; TSA5521

9

CP

10

V

tune

CHARGE

PUMP

CP

AMP

LOGIC

OS

3

V

CC1

2

V

EE

TSA5520
TSA5521

8

4

V

BS17BS26BS35BS4

CC2

Fig.1 Block diagram.

T2,T1,T0

12

MKA965

LOCK

1996 Oct 10 5

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TV synthesizer

PINNING

SYMBOL PIN DESCRIPTION

RF 1 RF signal input
V

EE

V

CC1

V

CC2

BS4 5 PNP band switch buffer output 4
BS3 6 PNP band switch buffer output 3
BS2 7 PNP band switch buffer output 2
BS1 8 PNP band switch buffer output 1
CP 9 charge-pump output
V

tune

SW 11 bus format selection input, I

LOCK 12 lock detector output
SCL 13 serial clock input
SDA 14 serial data input/output
CE 15 chip enable/address selection input
XTAL 16 crystal oscillator input

2 ground
3 supply voltage (+5 V)
4 band switch supply voltage (+12 V)

10 tuning voltage output

2

C-bus or

3-wire

TSA5520; TSA5521

Fig.2 Pin configuration.

FUNCTIONAL DESCRIPTION

The device is controlled via the I2C-bus or the 3-wire bus
depending on the voltage applied to the SW input (pin 11).
A HIGH level on the SW input enables the 3-wire bus
inputs which are Chip Enable (CE), serial data input (SDA)
and serial clock input (SCL). A LOW level on the SW input
enables the I2C-bus inputs which are CE [Address
Selection (AS) input], serial data input/output (SDA) and
serial clock input (SCL). The bus format selection is given
in Table 2.

2

C-bus mode (SW = LOW); see Table 3

I

Data bytes can be sent to the device after the address
transmission (first byte). Four data bytes are required to
fully program the device. The bus receiver has an
auto-increment facility which permits the programming of
the device within one single transmission
(address + 4 data bytes).

The device can also be partially programmed providing
that the first data byte following the address is Divider
Byte 1 (DB1) or the Control Byte (CB). The bits in the data
bytes are defined in Table 3.

The first bit of the first data byte transmitted indicates
whether frequency data (first bit = 0) or control and band
switch data (first bit = 1) will follow. Until an I

2

C-bus STOP
command is sent by the controller, additional data bytes
can be entered without the need to re-address the device.
The frequency register is loaded after the 8th clock pulse
of the second Divider Byte (DB2), the control register is
loaded after the 8th clock pulse of the Control Byte (CB)
and the band switch register is loaded after the 8th clock
pulse of the Band switch Byte (BB).

2

C-bus address selection

I

The module address contains programmable address bits
(MA1 and MA0) which offer the possibility of having
several synthesizers (up to 3) in one system by applying a
specific voltage to the CE input.

The relationship between MA1 and MA0 and the input
voltage applied to the CE input is given in Table 5.

1996 Oct 10 6

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TSA5520; TSA5521

TV synthesizer

Table 2 Bus format selection

PIN NAME 3-WIRE BUS MODE I

11 SW open or HIGH LOW
13 SCL clock input SCL input
14 SDA data input SDA input/output
15 CE chip enable input address selection input

2

Table 3 I

C-bus data format

BYTE MSB DATA BYTE LSB SLAVE ANSWER

Address Byte (ADB) 1 1 0 0 0 MA1 MA0 0 A
Divider Byte 1 (DB1) 0 N14 N13 N12 N11 N10 N9 N8 A
Divider Byte 2 (DB2) N7 N6 N5 N4 N3 N2 N1 N0 A
Control Byte (CB) 1 CP T2 T1 T0 RSA RSB OS A
Band switch Byte (BB) XXXXBS4BS3BS2BS1 A

Table 4 Description of Table 3

2

C BUS MODE

SYMBOL DESCRIPTION

A acknowledge
MA1 and MA0 programmable address bits (see Table 5)

14

N14 to N0 programmable divider bits; N = N14 × 2

+ N13 × 213+ ... + N1 × 2+N0
CP charge-pump current; CP = 0 = 60 µA; CP = 1 = 280 µA
T2 to T0 test bits (see Table 6); for normal operation T2 = 0, T1 = 0 and T0 = 1
RSA and RSB reference divider ratio select bits (see Table 7)
OS tuning amplifier control bit; for normal operation OS = 0 and tuning voltage is ON;

when OS = 1 tuning voltage is OFF (high impedance)

BS4 to BS1 PNP band switch buffers control bits; when BS

= 0 buffer n is OFF;

n

when BSn= 1 buffer n is ON

X don’t care

Table 5 I2C-bus address selection

VOLTAGE APPLIED TO THE

CE INPUT (SW = LOW)

0 to 0.1V

CC1

MA1 MA0

00

Always valid 0 1

0.4V

0.9V

CC1
CC1

to 0.6V
to V

CC1

CC1

10
11

1996 Oct 10 7

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TV synthesizer

3-wire bus mode (SW = open-circuit or V

see Figs 3, 4 and 5
During a HIGH level on the CE input, the data is clocked

into the data register at the HIGH-to-LOW transition of the
clock pulse. The first four bits control the band switch
buffers and are loaded into the internal band switch
register on the 5th rising edge of the clock pulse.
The frequency bits are loaded into the frequency register
at the HIGH-to-LOW transition of the chip enable line when
an 18-bit or 19-bit data word is transmitted.

At power-on the charge-pump current is set to 280 µA, the
tuning voltage output is disabled (V

tune

= 33 V in
application; see Fig.12), the test bits T2, T1 and T0 are set
to the normal mode and RSB is set to 1 (TSA5520) or 0
(TSA5521). When an 18-bit data word is transmitted, the
most significant bit of the divider N14 is internally set to 0
and bit RSA is set to 1. When a 19-bit data word is
transmitted, bit RSA is set to 0.

When a 27-bit word is transmitted, the frequency bits are
loaded into the frequency register on the 20th rising edge
of the clock pulse and the control bits at the HIGH-to-LOW
transition of the chip enable line. In this mode, the
reference divider is given by the RSA and RSB bits (see
Table 7). The test bits T2, T1 and T0, the charge-pump
bit CP, the ratio select bit RSB and the OS bit can only be
selected or changed with a 27-bit transmission. They
remain programmed if an 18-bit or a 19-bit transmission

CC1

);

TSA5520; TSA5521

occurs. Only RSA is controlled by the transmission length
when the 18-bit or 19-bit format is used.

A data word of less than 18 bits will not affect the
frequency register of the device. The definition of the bits
is unchanged compared to the I2C bus mode.

The power-on detection threshold voltage V
V

= 2 V at room temperature. Below this threshold, the

CC1

device is reset to the power-on state described above.

Table 6 Test bits

T2 T1 T0 DEVICE OPERATION

0 0 1 normal mode
0 1 X charge-pump is OFF
1 1 0 charge-pump is sinking current
1 1 1 charge-pump is sourcing current
100f
101

is available at LOCK output

ref

1

⁄2f

is available at LOCK output

div

Table 7 Ratio select bits

RSA RSB REFERENCE DIVIDER

X 0 640
0 1 1024
1 1 512

is fixed to

POR

For TSA5520 bit RSB =1 at power-on; the reference divider is 512 or 1024.
For TSA5521 bit RSB = 0 at power-on; the reference divider is 640.
For TSA5520/TSA5521 the value of RSB can also be programmed by using the 27-bit data format. When returning to the normal mode, bit RSB remains

as programmed with the 27-bit data word.

Fig.3 Normal mode; 18-bit data format (RSA = 1).

1996 Oct 10 8

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TSA5520; TSA5521

TV synthesizer

For TSA5520 bit RSB = 1 at power-on; the reference divider is 512 or 1024.
For TSA5521 bit RSB = 0 at power-on; the reference divider is 640.
For TSA5520/TSA5521 the value of RSB can also be programmed by using the 27-bit data format. When returning to the normal mode, bit RSB remains

as programmed with the 27-bit data word.

Fig.4 Normal mode; 19-bit data format (RSA = 0).

For TSA5520 bit RSB = 1 at power-on; the reference divider is 512 or 1024.
For TSA5521 bit RSB = 0 at power-on; the reference divider is 640.
For TSA5520/TSA5521 the value of RSB can also be programmed by using the 27-bit data format. When returning to the normal mode, bit RSB remains

as programmed with the 27-bit data word.

Fig.5 Test and features mode; 27-bit data format.

1996 Oct 10 9

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TSA5520; TSA5521

TV synthesizer

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC1

V

CC2

V

i(RF)

V

o(BSn)

I

o(BSn)

V

o(CP)

V

o(tune)

V

i(SW)

V

o(LOCK)

V

i(SCL)

V

i/o(SDA)

I

o(SDA)

V

i(CE)

V

i(xtal)

T

stg

T

j

t

sc

supply voltage; +5 V (pin 3) −0.3 +6.0 V
band switch supply voltage; +12 V (pin 4) −0.3 +16 V
prescaler input voltage −0.3 V
band switch buffers output voltage

−0.3 V

CC1
CC2

V
V

(pins 5 to 8)
band switch buffers output current −1 +50 mA
charge-pump output voltage (pin 9) −0.3 V

CC1

V
output tuning voltage (pin 10) −0.3 +35 V
input switching voltage (pin 11) −0.3 V
lock output voltage (pin 12) −0.3 V

CC1
CC1

V

V
serial clock input voltage (pin 13) −0.3 +6.0 V
serial data input/output voltage (pin 14) −0.3 +6.0 V
serial data output current −1 +10 mA
chip enable input voltage (pin 15) −0.3 +6.0 V
crystal oscillator input voltage (pin 16) −0.3 V

CC1

V
IC storage temperature −40 +150 °C
maximum junction temperature − +150 °C
short-circuit time; every pin except pin 4 to

note 1 − 10 s

pin 3 and every pin to pin 2

Note

1. Short-circuit between V
rating at V

CC1

.

CC1

and V

is allowed provided the voltage applied to V

CC2

is less than the 6 V maximum

CC2

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling bipolar devices. Every pin withstands the ESD test in
accordance with

“MIL-STD-883C category B”

(2000 V). Every pin withstands the ESD test in accordance with Philips

Semiconductors Machine Model 0 Ω, 200 pF (200 V).

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air

SO16 110 K/W
SSOP16 142 K/W

1996 Oct 10 10

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TSA5520; TSA5521

TV synthesizer

CHARACTERISTICS

V

= 4.5 to 5.5 V; V

CC1

CC2=VCC1

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies

V
V

CC1
CC2

supply voltage 4.5 − 5.5 V
band switch buffers supply

voltage

I

CC1

I

CC2

V

POR

supply current at power-on − 20 25 mA
band switch buffers supply current at power-on − 0.5 1 mA

supply voltage below which POR
is active

f

RF

RF input frequency 64 − 1300 MHz

DR divider ratio 15-bit frequency word 256 − 32767

f
Z

xtal

xtal

crystal oscillator input frequency R
crystal oscillator input impedance

(absolute value)

to 13.2 V; T

= −20 to +85 °C; unless otherwise specified.

amb

one band switch buffer is ON;

=40mA

I

source

two band switch buffers are ON;
I

=40mA+5mA

source

V

− 50 55 mA

− 56 62 mA

12 13.5 V

CC1

(any combination)

1.5 2.0 − V

14-bit frequency word 256 − 16383

= 25 to 200 Ω 3.2 4.0 4.48 MHz

xtal

fi= 4 MHz 600 1200 −Ω

Prescaler (see Figs 8 and 9)
V

Z

i(RF)

i(RF)

RF input level fi= 80 to 150 MHz −25 − 3 dBm

input impedance see Fig.8

PNP band switch buffers outputs (pins 5 to 8)

I

LO

V

o(sat)

output leakage current V

output saturation voltage I

LOCK output (PNP collector output)

I

o(ool)

V

osat(ool)

output current when out-of-lock V
output saturation voltage when

out-of-lock

V

o(LOCK)

LOCK output voltage − 0.01 0.4 V

SW input (bus format input)

V

IL

V

IH

I

IH

I

IL

LOW level input voltage 0 − 1.5 V
HIGH level input voltage 3 − V
HIGH level input current VSW=V
LOW level input current VSW=0V −100 −− µA

= 150 to 1000 MHz −28 − 3 dBm

f

i

= 1000 to 1300 MHz −15 − 3 dBm

f

i

CC2

= 13.5 V;

−10 −− µA

Vo=0V

= 40 mA;

source

V

o(sat)=VCC2

= 5.5 V; Vo= 5.5 V −−100 µA

CC1

I

= 200 µA;

source

V

o(sat)=VCC1

CC1

− V

− V

o

o

− 0.2 0.4 V

− 0.4 0.8 V

CC1

−−10 µA

V

1996 Oct 10 11

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TSA5520; TSA5521

TV synthesizer

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

CE input (chip enable/address selection)

V

IL

V

IH

I

IH

I

IL

SCL and SDA inputs

V

IL

V

IH

I

IH

I

IL

f

clk

SDA outputs (I

I

LO

V

o

Charge-pump output CP

| HIGH charge-pump current CP = 1 − 280 −µA

|I

ICPH

| LOW charge-pump current CP = 0 − 60 −µA

|I

ICPL

V

CP

I

LI(off)

Tuning voltage output V

I

LO(off)

V

o

3-wire bus timing (see Figs 6 and 7)
t

HIGH

t

SU;DAT

t

HD;DAT

t

SU;ENSCL

t

HD;ENDAT

t

EN

t

HD;ENSCL

LOW level input voltage 0 − 1.5 V
HIGH level input voltage 3 − 5.5 V
HIGH level input current VCE= 5.5 V −−10 µA
LOW level input current VCE=0V −10 −− µA

LOW level input voltage 0 − 1.5 V
HIGH level input voltage 3.0 − 5.5 V
HIGH level input current V

LOW level input current V

V

V

BUS
BUS
BUS
BUS

= 5.5 V; V
= 5.5 V; V
= 1.5 V; V
=0V; V

=0V −−10 µA

CC1

= 5.5 V −−10 µA

CC1

=0V −−10 µA

CC1

= 5.5 V −10 −− µA

CC1

clock frequency − 100 400 kHz

2

C-bus mode)

output leakage current V
output voltage I

output voltage in-lock; T

= 5.5 V −−10 µA

SDA

=3mA −−0.4 V

sink

=25°C − 1.95 − V

amb

off-state leakage current T2 = 0; T1 = 1 −15 −0.5 +15 nA

tune

leakage current when

OS = 1; V

=33V −−10 µA

tune

switched-off
output voltage when the loop is

closed

OS = 0; T2 = 0; T1 = 0; T0 = 1;
RL=27kΩ; V

tune

=33V

0.2 − 32.7 V

clock high time 2 −− µs
data set-up time 2 −− µs
data hold time 2 −− µs
enable to clock set-up time 10 −− µs
enable to data hold time 2 −− µs
enable between two

10 −− µs

transmissions
enable to clock active edge hold

6 −− µs

time

1996 Oct 10 12

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled

TV synthesizer

TSA5520; TSA5521

Fig.6 Timing diagram for 3-wire bus; SDA, SCL and CE.

Fig.7 Timing diagram for 3-wire bus; CE and SCL.

1996 Oct 10 13

Philips Semiconductors Product specification

BBBBBBBBBBBBBBBBBBBBBBBBBB

B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B

BBBBBBBBBBBBBBBBBBBBBBBBBB

1.3 GHz universal bus-controlled

TV synthesizer

TSA5520; TSA5521

Fig.8 Prescaler Smith chart of typical input impedance at pin 1.

BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBBBBBBBBBBBBBBBBB

Fig.9 Prescaler typical input sensitivity curve.

1996 Oct 10 14

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled

TV synthesizer

INTERNAL PIN CONFIGURATION

handbook, full pagewidth

V

CC1

1

RF

V

EE

2

V

EE

3

V

CC1

4

V

CC2

V

CC2

5

BS4

V

ref

internal

reference

voltage

to address

selection

TSA5520; TSA5521

V

CC1

16

XTAL

V

EE

V

CC1

15

CE

V

EE

V

CC1

14

SDA

BS3

BS2

BS1

V

V

V

V

V

CC1

V

CC1

V

CC1

V

V

CC1

EE

13

SCL

EE

12

LOCK

EE

11

SW

EE

10

V

tune

EE

9

CP

ACK

2

(I C BUS)

V

V

CC2

EE

TSA5520

6

V

EE

V

CC2

7

V

EE

V

CC2

8

TSA5521

command

down

V

EE

Fig.10 Internal pin configuration.

1996 Oct 10 15

up

V

EE

MLC886 - 1

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TSA5520; TSA5521

TV synthesizer

APPLICATION INFORMATION
Tuning amplifier

The tuning amplifier is capable of driving the varicap
voltage without an external transistor. The tuning voltage
output must be connected to an external load of 27 kΩ
which is connected to the tuning voltage supply rail.
Figures 11 and 12 show a possible loop filter.
The component values depend on the oscillator
characteristics and the selected reference frequency.

2

Examples of I

Tables 8 to 12 show the various sequences where f

C-bus sequences (SW = LOW)

osc

S = START, A = acknowledge and P = STOP. The sequence is as follows:
START + address byte + divider byte 1 + divider byte 2 + control byte + band switch byte + STOP.

For the complete sequence see Table 8 (sequence 1) or Table 9 (sequence 2).

Table 8 Complete sequence 1

Crystal oscillator

The crystal oscillator uses a 4 MHz crystal connected in
series with an 18 pF capacitor thereby operating in the
series resonance mode. Connecting the oscillator to the
supply voltage is preferred but it can, however, also be
connected to ground.

= 100 MHz, BS4 = ON, ICP= 280 µA, N = 512, f

= 4 MHz,

xtal

SC2A06A40ACEA08A P

Table 9 Complete sequence 2

SC2ACEA08A06A40A P

Table 10 Divider bytes only sequence

SC2A06A40A P

Table 11 Control and band switch bytes only sequence

SC2ACEA08AP

Table 12 Control byte only sequence

SC2ACEA P

2

Other I

C-bus sequences are not allowed. Other I2C-bus addresses may be selected by applying an appropriate voltage

to the CE input.

Examples of 3-wire bus sequences (TSA5520; SW = OPEN)
Table 13 18-bit sequence (f

= 800 MHz, BS4 = ON)

osc

100011001000000000

Table 14 19-bit sequence (f

= 650 MHz, BS3 = ON)

osc

0100101000101000000

The reference divider is automatically set to 512 unless RSB has been programmed to 0 during a 27-bit sequence.

1996 Oct 10 16

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TSA5520; TSA5521

TV synthesizer

Table 15 27-bit sequence (f

000101110101001100010001000

The reference divider is automatically set to 1024 unless RSB has been programmed to 0 during a 27-bit sequence.
This sequence sets RSA = RSB = 0; CP = 0.

Table 16 19-bit sequence

0001010111011100000

This sequence will program f

Table 17 18-bit sequence

000110111011100000

This sequence will program f

Table 18 27-bit sequence (f

000110100010100000011001010

= 750 MHz, BS1 = ON, N = 640, Icp=60µA, no test function)

osc

to 600 MHz in 50 kHz steps. ICP remains at 60 µA.

osc

to 600 MHz in 50 kHz steps. ICP remains at 60 µA.

osc

= 650 MHz, BS1 = ON)

osc

This sequence sets RSA to 0, RSB to 1 and CP to 1. After this sequence I
and N = 512 (18-bit transmission), RSB = 1.

Example of 3-wire bus sequence (TSA5521; SW = OPEN)
Table 19 19-bit sequence (f

0100011011010110000

N = 640 unless RSB has been programmed to 0 during a 27-bit sequence.

= 700 MHz, BS3 = ON)

osc

= 280 µA, N = 1024 (19-bit transmission)

CP

1996 Oct 10 17

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled

TV synthesizer

handbook, full pagewidth

2.2 nF
100 nF

22 kΩ

SCL

SDA

AS

CP SWITCH
V

SW
LOCK
SCL
SDA
CE
XTAL

tune

TSA552X

TSA5520; TSA5521

22 kΩ

27
kΩ

33 V
BS1
BS2
BS3
BS4LOCK

V

CC2

V

CC1

V

EE
RF

(1)

18 pF4 MHz

1 nF

MLC887

10 nF

HIGH

MID

LOW

12 V

(2)

RF

5 V

33
nF

V

tune

(1) Connection to ground is also allowed.
(2) Capacitor prevents parasitic oscillation on the V

handbook, full pagewidth

2.2 nF

22 kΩ

CLOCK

DATA

ENABLE

(1) Connection to ground is also allowed.
(2) Capacitor prevents parasitic oscillation on the V

line.

CC2

Fig.11 Typical I2C-bus application.

27

kΩ

100 nF

CP SWITCH
V

tune

SW
LOCK

TSA552X

SCL
SDA
CE
XTAL

line.

CC2

BS1
BS2
BS3
BS4LOCK

V

CC2

V

CC1

V

EE

RF

(1)

18 pF4 MHz

1 nF

MLC888

10 nF

22 kΩ

33 V

HIGH
MID
LOW
12 V

(2)

RF
5 V

33
nF

V

tune

Fig.12 Typical 3-wire bus application.

1996 Oct 10 18

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TV synthesizer

PACKAGE OUTLINES

SO16: plastic small outline package; 16 leads; body width 3.9 mm

D

c

y

Z

16

9

TSA5520; TSA5521

E

H

E

A

X

v M

SOT109-1

A

pin 1 index

1

e

0 2.5 5 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

UNIT

mm

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

A

max.

1.75

0.069

A1A2A

0.25

1.45

0.10

1.25

0.0098

0.057

0.0039

0.049

0.25

0.01

b

3

p

0.49

0.25

0.36

0.19

0.0098

0.019

0.0075

0.014

(1)E(1) (1)

cD

10.0

9.8

0.39

0.38

8

b

p

scale

eHELLpQZywv θ

4.0

1.27

3.8

0.16

0.050

0.15

w M

6.2

5.8

0.24

0.23

A

2

1.05

0.041

Q

A

1

detail X

1.0

0.7

0.4

0.6

0.028

0.039

0.020

0.016

(A )

L

p

L

0.25 0.1

0.25

0.01

0.01 0.004

A

3

θ

0.7

0.3

0.028

0.012

o

8

o

0

OUTLINE

VERSION

SOT109-1

IEC JEDEC EIAJ

076E07S MS-012AC

REFERENCES

1996 Oct 10 19

EUROPEAN

PROJECTION

ISSUE DATE

91-08-13
95-01-23

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TV synthesizer

SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm

16

D

c

y

Z

9

E

H

E

TSA5520; TSA5521

SOT369-1

A

X

v M

A

pin 1 index

18

w M

b

b

0.32

0.20

p

p

cD

0.25

5.30

0.13

5.10

0 2.5 5 mm

scale

(1)E(1)

eHELLpQZywv θ

4.5

0.65

4.3

e

DIMENSIONS (mm are the original dimensions)

mm

A

max.

1.5

0.15

0.00

1

A2A

1.4

1.2

3

0.25

UNIT A

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

Q

A

2

6.6

6.2

L

0.65

0.45

(A )

L

p

A

1

detail X

0.75

1.0

0.45

3

A

θ

0.130.2 0.1

0.48

0.18

(1)

o

10

o

0

OUTLINE
VERSION

SOT369-1

IEC JEDEC EIAJ

REFERENCES

1996 Oct 10 20

EUROPEAN

PROJECTION

ISSUE DATE

94-04-20
95-02-04

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TV synthesizer

SOLDERING SO or SSOP
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
cases reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

Reflow soldering

Reflow soldering techniques are suitable for all SO and
SSOP packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from 215 to
250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

Wave soldering

(order code 9398 652 90011).

TSA5520; TSA5521

SSOP
Wave soldering isnot recommended for SSOP packages.

This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

If wave soldering cannot be avoided, the following
conditions must be observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave)
soldering technique should be used.

• The longitudinal axis of the package footprint must

be parallel to the solder flow and must incorporate
solder thieves at the downstream end.

Even with these conditions, only consider wave
soldering SSOP packages that have a body width of

4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).

ETHOD (SO OR SSOP)

M
During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal

of corrosive residues in most applications.
SO
Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be

parallel to the solder flow.

• The package footprint must incorporate solder thieves at

the downstream end.

1996 Oct 10 21

Repairing soldered joints

Fix the component by first soldering two diagonally-

opposite end leads. Use only a low voltage soldering iron

(less than 24 V) applied to the flat part of the lead. Contact

time must be limited to 10 seconds at up to 300 °C. When

using a dedicated tool, all other leads can be soldered in

one operation within 2 to 5 seconds at 270 to 320 °C.

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled
TSA5520; TSA5521

TV synthesizer

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I

Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

2

C COMPONENTS

2

C components conveys a license under the Philips’ I2C patent to use the

1996 Oct 10 22

Philips Semiconductors Product specification

1.3 GHz universal bus-controlled

TV synthesizer

TSA5520; TSA5521

NOTES

1996 Oct 10 23

Philips Semiconductors – a worldwide company

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Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
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220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
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Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
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Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
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Worli, MUMBAI 400 018, Tel. [phone], Fax. [phone]

Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,

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Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,

20124 MILANO, Tel. [phone], Fax. [phone]
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Tel. [phone], Fax. [phone]
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. [phone], Fax. [phone]
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. [phone], Fax. [phone]
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
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Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

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Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
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Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1996 SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 537021/50/02/pp24 Date of release: 1996 Oct 10 Document order number: 9397 750 01353