Datasheet tsa5518m DATASHEETS (Philips)

Page 1
INTEGRATED CIRCUITS
DATA SH EET
TSA5518M
1.3 GHz bidirectional I controlled synthesizer
Product specification File under Integrated Circuits, IC02
2
1997 Mar 07
Page 2
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled synthesizer

FEATURES

• Complete 1.3 GHz single chip system
• Low power 5 V, 40 mA
• I2C-bus programming
• One pin crystal oscillator
• In-lock flag
• Varicap drive disable
• Low radiation
• Address selection for picture in picture (PIP), DBS tuner,
and so on
• 5-level A/D converter
• 7 bus-controlled ports (4 open-collector outputs and
3 emitter follower outputs), 1 bidirectional port
• Power-down flag
• Mixer/oscillator bandswitch output
• Available in SSOP20 package.

APPLICATIONS

• TV tuners and front-ends
• VCR tuners.
TSA5518M

GENERAL DESCRIPTION

The device is a single chip PLL frequency synthesizer designed for TV tuning systems. Control data is entered via the I the device, select the oscillator frequency, program the 7 output ports and set the charge-pump current. The output port P6 is combined with an A/D converter input. Digital information concerning this port can be read out of the SDA line (one status byte) during a READ operation. A flag is set when the loop is ‘in-lock’ and is read during a READ operation. The device has one fixed
2
I voltage on AS input. The phase comparator operates at
7.8125 kHz when a 4 MHz crystal in used. The device provides a bandswitch output to select the bands of the mixer/oscillator ICs TDA5330, TDA5630A except TDA5630/C1 and TDA5730 with the appropriate voltage level.
2
C-bus; five serial bytes are required to address
C-bus address, programmed by applying a specific

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V I
CC
f
i
V
CC
i(rms)
supply voltage 4.5 5 5.5 V supply current − 40 − mA frequency 80 − 1300 MHz input voltage level (RMS value) 80 to 150 MHz 12 − 300 mV
150 MHz to 1.0 GHz 9 − 300 mV
1 GHz to 1.3 GHz 40 − 300 mV f I
xtal o
crystal oscillator frequency 3.2 4 4.48 MHz output current emitter follower on P4, P5 and P7 −−5mA
open-collector P0, P1 and P2 −−20 mA
open-collector P6 −−10 mA T R
amb
th j-a
operating ambient temperature −10 − +80 °C thermal resistance from
−−120 K/W
junction to ambient

ORDERING INFORMATION

TYPE
NUMBER
NAME DESCRIPTION VERSION
PACKAGE
TSA5518M SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1
1997 Mar 07 2
Page 3
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled synthesizer

BLOCK DIAGRAM

output
PD
UD
1
20
PUMP
CHARGE
TO OP
LOGIC
OS
VCCGND
9
17
BS 5
BAND
SWITCH
TSA5518M
MGK115
PHASE
DIGITAL
COMPARATOR
DIV
f
15-BIT
DIVIDER
PROGRAMABLE
DIVIDE-BY-8
PRESCALER
8
7
ref
f
7.8125 kHz
N = 512
DIVIDER
4 MHz
OSCILLATOR 19
IN-LOCK
DETECTOR
15-BIT LATCH
DIVIDER RATIO
DETECTOR
POWER-DOWN
16
LATCH &
CONTROL DATA
C-BUS
2
I
TRANSCEIVER
15
8-BIT LATCH
PORT INFORMATION
T1
GATE
8-BIT A/D
CONVERTER
ADDRESS
SELECTION
handbook, full pagewidth
Fig.1 Block diagram.
1112 10 14 13 4 3 2
P0AS P1 P2 P6 P4 P5 P7
RF1
RF2
XTAL
input
1997 Mar 07 3
SCL
SDA
Page 4
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled synthesizer

PINNING

SYMBOL PIN DESCRIPTION
UD 1 drive output (UD) P7 2 P7 output port P5 3 P5 output port P4 4 P4 output port BS 5 bandswitch output for M/O drive n.c 6 not connected RF2 7 UHF/VHF signal input 2 RF1 8 UHF/VHF signal input 1 GND 9 ground P1 10 P1 output port (general purpose) P0 11 P0 output port (general purpose) AS 12 input for Address Selection P6 13 P6 port (output/input for general
purpose ADC)
P2 14 P2 output port (f
is active)
2
SDA 15 I SCL 16 I V
CC
17 voltage supply
C-bus serial data input/output
2
C-bus serial clock
n.c 18 not connected XTAL 19 crystal oscillator input PD 20 charge-pump output (PD)
if the test mode
DIV
handbook, halfpage
TSA5518M
1
UD PD
2
P7 XTAL
3
P5 n.c.
4
P4
BS
5
P1
TSA5518M
6 7 8 9
10
n.c. SDA RF2 RF1
GND
Fig.2 Pin configuration.
20 19 18 17 16 15 14 13 12 11
MBH947
V
CC
SCL
P2 P6 AS P0

FUNCTIONAL DESCRIPTION

The device is controlled via the two wire I2C-bus. For programming, there is one module address (7 bits) and the R/W bit for selecting READ or WRITE mode.

Write mode

The write data format is summarized in Table 1. After the address transmission (first byte), data bytes can be sent to the device. Four data bytes are needed to fully program the device. The bus transceiver has an auto increment facility which permits the programming of the device within one single transmission (address byte + 4 data bytes). The device can also be partially programmed on the condition that the first data byte following the address is byte 2 or 4. The meaning of the bits in the data bytes is given in Table 3. The first bit of the first data byte transmitted indicates whether frequency data (first bit = 0)
1997 Mar 07 4
or charge pump and port information (first bit = 1) will follow. Until an I
2
C-bus STOP condition is sent by the controller, additional data bytes can be entered without the need to re-address the device. This allows a smooth frequency sweep for fine tuning or AFC purpose. At power-on the ports are set to the high-impedance state (open-collector outputs) or at the HIGH level (emitter follower outputs). The bandswitch output BS provides a voltage output suitable for the band selection input of mixer/oscillator ICs TDA5330, TDA5630A and TDA5730. It is controlled by B1 and B0 bits or P7, P5 and P4 bits depending on the BSC bit (see Tables 1 to 4). The
7.8125 kHz reference frequency is obtained by dividing the output of the 4 MHz crystal oscillator by 512. Because the input of UHF/VHF signal is first divided-by-8 the step size is 62.5 kHz. A 3.2 MHz crystal can offer step size of 50 kHz.
Page 5
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled TSA5518M
synthesizer
Table 1 Write data format
BYTE DESCRIPTION
1 address 11000 MA1MA00 LOW from device 2 programmable divider 0 N14 N13 N12 N11 N10 N9 N8 LOW from device 3 programmable divider N7 N6 N5 N4 N3 N2 N1 N0 LOW from device 4 charge-pump, bandswitch and test bits 1 CP T1 T0 BSC B1 B0 OS LOW from device 5 output ports control bits P7 P6 P5 P4 X P2 P1 P0 LOW from device
Table 2 Explanation of Table 1
BIT DESCRIPTION
MA1, MA0 programmable address bits (see Table 7) N14, .. , N0 programmable divider bits
14
N = N14 × 2
CP charge pump current
CP=0to50µA; CP=1to220µA
T1, T0, OS T1 = 0, T0 = 0, OS = 0: normal operation
T1 = 1: P2 = f T0 = 1: 3-state charge pump OS = 1: operational amplifier output is switched off (varicap drive disable)
BSC bandswitch control bit
BSC = 0: bandswitch output is controlled by B1 and B0 bits according to Table 3
BSC = 1: bandswitch output is controlled by P7, P5 and P4 bits according to Table 4 B1, B0 bandswitch control bits P6, P2, P1 and P0 P6, P2 .. P0 = 1: open-collector outputs are active
P6, P2 .. P0 = 0: outputs are in high impedance state P4, P5 and P7 P4, P5 and P7 = 1: outputs are at low level
P4, P5 and P7 = 0: emitter follower outputs are active X don’t care
+ N13 × 213+...+ N1 × 21+N0
, P6 = f
DIV
MS
ref
B
LSB ACKNOWLEDGE
Table 3 BS output control (BSC = 0)
B1 B0 VOLTAGE ON PIN BS
0 0 0.25 V 01 2V 10 4V 11 V
1997 Mar 07 5
CC
Table 4 BS output control (BSC = 1)
P7 P5 P4 VOLTAGE ON PIN BS
1 1 0 0.25 V 101 2V 011 4V
Page 6
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled TSA5518M
synthesizer

Read mode

The read data format is summarised in Table 5. Data can be read out of the device by setting the R/W bit to logic 1. After the slave address has been recognized, the device generates an acknowledge pulse and the status word is transferred on the SDA line (MSB first). Data is valid on the SDA line during a HIGH of the SCL clock signal. A second data byte can be read out of the device if the processor generates an acknowledge on the SDA line. End of transmission will occur if no acknowledge from the processor occurs.The device will then release the data line to allow the processor to generate a STOP condition. When the port P6 is used as input, it must be programmed
Table 5 Read data format
BYTE DESCRIPTION MSB LSB ACKNOWLEDGE
1 address 11000MA1 2, .. status byte(s) POR
(2)
FL
(3)
000A2
in its high-impedance state. The POR flag (Power-on reset) is set to logic 1 when V
goes below 3 V and at
CC
power-on. It is reset when an end of data is detected by the device (end of a READ sequence). Control of the loop is made possible with the in-lock flag FL which indicates (FL = 1) when the loop is phase-locked. A built-in % level A/D converter is available on I/O port P6. This converter can be used to feed AFC information to the controller from the IF section of the television as illustrated in the typical application circuit in Fig.2. The relationship between bit A2, A1 and A0 and the input voltage on port P6 is given in Table 6.
(1)
(4)
MA0
A1
(4)
(1)
1 LOW from device
(4)
A0
note 5
Notes
1. See Table 7.
2. POR: Power-on reset flag. (POR = 1 on power-on).
3. FL: in lock flag (FL = 1 when the loop is phase-locked).
4. A2, A1, A0: digital outputs of the 5 level A/D converter (see Table 6). Accuracy is
1
⁄2LSB. MSB is transmitted first.
5. Upon an acknowledge pulse from the controller, the device transfers the status byte again. If no acknowledge pulse from the controller is received, data read is terminated.
Table 6 A/D converter levels Accuracy on the switching levels is ±0.02V
CC
.
VOLTAGE APPLIED ON PIN P6 A2 A1 A0
0.6V
0.45V
0.3V
0.15V
to 5.5 V 1 0 0
CC
to 0.6V
CC
to 0.45V
CC
to 0.3V
CC
0 to 0.15V
CC CC CC
CC
011 010 001 000

Address selection

The module address contains programmable address bits (MA1 and MA0) which offer the possibility of having several synthesizers (up to 3) in one system by applying a specific voltage on AS input. The relationship between MA1 and MA0 and the input voltage on AS input is given in Table 7.
Frequency lock flag (FL) definition
When the FL flag is logic 1, the maximum frequency
Table 7 Address selection
VOLTAGE APPLIED ON PIN AS MA1 MA0
0 to 0.1V
CC
00
always valid 0 1
0.4 to 0.6V
CC
to V
0.9V
CC
CC
10 11
deviation dF from stable frequency can be expressed as:
K
VCO
± I
df
K
= oscillator slope (Hz/V)
VCO
I
= charge pump current (A)
CP
K
=4×10
O
------------­K
O
×
6
CP
C1 C2+
×=
--------------------­C1 C2×
with:
C1, C2 = loop filter capacitors.
1997 Mar 07 6
Page 7
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled TSA5518M
synthesizer

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CC
V
i(XTAL)
V
i(SCL)
V
SDA
V
i(AS)
V
o(BS)
V
i(RF)
V
o
V
PD
V
UD
I
SDA
I
o
T
stg
T
j(max)
t
sc(GND)(max)
t
sc(VCC)(max)
supply voltage −0.3 +6 V voltage at pin XTAL −0.3 +V
CC
V voltage at pin SCL −0.3 +6 V voltage at pin SDA −0.3 +6 V voltage at pin AS −0.3 +V voltage at pin BS −0.3 +V voltage at pins RF1 and RF2 −0.3 +V output voltage at ports P0, P2
−0.3 +16 V
CC CC CC
V
V
V
and P6 output voltage at ports P4, P5
−0.3 +V
CC
V and P7
output voltage at pin PD −0.3 +V output voltage at pin UD −0.3 +V
CC CC
V
V output current at pin SDA open collector −1+5mA output current at pins P0, P1
−1 +20 mA
and P2 output current at pins P4, P5
emitter follower −1 +10 mA
and P7 output current at pin P6 open collector −1 +10 mA storage temperature −40 +150 °C maximum junction temperature − 150 °C maximum short circuit time to
GND maximum short circuit time to
V
CC
one pin to GND (VCC= 5.5 V;
− 10 s
GND = 0 V) one pin to VCC(VCC= 5.5 V; GND = 0 V) − 10 s

HANDLING

Every pin withstands the ESD test in accordance with MIL-STD-833C category B (2000 V). Every pin withstands the ESD test in accordance with Philips Semiconductor machine model 0 Ω, 200 pF.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th j-a
thermal resistance from junction to ambient in free air 120 K/W
1997 Mar 07 7
Page 8
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled TSA5518M
synthesizer

CHARACTERISTICS

V
= 4.5 to 5.5 V; T
CC
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Operating characteristics
V T f
CC
amb
i
supply voltage 4.5 − 5.5 V operating ambient temperature −10 − +80 °C
input frequency 80 − 1300 MHz N divider note 1 256 − 32767 I
CC
supply current 25 40 50 mA
Crystal oscillator
f
osc
Z
i(XTAL)
V
o(XTAL)
V
i(RF)
oscillator frequency 3.2 4 4.48 MHz
input impedance on pin XTAL −−−450 Ω
output drive level on pin XTAL − 40 − mV
input level see Fig.3 12 − 300 mV
flatness of the minimum sensitivity 150 − 1000 MHz
prescaler input impedance see Fig.4
= −10 to +80 °C; unless otherwise specified.
amb
= 80 to 150 MHz 9 − 300 mV
f
i
= 150 to 1000 MHz 40 − 300 mV
f
i
= 1000 to 1300 MHz −−10 mV
f
i
Output port P0, P1 and P2 (open collector); note 1 I
LO
I
o(sink)
V
OL
C
L(max)
output leakage current VPn= 13.5 V −−10 µA
output sink current note 2 −−20 mA
LOW-level output voltage IPn=15mA −−0.5 V
maximum capacitive loading on output
pin
Output ports P4, P5 and P7 (emitter follower)
V
OH
I
OH
HIGH-level output voltage I
HIGH-level output current − 35mA
Output port P6 (open collector)
I
LO
I
o(sink)
V
OL
C
L(max)
output leakage current VP6= 13.5 V − 110µA
output sink current note 2 −−10 mA
LOW-level output voltage IP6=5mA −−0.4 V
maximum capacitive loading on output
pin
Input port AS
I
IH
I
IL
HIGH-level input current V
HIGH-level input current V
Input port P6
I
IH
I
IL
HIGH-level input current V
LOW-level input current V
VPn= 5.5 V −−100 nF
=3mA VCC− 1 −−V
port
VP6= 5.5 V −−100 nF
ASH=VCC
=0V −10 −− µA
ASL
= 5.5 V −−10 µA
P6H
=0V −10 −−µA
P6L
−−10 µA
1997 Mar 07 8
Page 9
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled TSA5518M
synthesizer
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Bandswitch output BS
V
O(BSA)
V
O(BSB)
output voltage for band A I output voltage for band B I
source(BSA) source(BSB)
note 3
V
O(BSC)
output voltage for band C I
source(BSC)
note 3
2
C-bus inputs SCL, SDA; note 4
I
V
IH
V
IL
hys I
IH
I
IL
i
HIGH-level input voltage 3 − 5.5 V LOW-level input voltage −−1.5 V input hysteresis VCC=5V − 250 − mV HIGH-level input current VBH= 5.5 V; VCC=0V −−10 µA
V
BH
LOW-level input current VBL=0V; VCC=0V −10 −− µA
V
BL
Output SDA (open collector)
I
LO
V
O
output leakage current V output voltage I
SDAH=VCC
SDAL
Charge-pump output PD
I
OH(cp)
HIGH level output charge pump
CP = 1 140 220 300 µA
current
LOW level output charge pump
I
OL(cp)
CP = 0 25 50 75 µA
current
V
O
I
LZ
output voltage in-lock 1.5 − 2.5 V OFF-state leakage current T0 = 1 −5 − +5 nA
Operational amplifier output UD (test mode: T0 = 1)
V
o(off)
V
o(loop)
output voltage when switched-off OS = 1; IUD=1mA −−200 mV output voltage when the loop is closed OS = 0; T0 = 0 −−1.2 V
Notes
1. If the dividing number N is set to less than 256, a dividing number of 256 is used.
2. When a port is active, the collector voltage may not exceed 6 V.
3. Measured with all other ports active at max. current (10 mA or 20 mA respectively).
4. See
“The I2C-bus and how to use it”
, order no. 9398 393 40011.
=20µA − 0.25 0.5 V =20µA;
=20µA;
0.36 V
CC
0.7 V
CC
0.4 V
0.8 V
CC
CC
0.43 V
CC
0.9 V
CC
V
V
= 5.5 V; VCC= 5.5 V −−10 µA
=0V; VCC= 5.5 V −10 −−µA
−−10 µA
=3mA −−0.4 V
1997 Mar 07 9
Page 10
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled
synthesizer
3
10
handbook, halfpage
V
i(rms)
(mV)
2
10
guaranteed operating area
10
1
f (MHz)
TSA5518M
MGK117
15000 500 1000
Fig.3 I/O prescaler typical input sensitivity curve: VCC= 4.5 to 5.5 V; T
handbook, full pagewidth
= −10 to +80 °C.
amb
1
0.5
0.2
j
+
0
− j
0.2
0.2 0.5 1 2 5 10
1.3 GHz 1 GHz
0.5
1
2
100 MHz
500 MHz
2
5
10
∞
50 MHz
10
5
MGK118
Fig.4 Prescaler Smith-chart of typical input impedance: VCC= 5 V; reference value 50 Ω.
1997 Mar 07 10
Page 11
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled synthesizer

INTERNAL PIN CONFIGURATION

PIN CONFIGURATION
1 and 20
V
CC
DOWN
V
CC
UP
20
V
CC
1
PIN CONFIGURATION
7 and 8
V
7
V
8
CC
CC
to divider
10, 11, 13 and 14
10, 11, 13, 14
TSA5518M
V
CC
V
MGK121
V
CC
ref
2, 3 and 4
5
MGK127
V
CC
V
2, 3, 4
V
CC
CC
MGK119
V
CC
12
V
CC
12
15
5
15
MGK122
MGK120
V
CC
V
CC
MGK124
MGK123
1997 Mar 07 11
Page 12
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled synthesizer
PIN CONFIGURATION
16
V
CC
16
MGK125
PIN CONFIGURATION
19
V
CC
19
TSA5518M
V
CC
MGK126
1997 Mar 07 12
Page 13
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled synthesizer

APPLICATION INFORMATION

handbook, full pagewidth
33 V
HIGH
MID
LOW
BS
RF2 RF1
22 kΩ
filter dependent
BC847
4.7nF4.7nF4.7nF4.7
35 kΩ
1 nF 1 nF
nF
UD
P7 P5 P4
BS
n.c. RF2 RF1
GND
P1
22 kΩ
TSA5518M
10
201 192 183 174 165 156 147 138 129 11
15 nF
PD XTAL n.c.
V
CC SCL SDA P2 P8 P3 P0
100 nF
4 MHz
300 Ω 300 Ω
1 kΩ 1 kΩ
10 pF
4.7 nF
390 Ω
390 Ω 390 Ω
4.7 nF
TSA5518M
4.7 nF
4.7 nF
MGK116
5 V
SCL SDA P2 ADC AS P0
P1
V
tune
Fig.5 Typical application.
Loop filter Table 8 Loop filter
DESCRIPTION MIN. MAX. UNIT
Time span between actual
1024 1152 µs
phase lock and FL flag setting Time span between the loop
0 128 µs
losing lock and FL flag resetting
K
= 16 MHz/V (UHF band)
VCO
ICP= 220 µA C1 = 100 nF, C2 = 15 nF df = ±67.5 kHz
handbook, halfpage
C1
C2
R
MBH948
Fig.6 Loop filter.
1997 Mar 07 13
Page 14
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled synthesizer

PACKAGE OUTLINE

SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm
20
D
c
y
Z
11
E
H
TSA5518M

SOT266-1

A
X
v M
E
A
pin 1 index
110
w M
b
e
DIMENSIONS (mm are the original dimensions)
mm
A
max.
1.5
0.1501.4
1.2
A
0.25
b
3
p
0.32
0.20
2
UNIT A1A
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
p
cD
0.20
6.6
0.13
6.4
0 2.5 5 mm
scale
(1)E(1)
eHELLpQZywv θ
4.5
0.65 1.0 0.2
4.3
6.6
6.2
Q
A
2
A
1
detail X
0.65
0.75
0.45
0.45
(A )
L
p
L
A
3
θ
0.13 0.1
0.48
0.18
(1)
o
10
o
0
OUTLINE VERSION
SOT266-1
IEC JEDEC EIAJ
REFERENCES
1997 Mar 07 14
EUROPEAN
PROJECTION
ISSUE DATE
90-04-05 95-02-25
Page 15
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled synthesizer
SOLDERING Introduction
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used.
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our
“IC Package Databook”
Reflow soldering
Reflow soldering techniques are suitable for all SSOP packages.
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C.
Wave soldering
Wave soldering isnot recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices.
(order code 9398 652 90011).
TSA5518M
If wave soldering cannot be avoided, the following conditions must be observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering technique should be used.
• The longitudinal axis of the package footprint must
be parallel to the solder flow and must incorporate solder thieves at the downstream end.
Even with these conditions, only consider wave soldering SSOP packages that have a body width of
4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1).
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
1997 Mar 07 15
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Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled TSA5518M
synthesizer

DEFINITIONS

Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
PURCHASE OF PHILIPS I
Purchase of Philips I components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
2
C COMPONENTS
2
C components conveys a license under the Philips’ I2C patent to use the
1997 Mar 07 16
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Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled
synthesizer
NOTES
TSA5518M
1997 Mar 07 17
Page 18
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled
synthesizer
NOTES
TSA5518M
1997 Mar 07 18
Page 19
Philips Semiconductors Product specification
1.3 GHz bidirectional I2C-bus controlled
synthesizer
NOTES
TSA5518M
1997 Mar 07 19
Page 20
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© Philips Electronics N.V. 1997 SCA53 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
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Printed in The Netherlands 547047/1200/01/pp20 Date of release: 1997 Mar 07 Document order number: 9397 750 01612
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