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TL4810B, TL4810BI
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS006C – DECEMBER 1984 – REVISED MA Y 1993
D
Each Device Drives Ten Lines
D
60-V Output Voltage Rating
D
40-mA Output Source Current
D
High-Speed Serially-Shifted Data Input
D
CMOS-Compatible Inputs
D
Latches on All Driver Outputs
D
Improved Direct Replacement for
UCN4810A and TL4810A
description
The TL4810B and TL4810BI are monolithic
BIDFET† integrated circuits designed to drive a
dot matrix or segmented vacuum fluorescent
display (VFD). These devices feature a serial data
output to cascade additional devices for large
display arrays.
A 10-bit data word is serially loaded into the shift
register on the positive-going transitions of the
clock. Parallel data is transferred to the output
buffers through a 10-bit D-type latch while LA TCH
ENABLE is high and is latched when LATCH
ENABLE is low. When BLANKING is high, all
outputs are low.
Outputs are totem-pole structures formed by npn
emitter-follower and double-diffused MOS
(DMOS) transistors with output voltage ratings of
70 V and 40-mA source-current capability. All
inputs are compatible with CMOS and TTL levels,
but each requires the addition of a pullup resistor
to V
The TL4810B is characterized for operation from
0°C to 70°C. The TL4810BI is characterized for
operation from –40°C to 85°C.
when driven by TTL logic.
CC1
Q8
Q7
Q6
CLOCK
GND
VCC1
LATCH ENABLE (STROBE)
Q5
Q4
Q8
Q7
Q6
CLOCK
GND
NC
V
CC1
LATCH ENABLE (STROBE)
Q5
Q4
NC–No internal connection
N PACKAGE
(TOP VIEW)
18
1
17
2
16
3
15
4
14
5
13
6
12
7
11
8
10
9
DW PACKAGE
(TOP VIEW)
20
1
19
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
10
Q9
Q10
SERIAL DATA OUT
V
CC2
DATA IN
BLANKING
Q1
Q2
Q3
Q9
Q10
NC
SERIAL DATA OUT
V
CC2
DATA IN
BLANKING
Q1
Q2
Q3
†BIDFET – Bipolar, double-diffused, N-channel and P-channel MOS transistors on same chip. This is a patented process.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1993, Texas Instruments Incorporated
1
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TL4810B, TL4810BI
SHIFT REGISTERS
LATCHES
OUTPUTS
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS006C – DECEMBER 1984 – REVISED MA Y 1993
logic symbol
LATCH
ENABLE
BLANKING
CLOCK
DATA IN
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the N package.
†
7
C2
13
4
14
EN3
SRG10
C1/→
1D 2D 3
CMOS/VAC
FLUOR DISP
2D 3
2D 3
2D 3
2D 3
2D 3
2D 3
2D 3
2D 3
2D 3
12
11
10
9
8
3
2
1
18
17
16
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
SERIAL
DATA OUT
logic diagram (positive logic)
BLANKING
LATCH
ENABLE
DATA IN
CLOCK
Shift
Registers
1D
C1
1D
C1
1D
C1
1D
C1
R1
R2
R9
R10
Latches
C2
2D
C2
2D
C2
2D
C2
2D
LC1
LC2
LC9
LC10
Q1
Q2
6 Stages
(Q3 thru Q8)
Not Shown
Q9
Q10
SERIAL
DATA OUT
FUNCTION TABLE
CONTROL INPUTS
FUNCTION
Load
Latch
Blank
H = high level, L = low level, X = irrelevant, ↑ = low-to-high-level transition.
‡
Register R10 takes on the state of R9, R9 takes on the state of R8...R2 takes on the state of R1, and R1 takes on the state of the data input.
§
New data enter the latches while LATCH ENABLE is high. These data are stored while LATCH ENABLE is low .
CLOCK
No↑
LATCH
ENABLE
↑
X
X
X
X
X
X
L
H
X
X
BLANKING
X
X
X
X
H
L
R1 THRU R10
Load and shift
No change
As determined above
As determined above
‡
LC1 THRU LC10
‡
Determined by
LATCH ENABLE
Stored data
New data
Determined by
LATCH ENABLE
SERIAL
R10 Determined by BLANKING
§
R10 Determined by BLANKING
R10
§
Q1 THRU Q10
All L
LC1 thru LC10, respectively
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 3
typical operating sequence
CLOCK
TL4810B, TL4810BI
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS006C – DECEMBER 1984 – REVISED MA Y 1993
DATA IN
SR
Contents
LATCH
ENABLE
Latch
Contents
BLANKING
Q Outputs
Previously Stored Data New Data Valid
Valid Irrelevant
Invalid
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT TYPICAL OF ALL OUTPUTS
V
CC1
Valid
Valid
V
(serial outputs)
CC1
V
(Q outputs)
CC2
Input
GND
Output
100
kΩ
GND
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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TL4810B, TL4810BI
PARAMETER
UNIT
High-level input voltage, V
V
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS006C – DECEMBER 1984 – REVISED MA Y 1993
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Logic supply voltage, V
Driver supply voltage, V
(see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC1
70 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC20
Output voltage, VO 70 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI –0.3 V to V
CC1
+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
: TL4810B 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
TL4810BI –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NOTE 1: Voltage values are with respect to GND.
DISSIPATION RATING TABLE
PACKAGE
DW 1125 mW 9.0 mW/°C 720 mW 585 mW
N 1150 mW 9.2 mW/°C 736 mW 598 mW
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
recommended operating conditions
TL4810B TL4810BI
MIN MAX MIN MAX
Supply voltage, V
Supply voltage, V
Low-level input voltage, V
Continuous high-level output current, I
Operating free-air temperature, T
†
The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for logic voltages
only.
CC1
CC2
V
= 5 V 3.5 5.3 3.5 5.3
p
IH
IL
CC1
V
= 15 V 13.5 15.3 13.5 15.3
CC1
OH
A
4.75 15.75 4.75 15.75 V
5 60 5 60 V
†
–0.3
0.8 –0.3
–25 –25 mA
0 70 –40 85 °C
†
0.8 V
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 5
PARAMETER
TEST CONDITIONS
†
UNIT
High level
Low level
I
mA
,
I
Supply current from V
A
,
UNIT
tpdPropagation delay time, LATCH ENABLE to Q outputs
s
TL4810B, TL4810BI
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS006C – DECEMBER 1984 – REVISED MA Y 1993
electrical characteristics over recommended operating free-air temperature range,
= 5 V to 15 V, V
V
CC1
V
OH
V
OL
OL
I
O(off)
I
H
CC1
I
CC2
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
All typical values are at TA = 25°C, except for IO.
output
voltage
output
voltage
Low-level Q output current
(pulldown current)
Off-state output current
High-level input current VI = V
pp
Supply current from V
Q outputs IOH = –25 mA 57.5 58 57.5 58
SERIAL
DATA OUT
Q outputs IOL = 1 µA, BLANKING at V
SERIAL
DATA OUT
= 60 V, GND = 0 (unless otherwise noted)
CC2
TL4810B TL4810BI
MIN TYP‡MAX MIN TYP‡MAX
V
= 5 V, IOH = –100 µA 4 4.5 4 4.5
CC1
V
= 15 V, IOH = –100 µA 14 14.7 14 14.7
CC1
CC1
V
= 5 V, IOL = 100 µA 0.05 0.1 0.05 0.1
CC1
V
= 15 V, IOL = 100 µA 0.02 0.1 0.02 0.1
CC1
VO = 60 V,
TA = MIN to 70°C
VO = 60 V,
TA = 85°C
VO = 0,
TA = MAX
CC1
All inputs at 0 V,
One Q output high
CC1
All inputs at 0 V,
All outputs low
All outputs low 0.5 1 0.5 1
All outputs high,
CC2
All outputs high, TA = –40°C 5
BLANKING at V
BLANKING at V
BLANKING at V
V
= 5 V 10 50 10 50
CC1
V
= 15 V 10 100 10 100
CC1
V
= 5 V 10 50 10 50
CC1
V
= 15 V 10 100 10 100
CC1
TA = 0°C to MAX 2.7 4 2.7 4
CC1
CC1
CC1
,
,
,
0.5 1 0.5 1
2.5 3.7 2.5 3.7
–1 –15 –1 –15 µA
30 50 30 50 µA
2
V
V
µ
mA
timing requirements over recommended operating free-air temperature range
V
= 5 V V
CC1
MIN MAX MIN MAX
t
w(CKH)
t
w(LEH)
t
su(D)
t
h(D)
t
d(CKH-LEH)
Pulse duration, CLOCK high 250 50 ns
Pulse duration, LATCH ENABLE high 250 50 ns
Setup time, DA TA IN before CLOCK↑
Hold time, DATA IN after CLOCK↑
Delay time, CLOCK↑ to LATCH ENABLE high
125 25 ns
125 25 ns
125 25 ns
switching characteristics, VBB = 60 V, TA = 25°C
PARAMETER
p
p
TEST
CONDITIONS
V
= 5 V 1
CC1
V
= 15 V 0.5
CC1
MIN TYP MAX UNIT
CC1
= 15 V
µ
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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TL4810B, TL4810BI
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS006C – DECEMBER 1984 – REVISED MA Y 1993
PARAMETER MEASUREMENT INFORMATION
t
w(CKH)
CLOCK
Data
t
su(D)
50% 50%
Valid50% 50%
t
h(D)
V
V
IH
IL
V
IH
V
IL
CLOCK
t
d(CKH-LEH)
LATCH
ENABLE
50%
Output
Last
Pulse
50%
t
90%
pd
Valid
t
w(LEH)
50%
V
IH
V
IL
V
IH
V
IL
DW PACKAGE DUTY CYCLE
FREE-AIR TEMPERATURE
100
90
80
70
60
V
= 15 V
Maximum Duty Cycle – %
CC1
V
= 60 V
CC2
IOH = –25 mA
IOL = 1 µA
50
N = Number of Outputs High
All Other Outputs Low
40
25
35 45 55 65 75 85 95
TA – Free-Air Temperature – °C
Figure 1. Input Timing
THERMAL INFORMATION
vs
N = 1 to 6
N = 7
N = 8
N = 9
N = 10
Figure 3
100
Figure 2. Output Switching Times
N PACKAGE DUTY CYCLE
FREE-AIR TEMPERATURE
100
90
80
70
60
V
= 15 V
Maximum Duty Cycle – %
CC1
V
= 60 V
CC2
IOH = –25 mA
50
IOL = 1 µA
N = Number of Outputs High
All Other Outputs Low
40
25
TA – Free-Air Temperature – °C
vs
Figure 4
N = 1 to 4
N = 5
N = 6
N = 7
N = 8
N = 9
N = 10
95857565554535
100
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 7
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
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Copyright 1998, Texas Instruments Incorporated
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