14.1Introduction to soldering surface mount
packages
14.2Reflow soldering
14.3Wave soldering
14.4Manual soldering
14.5Suitability of surface mount IC packages for
wave and reflow soldering methods
15DATA SHEET STATUS
16DEFINITIONS
17DISCLAIMERS
18PURCHASE OF PHILIPS I2C COMPONENTS
2000 May 082
Page 3
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
1FEATURES
1.1General
• I2C-bus compatible
• Digital alignment/adjustment via I2C-bus:
– FM noise blanker sensitivity
– FM stereo noise canceller
– FM High Cut Control (HCC)
– FM stereo separation.
• FM audio processing hold for RDS updating; holds the
detectors for the FM weak signal processing in their
present state
• FM bandwidth limiting; limits the bandwidth of the FM
audio signal with external capacitors
• AM stereo input; AM stereo audio can be fed in at the
pins for the de-emphasis capacitors; this will provide
8 dB of gain to the AM audio.
1.2Stereo decoder and noise blanking
• FM stereo decoder
• Accepts FM multiplex signal and AM audio at input
• Pilot detector and pilot canceller
• De-emphasis selectable between 75 and 50 µs
• AM noise blanker: impulse noise detectorand an audio
hold.
1.3Weak signal processing
TEA6880H
• Volume 1 control from +20 to −56 dB in 1 dB steps;
programmable 20 dB loudness control included
• Volume 2 control from 0 to −56 dB in 1 dB steps, −56,
−58.5, −62, −68 dB and mute
• Programmable loudness control with bass boost as well
as bass and treble boost
• Treble control from −14 to +14 dB in 2 dB steps
• Bass control from −18 to +18 dB in 2 dB steps with
selectable characteristic
• Analog Step Interpolation (ASI) minimizes pops by
smoothing out the transitions in the audio signal when a
switch is made
• Audio Blend Control (ABC) minimizes pops by
automatically incrementing the volume and loudness
controls through each step between their present
settings and the new settings
• Rear Seat Audio (RSA) can select different sources for
the front and rear speakers
• Chime input: can be sent to any audio output, at any
volume level
• Chime adder circuit: chime input can also be summed
with left front and/or right front audio, or be turned off.
• FM weak signal processing: six signal condition
detectors, soft mute, stereo noise canceller (blend), and
High Cut Control (roll-off).
1.4Audio pre-amplifier
• Source selector for 6 sources: 2 stereo inputs external
(A and B),1 symmetrical stereoinput(C),1 symmetrical
mono input (D), 1 internal stereo input (AM or FM), and
1 chime/diagnostic mono input
The TEA6880H is a monolithic bipolar integrated circuit
providing the stereo decoder function and ignition noise
blanking facility combined with source selector and
tone/volume control for AM/FM car radio applications. The
device operates with a power supply voltage range of
7.8 to 9.2 V and a typical current consumption of 40 mA.
LF, LR, RF and RR
voltage gain1 dB steps−112−+20dB
step resolution (volume)−1−dB
bass control−18−+18dB
treble control−14−+14dB
step resolution (bass and treble)−2−dB
= 2.0 V; Gv= 0 dB;
o
−107−dB
unweighted
= 1.0 V; Gv=0dB −0.01−%
o(rms)
ripple rejectionV
r(rms)
< 200 mV;
−70−dB
f = 100 Hz; Gv=0dB
4853−dB
differential stereo input
2000 May 084
Page 5
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
5BLOCK DIAGRAM
handbook, full pagewidth
33 nF
AM
mono
input
AMNBIN
MPXRDS
220 nF
MPX
input
220 kΩ
220 nF
10 nF
RIN 182 kΩ
82 kΩ100 kΩ
33 pF
3.3 nF
3.3 nF
2.7 nF
2.7 nF
4.7 nF
4.7 nF
10 µF
10 nF
(AFSAMPLE)
120 kHz
HIGH-PASS
AMPLIFIER
PULSE
SEPARATOR
60 kHz
HIGH-PASS
&
USN
DETECTOR
INPUT BUFFER
&
80 kHz
LOW-PASS
sep.adj.
mute slope
mute start
21
C-bus
from AM/FM
level detector
from
NICE
AGC
3
audio
processing hold
(for RDS update)
515049 48 47
52
53
54
55
sensitivity
56
57
58
59
60
61
62
63
64
bus controls
2
I
to NICE
(75.4 kHz)
100 nF
470 kΩ
DECODER
CONVERTER
SOFT-MUTE
FM BUFFER
FM NB-GATES
DE-EMPHASIS
AM STEREO INPUT
I2C-BUS
&
CONTROL LOGIC
4
2
I
C-bus
f
ref
10 nF
68 kΩ
100 nF
trigger sensitivity
NOISE
&
INTERFERENCE
DETECTOR
STEREO
PLL
V/I
MATRIX
&
&
50/75 µs
&
5
pilot
ind.
19 kHz
38 kHz
de-emphasis
switch
detector hold
detector reset
test
67
22 kΩ
22 kΩ
V
2
DD(I
C-bus)
38 kHz
start/
slope
SNC
HCC
STEREO
DECODER
OUTPUT
FM
PULSE
FORMER
TEA6880H
start/
slope
LEVEL
ADC
(6-BIT)
LEVEL
INPUT
BUFFER
BUS
sensitivity
20 kHz
BAND-PASS
AMWB
DETECTOR
TEA6880H
test
100
kΩ
44
detector
hold
detector
reset
detector
hold
MHB427
22
nF
43
A
B
C
D
E
F
G
H
6.8 nF
46
&
45
10 nF
6.8 nF
AM
GATE
AVERAGE
DETECTOR
(MUTE/HCC)
PEAK
DETECTOR
(SNC)
PEAK
DETECTOR
(WBAM2)
PEAK
DETECTOR
(USN2)
AVERAGE
DETECTOR
(WBAM1)
AVERAGE
DETECTOR
(USN1)
100
nF
Fig.1 Block diagram (continued in Fig.2).
2000 May 085
Page 6
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
handbook, full pagewidth
100 nF
3.3
kΩ
10
220
nF
nF
40
3938
BUS
BUS
BUS
10
68
nF
220
nF
CHIME ADDER
(G = −20 dB)
VOLUME 2
VOLUME 1
LOUDNESS
11
43 kΩ
4.7 kΩ
left front
output
&
SWITCH
LEFT
FRONT
LEFT
BASS
BAND
LEFT
TREBLE
BAND
LEFT
LEFT
BUS
680 pF
37
BUS
C
KVL
220 nF
AM noise
blanker flag
330
pF
42 41
A
B
AM
PULSE
FORMER
PEAK
TO
AVERAGE
DETECTOR
C
WBAM
INTERNAL
POWER
SUPPLY
V
CC
(+8.5 V)
ADC
(3-BIT)
BUS
USN
ADC
(3-BIT)
BUS
8
9
input
diagnostic
&
chime
D
E
F
G
H
left rear
output
BUS
BUS
VOLUME 2
LEFT
REAR
ASI
ABC
13
TEA6880H
15 nF
36
3534
BUS
REAR
SEAT
AUDIO
SWITCH
ANALOG STEP
INTERPOLATION
(ASI)
AUDIO
BLEND CONTROL
(ABC)
ASI/ABC
control
BUS
SOURCE SELECTOR
REAR SEAT AUDIO SELECTOR
1517
1412
220nF
address
B
select
right
TEA6880H
CHIME ADDER
RIGHT
BASS
BAND
RIGHT
TREBLE
BAND
VOLUME 1
RIGHT
LOUDNESS
RIGHT
BUS
1819
1 µF
C
right
common
right front
output
33
(G = −20 dB)
&
SWITCH
BUS
VOLUME 2
RIGHT
FRONT
1 µF
C
BUS
BUS
BUS
32
31
30
29
28
27
26
25
24
23
22
21
20
MHB428
220 nF
220 nF
10 nF
68 nF
C
KVR
100 nF
C
VHS
47 µF
3.3 kΩ
4.7 kΩ
43 kΩ
680 nF
220 nF
C
KIL
220 nF
C
KIR
220 nF
100 nF
100 nF
1 µF
A left
A right
D input
mono
symmetric
C left
right rear
output
BUS
BUS
VOLUME 2
RIGHT
REAR
ASI
ABC
&
16
C
ELFI
220
nF
22 µF
B
left
Fig.2 Block diagram (continued from Fig.1).
2000 May 086
Page 7
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
6PINNING
SYMBOLPINDESCRIPTION
SDAQ1data output (to TEA6840H)
SCLQ2clock output (to TEA6840H)
LEVEL3FM and AM level input (from TEA6840H)
SCL4I
SDA5I
DGND6digital ground
TBL7time constant for FM modulation detector
V
CC
CHIME9chime tone input
AGND10analog ground
LLN11loudness left network
LOPI12left option port input (terminal impedance typical 100 kΩ)
LOPO13left option port output
BRI14channel B right stereo input (terminal impedance typical 100 kΩ)
ADR15address select
BLI16channel B left stereo input (terminal impedance typical 100 kΩ)
SCAP17supply filter capacitor
CRIP18channel C right symmetrical input (terminal impedance typical 30 kΩ)
CCOM19channel C common input (terminal impedance typical 30 kΩ)
CLIP20channel C left symmetrical input (terminal impedance typical 30 kΩ)
MONOC21mono common input (terminal impedance typical 30 kΩ)
MONOP22mono symmetrical input (terminal impedance typical 30 kΩ)
VHS23half supply filter capacitor
ARI24channel A right stereo input (terminal impedance typical 100 kΩ)
AMNCAP25peak-to-average detector capacitor for AM noise blanker
ALI26channel A left stereo input (terminal impedance typical 100 kΩ)
ROPO27right option port output
ROPI28right option port input (terminal impedance typical 100 kΩ)
RLN29loudness right network
RTC30right treble capacitor
RBI31right bass network input
RBO32right bass network output
RF33right front output
RR34right rear output
ASICAP35analog step interpolate capacitor
LR36left rear output
LF37left front output
LBO38left bass network output
LBI39left bass network input
LTC40left treble capacitor
8supply voltage
2
C-bus clock
2
C-bus data
2000 May 087
Page 8
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
SYMBOLPINDESCRIPTION
AMPCAP41AM blanking time capacitor
AMHOLD42AM noise blanker flag
AMHCAP43AM noise blanker hold capacitor
I
ref
TWBAM245time constant for AM wideband peak detector
TUSN246time constant for ultrasonic noise peak detector
PHASE47phase detector
f
ref
PILOT49pilot on/off output
AFSAMPLE50reset for multipath detector (from TEA6840H for RDS update)
FMHOLD51FM audio processing hold input (from TEA6840H for RDS update)
AMHIN52AM signal input (from TEA6840H)
AMNBIN53AM noise blanker input (from TEA6840H)
TMUTE54time constant for soft mute
MPXRDS55unmuted MPX input (from TEA6840H for RDS update)
TSNC56time constant for stereo noise canceller
MPXIN57MPX input (from TEA6840H)
FMNCAP58FM noise detector capacitor
DEEML59left de-emphasis capacitor
DEEMR60right de-emphasis capacitor
FMLBUF61left AM/FM audio buffer capacitor
FMRBUF62right AM/FM audio buffer capacitor
TWBAM163time constant for AM wideband average detector
TUSN164time constant for ultrasonic noise average detector
44temperature independent reference current
48frequency reference input (75.4 kHz from TEA6840H)
2000 May 088
Page 9
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
handbook, full pagewidth
TUSN1
TWBAM1
FMRBUF
64
63
62
1
SDAQ
2
SCLQ
3
LEVEL
4
SCL
SDA
5
6
DGND
7
TBL
V
8
CC
CHIME
9
10
AGND
LLN
11
12
LOPI
13
LOPO
BRI
14
15
ADR
BLI
16
17
SCAP
18
CRIP
19
CCOM
FMLBUF
DEEMR
61
60
DEEML
FMNCAP
59
58
TEA6880H
MPXIN
57
TSNC
56
MPXRDS
TMUTE
55
54
AMNBIN
AMHIN
53
52
51
FMHOLD
50
AFSAMPLE
49
PILOT
f
48
ref
PHASE
47
TUSN2
46
45
TWBAM2
I
44
ref
AMHCAP
43
AMHOLD
42
AMPCAP
41
LTC
40
LBI
39
LBO
38
LF
37
LR
36
ASICAP
35
RR
34
33
RF
TEA6880H
20
21
22
23
24
25
ARI
CLIP
MONOC
VHS
MONOP
AMNCAP
Fig.3 Pin configuration.
2000 May 089
26
ALI
27
ROPO
28
ROPI
29
RLN
30
RTC
31
RBI
32
RBO
MHB408
Page 10
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
7FUNCTIONAL DESCRIPTION
7.1Stereo decoder
The MPX input is the null-node of an operational amplifier
with internal feedback resistor. Adapting the stereo
decoder input to the level of the MPX signal, coming from
the FM demodulator output, is realized by the value of the
input series resistor RIN. To this input a second source
(AM detector output) can be fed by current addition.
The input amplifier is followed by an integrated 4th order
Bessel low-pass filter with a cut-off frequency of 80 kHz.
It provides necessary signal delay for FM noise blanking
and damping of high frequency interferences coming to
the stereo decoder input.
Output of this filter is fed to the soft mute control circuitry,
the output is voltage to current converted and then fed to
phase detector, pilot detector and pilot canceller circuits,
contained in the stereo decoder PLL block. For
regeneration of the 38 kHz subcarrier, a PLL is used.
The fully integrated oscillator is adjusted by means of a
digitalauxiliaryPLLintothecapture range of the main PLL.
The auxiliary PLL needs an external reference frequency
(75.4 kHz) which is provided by the TEA6840H.
The required 19 and 38 kHz signals are generated by
division of the oscillator output signal in a logical circuitry.
The 19 kHz quadrature phase signal is fed to the 19 kHz
phase detector, where it is compared with the incoming
pilot tone. The DC output signal of the phase detector
controls the oscillator (PLL).
The pilot presence detector is driven by an internally
generated in-phase 19 kHz signal. Its pilot dependent DC
output voltage is fed to a threshold switch, which activates
thepilotindicatorbitandturnsthestereodecoderto stereo
operation. The same DC voltage is used to control the
amplitude of an anti-phase internally generated 19 kHz
signal. In the pilot canceller, the pilot tone is compensated
by this anti-phase 19 kHz signal.
The pilot cancelled signal is fed to the matrix. There, the
side signal is demodulated and combined with the main
signal to left and right audio channel. Compensation for
roll-off in the incoming MPX signal caused by IF filters and
FM demodulator is typically realized by an external
compensation network at pin 57, individual alignment is
achieved by I2C-bus controlled amplification of the side
signal (DAA). A smooth mono to stereo takeover is
achieved by controlling the efficiency of the matrix with
help of the SNC peak detector.
TEA6880H
The matrix is followed by the FM noise suppression gates,
which are combined with FM single poles and High Cut
Control (HCC). The single pole is defined by internal
resistors and external capacitors. From the gate circuits
audio is fed to the switchable de-emphasis, where the
demodulated AM stereo signal can be fed in. After
de-emphasis the signal passes to the output buffers and is
fed to the radio input of the source selector. For HCC, the
time constant of the single pole contained in the output
buffer can be changed to higher values. This function is
controlled by an average detector contained in the
multipath and fading detector.
7.2FM noise blanker
The input of the ignition noise blanker is coupled to the
MPXRDS (pin 55) input signal and to the IF level input
(pin 3). Both signals are fed via separate 120 kHz filters
and rectifiers to an adder circuit. The output signal of the
adder circuit is fed in parallel to the noise detector and the
interference detector. The noise detector is a negative
peak detector. Its output controls the trigger sensitivity
(prevention to false triggering at noisy input signals) and
the gain of the MPX high-pass filter. The output of the
interferencedetector,whenreceivingasteeppulse,firesa
monoflop, contained in the pulse former circuitry. The time
constantofthemonoflopis defined by aninternalcapacitor
and its output activates the blanking gates in the audio.
7.3AM noise blanker
The AM noise blanking pulse is derived from the AM audio
signal which is fed into pin 53 with the help of a
peak-to-averagecomparator. The blanking time is set by a
pulse former with external capacitor. The blanking pulse is
fed to the gate in the AM audio path and out to pin
AMHOLD to operate the gate built into the external
AM stereo processor.
7.4Multipath/fading detection and weak signal
control
For FM signal quality dependent controls there is built-in a
combinationofsixdetectorsdrivenbythelevelinformation
direct, by the AC components on the level via a 20 kHz
band-pass filter (AM wideband) or the high notes present
at the FM demodulator output via a 60 kHz high-pass filter
(ultrasonic noise). The relation between DC level and the
AC components is programmable by the I2C-bus (2 bits
each). Output of level buffer, AM wideband detector and
ultrasonic noise detector are analog-to-digital converted
and readable by the I2C-bus.
2000 May 0810
Page 11
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
For the time of fast RDS updating soft mute, SNC and
HCC can be put on hold and the AM wideband peak
detector and the ultrasonic noise peak detector are put on
reset by a switch signal delivered from the TEA6840H via
pin 51 (FMHOLD).
The six separate detecting circuits are:
1. The AM wideband noise peak detector is driven from
a 20 kHz band-pass filter connected to the level buffer
output. The time constant is defined by an external
capacitor at pin 45 (TWBAM2). The output voltage of
the detector is analog-to-digital converted by 3-bit.
2. The AM wideband noise average detector is driven
from a 20 kHz band-pass filter connected to the level
buffer output. The time constant is defined by an
external capacitor at pin 63 (TWBAM1). The output of
the detector is connected to the Stereo Noise Control
(SNC) circuit.
3. The ultrasonic noise peak detector is driven from a
60 kHz high-pass filter connected to the MPX signal
from pin 55 (MPXRDS). The time constant is defined
byanexternalcapacitorat pin 46 (TUSN2). Theoutput
voltage of the detector is analog-to-digital converted
by 3-bit.
4. The ultrasonic noise average detector is driven from a
60 kHz high-pass filter connected to the MPX signal
from pin 55 (MPXRDS). The time constant is defined
byanexternalcapacitorat pin 64 (TUSN1). Theoutput
of the detector is connected to soft mute control and
stereo noise control circuits.
5. For soft mute and high cut control purposes an
average detector with externally defined time constant
(TMUTE, pin 54) is provided. The detector is driven by
level output only. Soft mute as well as high cut control
can be switched off by the I2C-bus.
6. The stereo noise control peak detector with externally
defined time constant (TSNC, pin 56) is driven by
DC level output, AM wideband and ultrasonic noise
outputs. It provides the stereo blend facility (SNC).
Startingpoint and slope of stereo blend can be chosen
by the I2C-bus controlled reference voltage.
TEA6880H
7.5Tone/volume control
The tone/volume control part consists of the following
functions:
• Source selector
• Loudness
• Volume 1
• Treble
• Bass
• Volume 2
• Rear Seat Audio (RSA) selector
• Chime adder
• Analog step interpolation
• Audio blend control.
The stages loudness, volume 1, bass, and volume 2
include the Analog Step Interpolation (ASI) function. This
minimizes pops by smoothing out the transitions in the
audio signal during switching. The transition time is
I2C-bus programmable in a range of 1 : 24 in four steps.
The stages loudness, volume 1, and volume 2 also have
the Audio Blend Control (ABC) function. This minimizes
pops by automatically incrementing the volume and
loudnesscontrolsthrougheachstep between theirpresent
settings and the new settings. The speed of the ABC
function is correlated with the transition time of the ASI
function.
All stages are controlled via the I2C-bus.
2000 May 0811
Page 12
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
7.5.1SOURCE SELECTOR
The source selector allows the selection between
6 sources:
• 2 external stereo inputs (ALI, ARI, BLI and BRI)
• 1 external symmetrical stereo input (CLIP, CRIP and
CCOM)
• 1 external symmetrical mono input (MONOP and
MONON)
• 1 internal stereo input (AM/FM)
• 1 chime/diagnostic mono input (CHIME).
Via the chime/diagnostic mono input a chime input signal
can be sent to any audio output, at any volume level.
7.5.2LOUDNESS
The output of the source selector is fed into the loudness
circuit via the external capacitors C
LOPI) and C
the external circuits for the left and the right channel only a
bass boost or bass and treble boost is available. With the
external circuits shown in Figs 13 and 15 the curves from
Figs 14 and 16 will be obtained (without influence of C
respectively C
7.5.3VOLUME 1
The volume 1 control follows behind the loudness circuit.
The control range of volume 1 is between +20 and −36 dB
in steps of 1 dB.
7.5.4TREBLE
The output signal of the volume 1 control is fed into the
treble control stage. The control range is between
+14 and −14 dB in steps of 2 dB. Fig.20 shows the control
characteristic with external capacitors of 10 nF.
(pins ROPO and ROPI). Depending on
KVR
).
KVR
(pins LOPO and
KVL
KVL
TEA6880H
7.5.5BASS
Thebasscontrolisthenext stage. The characteristic of the
bass curves depends upon the external circuits at
pins LBO/LBI (left channel) and RBO/RBI (right channel)
and also upon the setting of BSYM bit (MSB of the bass
control byte). With BSYM = 1, an equalizer characteristic
and with BSYM = 0, a shelving characteristic is obtained.
Figures 17 and 18 show the bass curves with an external
circuit of 2 × 220 nF and R = 3.3 kΩ for each channel with
different values for BSYM. Figure 19 shows the bass
curves with an external capacitor of 47 nF for each
channel and BSYM = 0, for boost and cut.
7.5.6VOLUME 2
The four volume 2 blocks are located at the end of the
tone/volume control. In addition to volume control (same
settings as volume 2) also the balance and fader functions
are performed by individual attenuation offsets for the four
attenuators. The control range of these attenuators is
56 dB in steps of 1 dB and additional the steps −58.5 dB,
−62 dB, −68 dB, and a mute step.
7.5.7RSA SELECTOR
The RSA selector provides the possibility to select an
alternative source for the rear channels. In this event rear
channels are only controlled by volume 2 function.
7.5.8CHIME ADDER
With the chime adder circuit the chime input signal can be
summed with the left front and/or right front audio, or be
turned off.
2000 May 0812
Page 13
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
8LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
CC
V
i
P
tot
T
stg
T
amb
V
es
Notes
1. Machine model (R = 0 Ω, C = 200 pF).
2. Human body model (R = 1.5 kΩ, C = 100 pF).
9THERMAL CHARACTERISTICS
supply voltage−0.3+10V
voltage at pins (except pins 4 and 5)VCC≤ 10 VVSS− 0.3 V
voltage at pins 4 and 5V
− 0.3 9.7V
SS
CC
total power dissipation−480mW
storage temperature−65+150°C
operating ambient temperature−40+85°C
electrostatic handling for all pinsnote 1−200+200V
note 2−2000+2000V
V
SYMBOLPARAMETERCONDITIONSVALUEUNIT
R
th(j-a)
thermal resistance from junction to ambient in free air48K/W
2000 May 0813
Page 14
2000 May 0814
10 CHARACTERISTICS
FM part: input signal V
i(MPX)(p-p)
= 1.89 V; m = 100% (∆f=±75 kHz, f
= 400 Hz); de-emphasis of 75 µs and series resistor at input RIN= 182 kΩ;
mod
FM audio measurements are taken at pins 13 and 27.
Tone part: R
= 600 Ω; RL=10kΩ, AC-coupled; CL= 2.5 nF; CLK = square-wave (5 to 0 V) at 100 kHz; stereo source = A channel input; volume 1
S
attenuator = 0 dB; loudness=0dB, off; volume 2 attenuators = 0 dB; bass linear; treble linear; input voltage = 1 V, f = 1 kHz. Tone part audio
measurements are taken at pins 33 and 37. V
= 8.3 to 8.7 V; VSS= 0; T
CC
=25°C; unless otherwise specified.
amb
This IC shall not radiate noise in the audio system such that it disturbs any other circuit. This IC shall also not be susceptible to the radiation of any
other circuit.
MPX input signal (peak-to-peak value)Ri= 182 kΩ−1.89−V
overdrive margin of MPX input signalTHD = 1%6−−dB
AF input current−3.66−µA
maximum AF input currentTHD = 1%7.32−−µA
AF mono output signal (RMS value)91% modulation without pilot89010001110mV
AF mono channel balancewithout pilot; V13/V
27
−1−+1dB
channel separationaligned setting of data byte 1, bit 0 to bit 3;
m = 30% modulation plus 9% pilot
L=1; R=0404770dB
L=0; R=1404770dB
THDtotal harmonic distortionV
i(MPX)(p-p)
V
i(MPX)(p-p)
= 1.89 V; f
= 1.89 V; f
= 1 kHz without pilot−0.10.3%
mod
= 5 kHz
mod
L=1; R=0−0.10.3%
L=0; R=1−0.10.3%
S/Nsignal-to-noise ratiof = 20 Hz to 15 kHz7578−dB
α
19
α
38
α
57
α
76
pilot signal suppressionf = 19 kHz4050−dB
subcarrier suppressionf = 38 kHz3550−dB
f = 57 kHz40−−dB
f = 76 kHz5060−dB
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
TEA6880H
Page 15
2000 May 0815
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
IM2second order intermodulation for f
IM3third order intermodulation for f
α
57(RDS)
α
67
traffic radio (RDS)f = 57 kHz; note 2−70−dB
Subsidiary Communication Authorization
stereo input impedance (A and B input)80100120kΩ
symmetrical input impedance
243036kΩ
(C and mono input)
CHIME input impedance (chime input)80100120kΩ
output impedance at ROPO and LOPO−80100Ω
output load resistance at ROPO and LOPO10−−kΩ
output load capacitance at ROPO and LOPO0−2500pF
source selector voltage gain−0.20+0.2dB
input isolation of one selected source to any
other input
f = 1 kHz90105−dB
f = 12.5 kHz8095−dB
f=20Hzto20kHz7590−dB
maximum input voltage (RMS value)THD < 0.5%; VCC= 8.5 V2.02.15−V
THD < 0.5%; V
= 7.8 V1.81.9−V
CC
input impedance at ROPI and LOPI80100120kΩ
loudness control, maximum gainf = 1 kHz; loudness on/off−0.20+0.2dB
loudness control, minimum gainf = 1 kHz; loudness on/off−18.5−20−21.5dB
gain, loudness on referred to loudness offf = 1 kHz; G
loudness
= −20 dB−1.50+1.5dB
step resolution gainf=1kHz−1−dB
step error between any adjoining stepf=1kHz−−0.5dB
maximum loudness boost; without influence of
coupling capacitors
compared to 1 kHz; loudness on
f = 30 Hz1718.519dB
f=10kHz456dB
compared to 1 kHz; loudness off
f=30Hz−1−0dB
f=10kHz−1−0dB
f
= 30 Hz; f
ref
= 30 Hz; f
f
ref
= 300 Hz; bass boost only12.51415.5dB
meas
= 300 Hz; bass and treble boost1213.515dB
meas
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
TEA6880H
Page 29
2000 May 0829
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Volume 1 control
G
v
G
step
∆G
a
∆G
track
Treble control
G
treble
G
step
Bass control
G
bass
G
step
f
c
Q
e
EQ
bow
Volume 2 control
G
v
G
step
voltage gain−36−+20dB
step resolution gain−1−dB
step error between any adjoining step−−0.5dB
attenuator gain set errorGv= +20 to −36 dB−10+1dB
gain tracking errorGv= +20 to −36 dB−01dB
treble gain control, maximum boostf = 10 kHz; V
= 200 mV131415dB
i(rms)
maximum attenuationf = 10 kHz131415dB
step resolution gainf = 10 kHz−2−dB
step error between any adjoining stepf = 10 kHz−−0.5dB
bass gain control, maximum boostexternal T-filter; f = 60 Hz; BSYB = 1;
V
= 200 mV
i(rms)
161820dB
maximum attenuationexternal T-filter; f = 60 Hz; BSYC = 0161820dB
f = 60 Hz; cut; BSYC = 11.21.61.9dB
step error between any adjoining stepf = 60 Hz−−0.5dB
centre frequencyC
equalizer quality factorV
equalizer bowingV
=2×220 nF; R
bass
= 200 mV; boost = 12 dB0.80.91.1
i(rms)
= 200 mV; bass and treble boost = 12 dB;
i(rms)
= 3.3 kΩ506070Hz
bass
−2.13.3dB
reference flat frequency response
voltage gain−68−0dB
step resolutionGv=0to−56 dB−1−dB
step error between any adjoining stepG
=0to−56 dB−−0.5dB
v
additional steps−−58.5−dB
−−62−dB
−−68−dB
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
TEA6880H
Page 30
2000 May 0830
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
α
mute
mute attenuation100110−dB
f=20Hzto20kHz7585−dB
∆G
a
∆G
track
Z
o
R
L
C
o(L)
R
o(L)
attenuator gain set errorGv=0to−32 dB−1−+1dB
G
= −32 to −68 dB−2−+2dB
v
gain tracking errorGv=0to−56 dB−01dB
output impedance−80120Ω
output load resistance2−−kΩ
output load capacitance0−10nF
DC load resistance at output to ground4.7−−kΩ
Chime adder
G
v(CHIME)
V
i(CHIME)(rms)
chime adder voltage gainV
i(rms)
maximum chime input voltage (sine wave)main output voltage V
chime adder on
kfactor for V
to avoid internal clippingk × V
i(CHIME)
Digital part (SDA, SDAQ, SCL, SDA, SCLQ, FMHOLD, AFSAMPLE); note 18
V
IH
V
IL
I
IH
I
IL
V
OL
HIGH-level input voltage359.7V
LOW-level input voltage−0.3+0.3+1.5V
HIGH-level input currentVCC= 0 to 9.5 V−10−+10µA
LOW-level input current−10−+10µA
LOW-level output voltage SDAIL=3mA−−0.4V
11.1Read mode: 1st data byte
Table 4 Format of 1st data byte
76543210
STINRDSULVL5LVL4LVL3LVL2LVL1LVL0
Table 5 Description of 1st data byte bits
BITSYMBOLDESCRIPTION
7STINStereo indicator. This bit indicates if a pilot signal has been detected. If STIN = 0, then
no pilot signal detected. If STIN = 1, then a pilot signal has been detected.
6RDSUMeasure mode. This bit selects the measure mode for the RDS flags. If RDSU = 0,
then continuous mode selected. If RDSU = 1, then RDS update mode selected.
5 to 0LVL[5:0]ADC voltage level. These 6 bits determine the ADC voltage level, see Table 6.
Table 6 Level setting ADC
(V)LVL5LVL4LVL3LVL2LVL1LVL0
V
LEVEL
3.600111111
3.553111110
3.506111101
3.460111100
3.413111011
3.366111010
3.319111001
3.272111000
3.225110111
3.179110110
3.132110101
3.085110100
3.038110011
2.991110010
2.944110001
2.898110000
2.851101111
2.804101110
2.757101101
2.710101100
2.663101011
2.617101010
2.570101001
2.523101000
2.476100111
2.429100110
2.383100101
2000 May 0834
Page 35
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
V
(V)LVL5LVL4LVL3LVL2LVL1LVL0
LEVEL
2.336100100
2.289100011
2.242100010
2.195100001
2.148100000
2.102011111
2.055011110
2.008011101
1.961011100
1.914011011
1.867011010
1.821011001
1.774011000
1.727010111
1.680010110
1.633010101
1.587010100
1.540010011
1.493010010
1.446010001
1.399010000
1.352001111
1.306001110
1.259001101
1.212001100
1.165001011
1.118001010
1.071001001
1.025001000
0.978000111
0.931000110
0.884000101
0.837000100
0.790000011
0.744000010
0.697000001
0.650000000
TEA6880H
2000 May 0835
Page 36
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
11.2Read mode: 2nd data byte
Table 7 Format of 2nd data byte
76543210
−USN2USN1USN0−WBA2WBA1WBA0
Table 8 Description of 2nd data byte
BITSYMBOLDESCRIPTION
7−This bit is not used and must be set to logic 1.
6USN2Ultrasonic noise ADC. These 3 bits select the voltage level for the ultrasonic noise
5USN1
4USN0
3−This bit is not used and must be set to logic 1.
2WBA2AM wideband noise ADC. These 3 bits select the voltage level for the AM wideband
1WBA1
0WBA0
ADC, see Table 9.
ADC, see Table 10.
Table 9 Ultrasonic noise ADC
(V)USN2USN1USN0
V
TUSN2
4.500111
4.157110
3.814101
3.471100
3.129011
2.786010
2.443001
2.100000
Table 10 AM wideband noise ADC
V
TWBAM2
(V)WBA2WBA1WBA0
4.500111
4.157110
3.814101
3.471100
3.129011
2.786010
2.443001
2.100000
2000 May 0836
Page 37
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
11.3Subaddress byte for write
Table 11 Format for subaddress byte
76543210
AIOFBOUT−−SAD3SAD2SAD1SAD0
Table 12 Description of subaddress byte
BITSYMBOLDESCRIPTION
7AIOFAuto-increment control. This bit controls the auto-increment function. If AIOF = 0, then
the auto-increment is on. If AIOF = 1, then auto-increment is off.
2
6BOUTI
5−These 2 bits are not used; both must be set to logic 0.
4−
3SAD3Data byte select. These 4 bits select which data byte is to be addressed; see Table 13.
2SAD2
1SAD1
0SAD0
C-bus output control. This bit enables/disables the I2C-bus output SDAQ and SCLQ
to the TEA6840H. If BOUT = 0, then the I2C-bus output is disabled. If BOUT = 1, then
the I2C-bus output is enabled.
Table 13 Selection of data byte
ADDRESSED DATA BYTEMNEMONICSAD3SAD2SAD1SAD0
Alignment 0ALGN00000
Alignment 1ALGN10001
Alignment 2ALGN20010
Alignment 3ALGN30011
ASI time source selectorSSEL0100
Bass controlBASS0101
Treble control TRBL0110
Loudness controlLOUD0111
Volume 1VOLU11000
Volume 2, left frontVOL2_LF1001
Volume 2, right frontVOL2_RF1010
Volume 2, left rearVOL2_LR1011
Volume 2, right rearVOL2_RR1100
Not used
Not used
Not used
Note
1. Not tested; function not guaranteed.
(1)
(1)
(1)
−1101
−1110
−1111
2000 May 0837
Page 38
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
11.4Write mode: subaddress 0H
Table 14 Format of data byte Alignment 0 (ALGN0)
76543210
AMONAMSTSEARSMUTMMUTMONOMST1MST0
Table 15 Description of ALGN0 bits
BITSYMBOLDESCRIPTION
7AMONAM/FM mode selection. These 2 bits select the AM/FM mode and source; see
6AMST
5SEARSearch mode selection. If SEAR = 0, then mute and SNC detectors normal. If
4SMUTSoft mute enable. If SMUT = 0, then soft mute off. If SMUT = 1, then soft mute
3MMUTMuting of MPX output. If MMUT = 0, then MPX output not muted. If MMUT = 1, then
2MONOStereo decoder mode selection. If MONO = 0, then Stereo mode selected. If
1MST1Start of muting. These 2 bits determine the value of V
0MST0
Table 16.
SEAR = 1, then mute and SNC detectors fast.
enabled.
MPX output muted.
MONO = 1, then Mono mode selected.
; see Table 17 and Fig.4.
TMUTE
Table 16 Setting of AM/FM mode
SELECTED MODEAMONAMST
AM stereo mode, note 111
AM mode, active input AMHIN10
Not allowed01
FM mode, active input MPXIN00
Note
1. MPX input (MPXIN) and AM input (AMHIN) muted, stereo decoder in mono mode and de-emphasis terminals
(DEEML and DEEMR) are audio signal inputs.
Table 17 Setting of start of muting (α
V
(V)MST1MST0
TMUTE
2.4511
2.3010
2.1501
2.0000
MUTE
= 6 dB)
2000 May 0838
Page 39
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
α
MUTE
(dB)
0
(1)
10
handbook, full pagewidth
TEA6880H
MHB413
(2)
(3)
(4)
20
1.01.5
Data byte ALGN2: MSL0 = 1, MSL1 = 1
Data byte ALGN0
CURVEMST1MST0
(1)00
(2)01
(3)10
(4)11
Fig.4 Soft mute attenuation versus V
2.0
TMUTE
and V
2.53.03.5
input voltage (fixed slope).
TUSN1
V
TMUTE
V
TUSN1
(V)
(V)
2000 May 0839
Page 40
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
11.5Write mode: subaddress 1H
Table 18 Format of data byte Alignment 1 (ALGN1)
76543210
USS1USS0AWS1AWS0CHS3CHS2CHS1CHS0
Table 19 Description of ALGN1 bits
BITSYMBOLDESCRIPTION
7USS1Ultrasonic noise sensitivity. These 2 bits determine the ultrasonic noise sensitivity
6USS0
5AWS1AM wideband sensitivity. These 2 bits determine the AM wideband sensitivity levels,
4AWS0
3CHS3Channel separation alignment. These 4 bits select the channel separation alignment,
2CHS2
1CHS1
0CHS0
levels, see Table 20 and Fig.5.
see Table 21 and Fig.6.
see Table 22.
Table 20 Setting of ultrasonic noise sensitivity (V
SLOPE (V/V)USS1USS0
−2.111
−2.910
−4.401
−6.800
MPXRDS(AC)
= 350 mV)
2000 May 0840
Page 41
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
V
TUSN2
V
TUSN1
V
TSNC
(V)
6
5
4
3
2
1
(1)
(2)
(3)
(4)
handbook, full pagewidth
TEA6880H
MHB411
0
00.2
0.40.6
0.8
1.01.21.4
V
MPXRDS (80kHz)
(V)
Data byte ALGN1
CURVEUSS1USS0
(1)11
(2)10
(3)01
(4)00
Fig.5Ultrasonic noise peak and average detector output voltage versus MPX signal input and stereo noise
control peak detector output voltage versus MPX signal input.
2000 May 0841
Page 42
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
Table 21 Setting of AM wideband sensitivity (V
SLOPE (V/V)AWS1AWS0
−2.211
−3.310
−4.901
−6.500
TWBAM2
TWBAM1
V
TSNC
(V)
6
5
4
handbook, full pagewidth
V
V
LEVEL(AC)
(1)
(2)
TEA6880H
= 400 mV)
MHB410
3
2
1
0
0200
Data byte ALGN1
CURVEAWS1AWS0
(1)11
(2)10
(3)01
(4)00
(3)
(4)
400600
800
V
LEVELAC(24kHz)p-p
1000
(mV)
Fig.6AM wideband peak and average detector output voltage versus level AC signal input and stereo noise
control peak detector output voltage versus level AC signal input.
2000 May 0842
Page 43
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
Table 22 Setting of channel separation alignment
CHANNEL SEPARATION ALIGNMENTCHS3CHS2CHS1CHS0
Not used
Not used
Not used
Not used
Not used
Not used
(1)
(1)
(1)
(1)
(1)
(1)
Setting 9, minimum gain of side signal1001
Setting 81000
Setting 70111
Setting 60110
Setting 50101
Setting 40100
Setting 30011
Setting 20010
Setting 10001
Setting 0, maximum gain of side signal0000
1111
1110
1101
1100
1011
1010
Note
1. Not tested; function not guaranteed.
11.6Write mode: subaddress 2H
Table 23 Format of data byte Alignment 2 (ALGN2)
76543210
MSL1MSL0SSL1SSL0SST3SST2SST1SST0
Table 24 Description of ALGN2 bits
BITSYMBOLDESCRIPTION
7MSL1Soft mute slope alignment. These 2 bits determine the value of V
6MSL0
Table 25 and Fig.7.
TMUTE(DC)
; see
5SSL1Stereo noise control slope alignment. These 2 bits determine the value of αcs; see
4SSL0
Table 26 and Fig.8.
3SST3Stereo noise control start alignment. These 4 bits determine the stereo noise control
2SST2
start alignment; see Table 27 and Fig.9.
1SST1
0SST0
2000 May 0843
Page 44
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
Table 25 Setting of soft mute slope alignment
V
TMUTE(DC)
0.395V
0.390V
0.380V
0.350V
α
MUTE
(dB)
0
10
handbook, full pagewidth
without AC11
TUSN1
without AC10
TUSN1
without AC01
TUSN1
without AC00
TUSN1
(1)
(2)
TEA6880H
MSL1MSL0
MHB412
20
30
40
1.01.5
(3)
(4)
Data byte ALGN0: MST0 = 0, MST1 = 0
Data byte ALGN2
CURVEMSL1MSL0
(1)00
(2)01
(3)10
(4)11
2.0
2.53.03.5
V
TUSN1
V
TMUTE
(V)
(V)
Fig.7 Soft mute attenuation versus input voltages V
2000 May 0844
TUSN1
and V
TMUTE
(fixed start).
Page 45
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
Table 26 Setting of stereo noise control slope alignment (V
(dB)SSL1SSL0
α
cs
Not defined11
1310
701
500
50
handbook, full pagewidth
α
cs
(dB)
40
30
TSNC
= 0.72V
TUSN1
TEA6880H
without AC)
MHB414
20
10
0
2.5
Data byte ALGN2: SST = 1000
Data byte ALGN2
CURVESSL0SSL1
(1)01
(2)10
(3)00
3.0
(2)(3)
(1)
3.54.04.5
V
TSNC
(V)
Fig.8 Channel separation versus voltage at pins 56, 63 and 64 (fixed start).
2000 May 0845
Page 46
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
Table 27 Setting of stereo noise control start alignment (αcs= 6 dB)
START ALIGNMENTSST3SST2SST1SST0
= 0.63V
V
TSNC
V
TSNC
V
TSNC
V
TSNC
V
TSNC
V
TSNC
V
TSNC
V
= 0.70V
TSNC
V
TSNC
V
TSNC
V
TSNC
V
TSNC
V
TSNC
V
TSNC
V
TSNC
V
= 0.74V
TSNC
without AC1111
TUSN1
1110
1101
1100
1011
1010
1001
without AC1000
TUSN1
0111
0110
0101
0100
0011
0010
0001
without AC0000
TUSN1
TEA6880H
2000 May 0846
Page 47
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
50
handbook, full pagewidth
α
cs
(dB)
40
30
20
10
TEA6880H
MHB415
(1)
(2)(3)
0
2.5
3.0
Data byte ALGN2: SSL1 = 0, SSL0 = 1
Data byte ALGN2
CURVESST3SST2SST1SST0
(1)0000
(2)1000
(3)1111
Fig.9 Channel separation versus voltage at pins 56, 63 and 64 (fixed slope).
3.54.04.5
V
TSNC
(V)
2000 May 0847
Page 48
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
11.7Write mode: subaddress 3H
Table 28 Format of data byte Alignment 3 (ALGN3)
76543210
NBS1NBS0DE75HCCSHST1HST0HSL1HSL0
Table 29 Description of ALGN3 bits
BITSYMBOLDESCRIPTION
7NBS1Noise blanker sensitivity. These 2 bits determine the noise blanker sensitivity levels;
6NBS0
5DE75De-emphasis. If DE75 = 1, then de-emphasis is 75 µs. If DE75 = 1, then de-emphasis
4HCCSHCC control switch. With static roll-off: HCCS = 1, C
3HST1HCC start alignment. These 2 bits determine the alignment for the start of high cut
2HST0
1HSL1HCC slope alignment. These 2 bits determine the alignment for the slope of high cut
0HSL0
see Table 30.
is 50 µs.
roll-off: HCCS = 0, C61=C62= 680 pF.
control; see Table 31 and Fig.10.
control; see Table 32 and Fig.11.
61=C62
= 2.7 nF. Without static
Table 30 Setting of noise blanker sensitivity
V
pulse(p)(MPX)
Table 31 Setting of alignment for start of high cut control (α
(mV) V
1211011
2412010
6015001
12020000
V
(3-10)DC
1.3011
1.4510
1.9001
2.1000
pulse(p)(level)
(V)HST1HST0
(mV)NBS1NBS0
10kHz
= 3 dB)
2000 May 0848
Page 49
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
α
10kHz
(dB)
0
−2
−4
−6
−8
−10
handbook, full pagewidth
TEA6880H
MHB417
(1)(2)(3)(4)
−12
14
Data byte ALGN3: HSL1 = 1, HSL0 = 0
Data byte ALGN3
CURVEHST1HST0
(1)11
(2)10
(3)01
(4)00
Fig.10 High cut control versus V
2
TMUTE
3
(fixed slope).
V
TMUTE
(V)
2000 May 0849
Page 50
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
Table 32 Setting of alignment for slope of high cut control (V
(dB)HSL1HSL0
α
10kHz
7.511
6.010
4.001
3.000
α
10kHz
(dB)
0
−2
−4
handbook, full pagewidth
TMUTE
TEA6880H
= 2.4 V)
MHB416
−6
−8
−10
−12
14
(1)(2)(3) (4)
Data byte ALGN3: HST1 = 1, HST0 = 1
Data byte ALGN3
CURVEHSL1HSL0
(1)00
(2)01
(3)10
(4)11
2
3
V
TMUTE
(V)
Fig.11 High cut control versus V
2000 May 0850
TMUTE
(fixed start).
Page 51
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
11.8Write mode: subaddress 4H
Table 33 Format of data byte Source Selector (SSEL)
76543210
ASI1ASI0RSA2RSA1RSA0MSS2MSS1MSS0
Table 34 Description of SSEL bits
BITSYMBOLDESCRIPTION
7ASI1ASI/ABC speed selection. These 2 bits select the ASI/ABC speed (time per step), see
6ASI0
5RSA2Rear seat audio selector. These 3 bits select the source for the rear outputs, see
4RSA1
3RSA0
2MSS2Main source selector. These 3 bits select the source for the main control part, see
1MSS1
0MSS0
Table 35.
Table 36.
Table 37.
Table 35 ASI/ABC speed selection (C
ASI/ABC SPEED (ms)ASI1ASI0
2011
8.3310
3.3301
0.8300
Table 36 Selected source for rear outputs
SELECTED SOURCERSA2RSA1RSA0
Internal, main channel
Internal, main channel
Internal, main channel
Internal, main channel100
AM/FM (internal)011
Input A (stereo)010
Input B (stereo)001
Input C (stereo, symmetrical)000
Note
1. Not tested; function not guaranteed.
(1)
(1)
(1)
=15nF)
35
111
110
101
2000 May 0851
Page 52
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
Table 37 Selected source for main control part
SELECTED SOURCEMSS2MSS1MSS0
Chime input
Chime input
Chime input101
Input D (mono, symmetrical)100
AM/FM (internal)011
Input A (stereo)010
Input B (stereo)001
Input C (stereo, symmetrical)000
Note
1. Not tested; function not guaranteed.
11.9Write mode: subaddress 5H
Table 38 Format of data byte Bass control (BASS)
BSYC−BSYBBAS4BAS3BAS2BAS1BAS0
(1)
(1)
76543210
111
110
Table 39 Description of BASS bits
BITSYMBOLDESCRIPTION
7BSYCBass filter mode for cut. If BSYC = 0, then shelving characteristic selected. If
BSYC = 1, then band-pass filter characteristic selected.
6−This bit is not used and must be set to logic 0.
5BSYBBass filter mode for boost. If BSYB = 0, then shelving characteristic selected. If
BSYB = 1, then band-pass filter characteristic selected.
4BAS4Bass control. These 5 bits determine the bass control level, see Table 40.
3BAS3
2BAS2
1BAS1
0BAS0
2000 May 0852
Page 53
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
Table 40 Setting of bass control level
BASS CONTROL (dB)BAS4BAS3BAS2BAS1BAS0
(1)
+18
(1)
+18
(1)
+18
(1)
+18
(1)
+18
+18 11010
+16 11001
+14 11000
+12 10111
+10 10110
+810101
+610100
+410011
+210010
+010001
−010000
−2 (−1.8)01111
−4 (−3.6)01110
−6 (−5.4)01101
−8 (−7.1)01100
−10 (−8.7)01011
−12 (−10.3)01010
−14 (−11.7)01001
−16 (−13.1)01000
−18 (−14.4)00111
−18 (−14.4)
−18 (−14.4)
−18 (−14.4)
−18 (−14.4)
−18 (−14.4)
−18 (−14.4)
−18 (−14.4)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
TEA6880H
11111
11110
11101
11100
11011
00110
00101
00100
00011
00010
00001
00000
Note
1. Not tested; function not guaranteed.
2000 May 0853
Page 54
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
11.10 Write mode: subaddress 6H
Table 41 Format of data byte Treble control (TRBL)
76543210
HSTM−−−TRE3TRE2TRE1TRE0
Table 42 Description of TRBL bits
BITSYMBOLDESCRIPTION
7HSTMTest mode muting average and SNC peak detector. If HSTM = 0, then normal
operation. If HSTM = 1, then increased detector currents.
6−These 3 bits are not used; each must be set to logic 0.
5−
4−
3TRE3Treble control. These 4 bits determine the treble control level, see Table 43.
2TRE2
1TRE1
0TRE0
Table 43 Setting of treble control level
TREBLE CONTROL (dB)TRE3TRE2TRE1TRE0
+14 1111
+12 1110
+10 1101
+81100
+61011
+41010
+21001
+01000
−00111
−20110
−40101
−60100
−80011
−10 0010
−12 0001
−14 0000
2000 May 0854
Page 55
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
11.11 Write mode: subaddress 7H
Table 44 Format of data byte Loudness control (LOUD)
76543210
LOFF−−LSN4LSN3LSN2LSN1LSN0
Table 45 Description of LOUD bits
BITSYMBOLDESCRIPTION
7LOFFLoudness switch control. If LOFF = 0, then the loudness switch is on. If LOFF = 1,
then loudness switch is off.
6−These 2 bits are not used, each must be set to logic 0.
5−
4LSN4Loudness control. These 5 bits determine the attenuation of the loudness block, see
3LSN3
2LSN2
1LSN1
0LSN0
QFP64: plastic quad flat package; 64 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm
c
y
X
5133
52
32
Z
E
A
TEA6880H
SOT319-2
pin 1 index
64
1
w M
b
0.50
0.35
p
D
H
D
0510 mm
(1)
(1)(1)(1)
D
0.25
0.14
20.1
19.9
14.1
13.9
e
DIMENSIONS (mm are the original dimensions)
mm
A
max.
3.20
0.25
0.05
2.90
2.65
0.25
UNITA1A2A3bpcE
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
19
Z
D
scale
eH
H
24.2
1
23.6
20
D
B
e
w M
b
p
E
18.2
17.6
H
E
v M
A
v M
B
LL
p
1.0
0.6
A
2
A
E
A
1
detail X
Zywvθ
Z
E
D
1.2
0.20.10.21.95
0.8
1.2
0.8
(A )
3
θ
L
p
L
o
7
o
0
OUTLINE
VERSION
SOT319-2MO-112
IEC JEDEC EIAJ
REFERENCES
2000 May 0884
EUROPEAN
PROJECTION
ISSUE DATE
97-08-01
99-12-27
Page 85
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
Processor (CASP)
14 SOLDERING
14.1Introduction to soldering surface mount
packages
Thistextgivesaverybriefinsighttoacomplex technology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
14.2Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
totheprinted-circuitboardbyscreenprinting,stencillingor
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
TEA6880H
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• Forpackageswithleadsonfoursides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
14.3Wave soldering
Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
2000 May 0885
14.4Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
Page 86
Philips SemiconductorsProduct specification
Up-level Car radio Analog Signal
TEA6880H
Processor (CASP)
14.5Suitability of surface mount IC packages for wave and reflow soldering methods
PACKAGE
BGA, SQFPnot suitablesuitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
, SO, SOJsuitablesuitable
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
The package footprint must incorporate solder thieves downstream and at the side corners.
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
Objective specificationDevelopmentThis data sheet contains the design target or goal specifications for
Preliminary specificationQualificationThis data sheet contains preliminary data, and supplementary data will be
Product specificationProductionThis data sheet contains final specifications. Philips Semiconductors
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
16 DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseoratanyotherconditionsabovethosegiveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuch applications will be
suitable for the specified use without further testing or
modification.
PRODUCT
STATUS
DEFINITIONS
product development. Specification may change in any manner without
notice.
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
17 DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingorselling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofanyoftheseproducts, conveys no licence or title
under any patent, copyright, or mask work right to these
products,andmakesnorepresentationsorwarrantiesthat
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
(1)
2
18 PURCHASE OF PHILIPS I
Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
2000 May 0887
C COMPONENTS
2
C components conveys a license under the Philips’ I2C patent to use the
Page 88
Philips Semiconductors – a w orldwide compan y
Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
2000
Internet: http://www.semiconductors.philips.com
69
Printed in The Netherlands753503/01/pp88 Date of release: 2000 May 08Document order number: 9397 750 04633
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