Product specification
Supersedes data of 1996 Sep 05
File under Integrated Circuits, IC03
1998 Mar 02
Page 2
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
FEATURES
• Fully integrated DC/DC converter circuit
• Up-or-down conversion, each in 2 different modes
• High efficiency (up to 96%) at high loads
• Output power up to 3.6 W (typ.) continuous, 8 W in GSM
burst mode
• Low quiescent power consumption
• Burst mode input for optimal dynamic response to
switching loads
• True current limit for LiIon battery compatibility
• Up to 100% duty cycle in down mode
• Shut-down function
• 8-pin SO package.
APPLICATIONS
• Cellular and cordless phones PDAs and others
• Supply voltage source for low-voltage chip sets
• Portable computers
• Battery backup supplies
• Cameras.
GENERAL DESCRIPTION
The TEA1204T is a fully integrated DC/DC converter
circuit using the minimum amount of external components.
It is intended to be used to supply electronic circuits with
supply voltages of 3.3, 3.6 or 5.0 V from 2, 3 or 4 NiCd cell
batteries or one LiIon battery at an output power level up
to 3.6 W (typ.) continuously, or 8 W in GSM TDMA (1 : 8)
burst mode. Efficient, compact and dynamic power
conversion is achieved using a novel, digitally controlled
Pulse Width and Frequency Modulation (PWFM) like
control concept, integrated low R
switches with low parasitic capacitances and synchronous
rectification.
CMOS power
dsON
ORDERING INFORMATION
TYPE NUMBER
NAMEDESCRIPTIONVERSION
TEA1204TSO8plastic small outline package; 8 leads; body width 3.9 mmSOT96-1
PACKAGE
1998 Mar 022
Page 3
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
V
O(up)
V
O(down)
V
start
Efficiency
ηefficiency
Current levels
I
q
I
SHDWN
I
limN
I
limP
I
LX(max)
output voltage in up modeU/D = LOW, VSEL = LOW4.755.055.35V
U/D = LOW; VSEL = HIGH3.133.343.54V
output voltage in down modeU/D = HIGH; VSEL = LOW3.423.643.85V
U/D = HIGH; VSEL = HIGH3.133.343.54V
start-up voltageup mode1.62.02.2V
from 2.4 to 3.3 V1 mA < I
from 3.6 to 5.0 V1 mA < I
from 5.0 to 3.6 V1 mA < I
from 5.0 to 3.3 V1 mA < I
<1.0A839095%
L
<1.0A829094%
L
<1.0A809295%
L
<1.0A789094%
L
quiescent current at pin 3up mode506070µA
shut-down current−210µA
current limit NFETup mode2.382.803.20A
current limit PFETdown mode2.052.402.75A
maximum continuous current at
down mode; input voltage
SENSE4output voltage sense input
LX5inductor connection
GND6ground
BURST7burst mode trigger input
SHDWN8shut-down input
handbook, halfpage
UPOUT/DNINGND
1
U/DSHDWN
2
VSELBURST
SENSELX
TEA1204T
3
4
8
7
6
5
MBH564
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
Control mechanism
The TEA1204T DC/DC converter is able to operate in
discontinuous or continuous conduction operation.
All switching actions are completely determined by a
digital control circuit which uses the output voltage level as
its control input. This novel digital approach enables the
use of a new pulse width and frequency modulation
scheme, which ensures optimum power efficiency over the
complete range of operation of the converter. The scheme
works as follows. At low output power, a very small current
pulse is generated in the inductor, and the pulse rate
varies with a varying load. When the output voltage drops
below a specific limit, which indicates that the converter’s
current capability is not sufficient, the digital controller
switches to the next state of operation. The peak current in
the inductor is made higher, and the pulse rate can again
vary with a varying load. A third operational state is
available for even higher currents.
When high output power is requested, the device starts
operating in continuous conduction mode. This results in
minimum AC currents in the circuit components and hence
optimum efficiency, cost, and EMC. In this mode, the
output voltage is allowed to vary between two predefined
voltage levels. As long as the output voltage stays within
this so-called window, switching continues in a fixed
pattern. When the output voltage reaches one of the
window borders, the digital controller immediately reacts
by adjusting the pulse width and inserting a current step in
such a way that the output voltage stays within the window
with higher or lower current capability. This approach
enables very fast reaction to load variations. Figure 3
shows the various coil current waveforms for low and high
current capability in each power conversion mode.
Figure 4 shows the converter’s response to a sudden load
increase. The upper trace shows the output voltage.
The ripple on top of the DC level is a result of the current
in the output capacitor, which changes in sign twice per
cycle, times the capacitor’s internal Equivalent Series
Resistance (ESR). After each ramp-down of the inductor
current, i.e. when the ESR effect increases the output
voltage, the converter determines what to do in the next
cycle. As soon as more load current is taken from the
output the output voltage starts to decay. When the output
voltage becomes lower than the low limit of the window, a
corrective action is taken by a ramp-up of the inductor
current during a much longer time. As a result, the DC
current level is increased and normal continuous
conduction mode can continue. The output voltage
(including ESR effect) is again within the predefined
window.
Figure 5 depicts the spread of the output voltage window.
The absolute value is most dependent on spread, while the
actual window size is not affected. For one specific device,
the output voltage will not vary more than 4%.
Start-up
A possible deadlock situation in boost configuration can
occur after a sequence of disconnecting and reconnecting
the input voltage source. If, after disconnection of the input
source, the output voltage falls below 2.0 V, the device
may not restart properly after reconnection of the input
source, and may take continuous current from the input.
An external circuit to prevent the deadlock situation is
shown in Chapter “Application information”.
1998 Mar 025
Page 6
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
Burst mode trigger input
For burst-mode applications, in which the required output
power periodically changes between two different power
levels, the burst mode trigger feature gains optimal
dynamic response. A digital signal indicating the load
change must be connected to the burst pin. Polarity of the
burst signal is arbitrary. When not used, the burst pin must
be tied to pin 3 or pin 6.
Shut-down
When the shut-down pin is made HIGH, the converter
disables both switches and power consumption is reduced
to a few µA.
Power switches
The power switches in the IC are one N-type and one
P-type MOSFET, having a typical pin-to-pin resistance of
0.12 Ω and 0.16 Ω respectively. The maximum average
current in the switches is 1.0 A.
Temperature protection
At too high device temperature (typical 165 °C), the
converter stops operating. It resumes operation when the
device temperature falls below 165 °C again. As a result,
low-frequent cycling between on and off state will occur.
It should be noted that in the event of device temperatures
around the cut-off limit, the application differs strongly from
maximum specifications.
Behaviour at input voltage exceeding the specified
range
In general, an input voltage exceeding the specified range
is not recommended since instability may occur. There are
two exceptions:
• Upconversion: at an input voltage equal to or higher than
the target output voltage, but up to 6 V, the converter will
stop switching and the external schottky diode will take
over, resulting in V
equalling Vi minus the diode voltage
o
drop.
• Downconversion: when the input voltage is equal to or
lower than the target output voltage, but higher than
2.6 V, the P-type FET will stay conducting resulting in V
being equal to Vi minus some resistive voltage drop.
The current limit function remains active.
handbook, halfpage
low power
mode
medium power
mode 1
medium power
mode 2
increasing
load
o
Current limiters
If the current in one of the power switches exceeds its limit,
current ramping is stopped immediately, and the next
switching phase is entered. Current limitation is required to
enable optimal use of energy in Lithium-Ion batteries, and
to keep power conversion efficient during temporary high
loads. Furthermore, current limitation protects the IC
against overload conditions, inductor saturation, etc.
1998 Mar 026
low DC current
high DC current
time
MGK924
Fig.3Coil current waveforms in the various power
modes.
Page 7
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
ndbook, full pagewidth
load increase
V
o
I
L
start corrective action
time
time
high window limit
low window limit
MGK925
Fig.4 Response to load increase.
handbook, full pagewidth
5.35
V
5.15
4.95
4.75
o
V
h
4%
V
l
maximum positive spread
V
h
+3%
4%
V
l
+3%
maximum negative spreadtypical situation
Fig.5 Output voltage window at typical, maximum and minimum specification.
1998 Mar 027
−3%
−3%
4%
upper specification limit
V
h
V
l
lower specification limit
MGK926
Page 8
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
n
T
j
T
amb
T
stg
V
es
Note
1. Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
thermal resistance from junction to ambientin free air150K/W
QUALITY SPECIFICATION
In accordance with
“SNW-FQ-611 part E”
Reference Handbook”
. The handbook can be ordered using the code 9397 750 00192.
. The numbers of the quality specification can be found in the
“Quality
CHARACTERISTICS
= −20 to +80 °C; all voltages with respect to ground; positive currents flow into the IC; unless otherwise specified.
T
j
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Supplies
V
O(up)
output voltage in up modeU/D = LOW, VSEL = LOW4.755.055.35V
U/D = LOW; VSEL = HIGH3.133.343.54V
V
O(down)
output voltage in down modeU/D = HIGH; VSEL = LOW3.423.643.85V
U/D = HIGH; VSEL = HIGH3.133.343.54V
V
start
start-up voltageup mode1.62.02.2V
Efficiency
ηefficiency
from 2.4 to 3.3 V1 mA < I
from 3.6 to 5.0 V1 mA < I
from 5.0 to 3.6 V1 mA < I
from 5.0 to 3.3 V1 mA < I
<1.0A839095%
L
<1.0A829094%
L
<1.0A809295%
L
<1.0A789094%
L
1998 Mar 028
Page 9
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Current levels
I
q
I
SHDWN
I
limN
I
limP
I
LX(max)
Power MOSFETS
R
dsON(N)
R
dsON(P)
Timing
f
sw
t
res
T emperature
T
amb
T
max
Digital levels
V
lL
V
IH
V
IH
V
IH
quiescent current at pin 3up mode506070µA
shut-down current−210µA
current limit NFETup mode; note 12.382.803.20A
current limit PFETdown mode; note 12.052.402.75A
maximum continuous current
1, 2, 7 and 8
HIGH-level input voltage pin 1note 2V3− 0.4 −V3+ 0.3 V
HIGH-level input voltage pin 2notes 2 and 32.0−V3+ 0.3 V
HIGH-level input voltage
notes 2 and 32.9−V3+ 0.3 V
pins 7 and 8
Sense pin resistance
R
SENSE
SENSE pin resistance to GND up or down to 3.3 V mode437.2546.5655.8kΩ
down to 3.6 V mode476.8596.0715.2kΩ
up to 5.0 V mode662.2827.8993.4kΩ
Notes
1. The average inductor current during current limit also depends on inductance value and resistive losses in all
components in the power path. In normal applications, the average current will be limited to 2.3 A (typ.), with limits
scaled down to minimum 2.07 A and maximum 2.53 A.
2. V3 is the voltage at pin 3 (UPOUT/DNIN).
3. If the applied high level is less than V3− 1 V, the quiescent current level of the device will increase. The maximum
increase is 300 µA in the event that pin 2 is at 2.0 V.
1998 Mar 029
Page 10
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
APPLICATION INFORMATION
handbook, full pagewidth
D1
C2
MGK928
V
O
UPOUT/DNIN
SENSE
C1
L1
LX
GND U/D VSEL BURST SHDWN
TEA1204T
V
I
Fig.6 Complete application for upconversion.
handbook, full pagewidth
V
I
UPOUT/DNIN
TEA1204T
C1
GND U/D VSEL BURST SHDWN
Fig.7 Complete application for downconversion.
1998 Mar 0210
SENSE
LX
D1
L1
C2
V
MGK929
O
Page 11
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
A typical component choice for an upconverter from
3 NiCd cells or one LiIon cell to 5.0 V in a GSM handset
(peak power 7.5 W, peak current 2.7 A) is:
• C2; C = 330 µF; ESR = 0.1 Ω; e.g. Sprague 595D series
• D1; medium power Schottky diode; e.g. Philips
PRLL5819.
For lower power applications, the I
and RDC values of
sat
the inductor can be scaled back by the scaling factor of the
output current from the values above. The same holds for
the ESR value of the output capacitor. A further
improvement is increase of inductance and decrease of
output capacitance.
An additional circuit to prevent start-up deadlock in
upconversion is shown in Fig.8. The function of TR1, R1
and R2 is to put the converter into shut-down mode when
the input source is suddenly disconnected. The circuit
operates as follows. When VI is present, TR1 conducts
and the SHDWN pin is kept LOW. As soon as VI falls below
1 V, TR1 no longer conducts and the device is put into
shut-down before VO falls below 2 V. In the event that a
signal is available which indicates the presence of the
input voltage source, this signal should be applied to the
SHDWN pin. TR1, R1 and R2 should be omitted in that
case.
More application information can be found in the
associated application note.
handbook, halfpage
V
R2
I
2.7 MΩ
V
O
R1
1 MΩ
SHDWN
TR1
MGK930
Fig.8 External deadlock prevention circuit.
1998 Mar 0211
Page 12
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
100
handbook, full pagewidth
efficiency
(%)
90
80
70
60
50
40
−1
10
Using a Coilcraft DO3316P 10 µH inductor and a Sprague 595D 330µF capacitor.
The dashed line represents the Pulse Frequency Modulation (PFM) and the full line the Pulse Width Modulation (PWM).
11010
2
10
Fig.9 Efficiency as a function of load current (2.4 to 3.3 V).
IL (mA)
MGM601
3
100
handbook, full pagewidth
efficiency
(%)
90
80
70
60
50
40
−1
10
Using a Coilcraft DO3316P 10 µH inductor and a Sprague 595D 330µF capacitor.
The dashed line represents the Pulse Frequency Modulation (PFM) and the full line the Pulse Width Modulation (PWM).
11010
10
Fig.10 Efficiency as a function of load current (3.6 to 5.0 V).
MGM602
2
IL (mA)
3
1998 Mar 0212
Page 13
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
100
handbook, full pagewidth
efficiency
(%)
90
80
70
60
50
40
−1
10
Using a Coilcraft DO3316P 10 µH inductor and a Sprague 595D 330µF capacitor.
The dashed line represents the Pulse Frequency Modulation (PFM) and the full line the Pulse Width Modulation (PWM).
11010
10
Fig.11 Efficiency as a function of load current (5.0 to 3.3 V).
MGM603
2
IL (mA)
3
100
handbook, full pagewidth
efficiency
(%)
90
80
70
60
50
40
−1
10
Using a Coilcraft DO3316P 10 µH inductor and a Sprague 595D 330µF capacitor.
The dashed line represents the Pulse Frequency Modulation (PFM) and the full line the Pulse Width Modulation (PWM).
11010
2
10
Fig.12 Efficiency as a function of load current (5.0 to 3.6 V).
IL (mA)
MGM604
3
1998 Mar 0213
Page 14
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
PACKAGE OUTLINE
SO8: plastic small outline package; 8 leads; body width 3.9 mm
D
c
y
Z
8
pin 1 index
1
e
5
A
2
A
4
w M
b
p
SOT96-1
E
H
E
1
L
detail X
A
X
v M
A
Q
(A )
L
p
A
3
θ
02.55 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
OUTLINE
VERSION
SOT96-1
A
max.
1.75
0.069
A
1
0.25
0.10
0.010
0.004
A2A
1.45
1.25
0.057
0.049
IEC JEDEC EIAJ
076E03S MS-012AA
0.25
0.01
b
3
p
0.49
0.25
0.36
0.19
0.019
0.0100
0.014
0.0075
UNIT
inches
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
(1)E(2)
cD
5.0
4.8
0.20
0.19
REFERENCES
4.0
3.8
0.16
0.15
1.27
0.050
1998 Mar 0214
eHELLpQZywv θ
1.05
1.0
0.4
0.039
0.016
0.7
0.6
0.028
0.024
0.250.10.25
0.010.010.0410.004
EUROPEAN
PROJECTION
6.2
5.8
0.244
0.228
(1)
0.7
0.3
0.028
0.012
ISSUE DATE
95-02-04
97-05-22
o
8
o
0
Page 15
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“IC Package Databook”
Reflow soldering
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
(order code 9398 652 90011).
Wave soldering
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
1998 Mar 0215
Page 16
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1998 Mar 0216
Page 17
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
NOTES
1998 Mar 0217
Page 18
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
NOTES
1998 Mar 0218
Page 19
Philips SemiconductorsProduct specification
High efficiency DC/DC converterTEA1204T
NOTES
1998 Mar 0219
Page 20
Philips Semiconductors – a worldwide company
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
Printed in The Netherlands415102/1200/02/pp20 Date of release: 1998 Mar 02Document order number: 9397 750 02734
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