The TEA1110A is a bipolar integrated circuit that performs
all speech and line interface functions required in fully
electronic telephone sets. It performs electronic switching
between speech and dialling. The IC operates at a line
voltage down to 1.6 V DC (with reduced performance) to
facilitate the use of telephone sets connected in parallel.
All statements and values refer to all versions unless
otherwise specified.
= 600 Ω; f = 1 kHz;
line
TEA1110A
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
I
line
line current operating rangenormal operation11−140mA
with reduced performance 1−11mA
V
I
V
G
LN
CC
CC
vtrx
DC line voltage3.353.653.95V
internal current consumptionVCC= 2.9 V−1.11.4mA
supply voltage for peripheralsIP=0mA−2.9−V
typical voltage gain
microphone amplifier (not
V
= 4 mV (RMS)−43.7−dB
MIC
adjustable)
= 4 mV (RMS)19− 33dB
IR
I
=85mA−5.9−dB
line
∆G
vtrx
receiving amplifier rangeV
gain control range formicrophone and
receiving amplifiers with respect to
I
=15mA
line
∆G
vtrxm
gain reduction for microphone and
MUTE = LOW−80−dB
receiving amplifiers
ORDERING INFORMATION
TYPE
NUMBER
NAMEDESCRIPTIONVERSION
PACKAGE
TEA1110ADIP14plastic dual in-line package; 14 leads (300 mil)SOT27-1
TEA1110ATSO14plastic small outline package; 14 leads; body width 3.9 mmSOT108-1
TEA1110AUH−bare die; on foil−
2000 Feb 152
Page 3
Philips SemiconductorsProduct specification
Low voltage versatile telephone
transmission circuit with dialler interface
BLOCK DIAGRAM
handbook, full pagewidth
7
DTMF
IR
5
ATT.
V I
V I
V I
GAR
QRMUTE
13126
CURRENT
REFERENCE
TEA1110A
V
14
CC
LN
1
MIC+
MIC−
10
9
V
EE
V I
AGC
CIRCUIT
AGC
LOW VOLTAGE
CIRCUIT
TEA1110A(T)
3
2811
SLPE
REG
MGG736
Fig.1 Block diagram.
2000 Feb 153
Page 4
Philips SemiconductorsProduct specification
Low voltage versatile telephone
TEA1110A
transmission circuit with dialler interface
PINNING
SYMBOL
LN11positive line terminal
SLPE22slope (DC resistance) adjustment
REG33line voltage regulator decoupling
n.c.44not connected
DTMF55dual-tone multi-frequency input
MUTE66mute input to select speech or dialling mode (active LOW)
IR77receiving amplifier input
AGC88automatic gain control/ line loss compensation
MIC−99inverting microphone amplifier input
MIC+1010non-inverting microphone amplifier input
V
EE
QR1212earpiece amplifier output
GAR1313earpiece amplifier gain adjustment
V
CC
PINPAD
DESCRIPTION
TEA1110A(T)TEA1110AUH
1111negative line terminal
1414supply voltage for internal circuit
handbook, halfpage
LN
1
SLPE
2
3
REG
4
n.c.
TEA1110A(T)
5
DTMF
6
MUTE
7
IR
MGG735
Fig.2 Pin configuration.
14
V
CC
13
GAR
12
QR
11
V
EE
10
MIC+
9
MIC−
8
AGC
2000 Feb 154
Page 5
Philips SemiconductorsProduct specification
Low voltage versatile telephone
transmission circuit with dialler interface
FUNCTIONAL DESCRIPTION
All data given in this chapter are typical values, except
when otherwise specified.
Supply (pins LN, SLPE, VCC and REG)
The supply for the TEA1110A and its peripherals is
obtained from the telephone line; see Fig.3.
The IC generates a stabilized reference voltage (V
between pins LN and SLPE. V
is temperature
ref
compensated and can be adjusted by means of an
external resistor (RVA). V
equals 3.35 V and can be
ref
increased by connecting RVA between pins REG and
SLPE (see Fig.4), or decreased by connecting R
between pins REG and LN. The voltage at pin REG is
used by the internal regulator to generate V
decoupled by C
, which is connected to VEE. This
REG
ref
capacitor, converted into an equivalent inductance
(see Section “Set impedance”), realizes the set
impedance conversion from its DC value (R
SLPE
value (RCC in the audio-frequency range). The voltage at
pin SLPE is proportional to the line current.
ref
VA
and is
) to its AC
)
TEA1110A
The voltage at pin LN is:
V
I
V
LN
SLPEIlineICC
refRSLPEISLPE
Where:
= line current
I
line
ICC= current consumption of the IC
IP= supply current for peripheral circuits
I* = current consumed between LN and VEE.
ThepreferredvalueforR
affect more than the DC characteristics; it also influences
the microphone and DTMF gains, the gain control
characteristics, the sidetone level and the maximum
output swing on the line.
×+=
–IP–I∗–=
is 20 Ω.ChangingR
SLPE
SLPE
will
handbook, full pagewidth
R
exch
V
exch
R
line
I
line
I
SLPE
LN
114
I
sh
V
d
2
SLPE
R
SLPE
20 Ω
R
CC
619 Ω
from pre amp
V
CC
I
I*
311
REG
C
REG
4.7 µF
CC
TEA1110A
C
VCC
100 µF
V
EE
peripheral
circuits
MGG737
I
P
Fig.3 Supply configuration.
2000 Feb 155
Page 6
Philips SemiconductorsProduct specification
Low voltage versatile telephone
transmission circuit with dialler interface
The internal circuitry of the TEA1110A is supplied from
pin VCC. This voltage supply is derived from the line
voltage by means of a resistor (R
decoupled by a capacitor C
VCC
supply peripheral circuits such as dialling or control
circuits. The V
voltage depends on the current
CC
consumed by the IC and the peripheral circuits as shown
by the formula:
V
CC0
is the internal equivalent resistance of the voltage
R
CCint
supply, and I
V
VLNR
is the current consumed by the output
rec
CC
×–=
CCICC
V
CC0RCCintIPIrec
(see also Figs 5 and 6).
stage of the earpiece amplifier.
The DC line current flowing into the set is determined by
the exchange supply voltage (V
resistance (R
(R
) and the reference voltage (V
line
), the DC resistance of the telephone line
exch
below 7.5 mA, the internal reference voltage (generating
V
)isautomaticallyadjustedtoalowervalue.Thismeans
ref
thatmoresetscanoperateinparallelwithDClinevoltages
(excluding the polarity guard) down to an absolute
minimum voltage of 1.6 V. At currents below 7.5 mA, the
circuit has limited sending and receiving levels. This is
called the low voltage area.
6.0
handbook, halfpage
V
ref
(V)
5.0
) and must be
CC
. It may also be used to
–()×–=
), the feeding bridge
exch
). With line currents
ref
MGD176
TEA1110A
Set impedance
In the audio frequency range, the dynamic impedance is
mainly determined by the R
impedance of the circuit is illustrated in Fig.7.
Microphone amplifier (pins MIC+ and MIC−)
The TEA1110A has symmetrical microphone inputs. The
input impedance between pins MIC+ and MIC− is 64 kΩ
(2 × 32 kΩ). The voltage gain from pins MIC+/MIC− to pin
LN is set at 43.7 dB (typ).
Automatic gain control is provided on this amplifier for line
loss compensation.
Receiving amplifier (pins IR, GAR and QR)
The receiving amplifier has one input (IR) and one output
(QR). The input impedance between pin IR and pin VEEis
20 kΩ. The voltage gain from pin IR to pin QR is set at
33 dB (typ). The gain can be decreased by connecting an
external resistor R
between pins GAR and QR; the
GAR
adjustment range is 14 dB. Two external capacitors C
(connectedbetweenGAR and QR) and C
between GAR and VEE) ensure stability. The C
capacitor provides a first-order low-pass filter. The cut-off
frequency corresponds to the time constant
C
GAR
× (R
GARint
// R
GAR
which sets the gain with a typical value of 125 kΩ. The
condition C
continuous wave drive. The maximum output swing
depends on the DC line voltage, the RCC resistor, the I
current consumption of the circuit, the IP current
consumption of the peripheral circuits and the load
impedance.
resistor. The equivalent
CC
GARS
). R
GAR
is the internal resistor
GARint
must be fulfilled to ensure
GAR
(connected
GAR
CC
4.0
(1)
(2)
3.0
4
10
(1) Influence of RVA on V
(2) V
without influence of RVA.
ref
5
10
.
ref
6
10
RVA (Ω)
7
10
Fig.4 Reference voltage adjustment by RVA.
2000 Feb 156
Automatic gain control is provided on this amplifier for line
loss compensation.
Automatic gain control (pin AGC)
The TEA1110A performs automatic line loss
compensation. The automatic gain control varies the gain
of the microphone amplifier and the gain of the receiving
amplifier in accordance with the DC line current. The
control range is 5.9 dB (which corresponds approximately
to a line length of 5 km for a 0.5 mm diameter twisted-pair
copper cable with a DC resistance of 176 Ω/km and an
average attenuation of 1.2 dB/km). The IC can be used
with different configurations of feeding bridge (supply
voltage and bridge resistance) by connecting an external
resistor R
between pins AGC and VEE.
AGC
Page 7
Philips SemiconductorsProduct specification
Low voltage versatile telephone
transmission circuit with dialler interface
This resistor enables the I
increased (the ratio between I
by the resistor). The AGC function is disabled when
pin AGC is left open-circuit.
Mute function (pin MUTE)
The mute function performs the switching between the
speechmode and the dialling mode. When MUTE is LOW,
the DTMF input is enabled and the microphone and
receiving amplifiers inputs are disabled. When MUTE is
HIGH, the microphone and receiving amplifiers inputs are
enabled while the DTMF input is disabled. A pull-up
resistor is included at the input.
DTMF amplifier (pin DTMF)
When the DTMF amplifier is enabled, dialling tones may
be sent on line. These tones can be heard in the earpiece
at a low level (confidence tone).
The TEA1110A has an asymmetrical DTMF input. The
input impedance between DTMF and VEE is 20 kΩ. The
voltage gain from pin DTMF to pin LN is 25.3 dB.
start
and I
start
line currents to be
stop
and I
is not affected
stop
2.5
andbook, halfpage
I
P
(mA)
2
1.5
1
0.5
0
01234
(1) With RVA resistor.
(2) Without RVA resistor.
TEA1110A
MBE783
(1)(2)
VCC (V)
The automatic gain control has no effect on the DTMF
amplifier.
handbook, halfpage
R
CCintVCC
V
CCO
I
rec
V
EE
PERIPHERAL
CIRCUIT
I
P
MBE792
Fig.5 Typical current IP available from VCC for
peripheral circuits at I
andbook, halfpage
V
Leq=C
RP= internal resistance.
RP= 15.5 kΩ.
REG
× R
LN
SLPE
EE
SLPE
× RP.
L
EQ
V
R
SLPE
20 Ω
ref
= 15 mA.
line
R
P
REGV
C
REG
4.7 µF
R
619 Ω
CC
C
100 µF
MBE788
CC
VCC
Fig.6 VCC supply voltage for peripherals.
2000 Feb 157
Fig.7Equivalent impedance between LN and
VEE.
Page 8
Philips SemiconductorsProduct specification
Low voltage versatile telephone
transmission circuit with dialler interface
SIDETONE SUPPRESSION
The TEA1110A anti-sidetone network comprising
RCC//Z
suppresses the transmitted signal in the earpiece.
Maximum compensation is obtained when the following
conditions are fulfilled:
R
k
Z
bal
The scale factor k is chosen to meet the compatibility with
a standard capacitor from the E6 or E12 range for Z
In practice, Z
thelinelength. Therefore, the value of Z
average line length which gives satisfactory sidetone
suppression with short and long lines. The suppression
also depends on the accuracy of the match between Z
and the impedance of the average line.
The anti-sidetone network for the TEA1110A (as shown in
Fig.13) attenuates the receiving signal from the line by
32 dB before it enters the receiving amplifier. The
attenuation is almost constant over the whole audio
frequency range.
A Wheatstone bridge configuration (see Fig.9) may also
be used.
More information on the balancing of an anti-sidetone
bridge can be obtained in our publication
Handbook for Wired Telecom Systems, IC03b”
number 9397 750 00811.
“Applications
, order
handbook, full pagewidth
LN
R
R
SLPE
CC
SLPE
Z
line
V
EE
R
ast1
I
m
R
ast3
IR
Z
R
ast2
Z
bal
ir
MBE787
Fig.8 Equivalent circuit of TEA1110A family anti-sidetone bridge.
2000 Feb 158
Page 9
Philips SemiconductorsProduct specification
Low voltage versatile telephone
transmission circuit with dialler interface
handbook, full pagewidth
R
R
CC
SLPE
Z
line
V
EE
LN
SLPE
TEA1110A
Z
bal
ast1
IR
Z
ir
R
A
MBE786
I
m
R
Fig.9 Equivalent circuit of an anti-sidetone network in a Wheatstone bridge configuration.
2000 Feb 159
Page 10
Philips SemiconductorsProduct specification
Low voltage versatile telephone
TEA1110A
transmission circuit with dialler interface
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
LN
V
n(max)
I
line
P
tot
T
stg
T
amb
T
j
Note
1. Mostlydependent on the maximum required ambient temperature, on the voltage between LN and SLPE and on the
thermal resistance between die ambient temperature. This thermal resistance depends on the application board
layoutand on the materials used. Figure 12 shows the safe operating area versus this thermal resistance for ambient
temperature T
positive continuous line voltageVEE− 0.412V
repetitiveline voltage during switch-on or
V
− 0.413.2V
EE
line interruption
maximum voltage on all pinsVEE− 0.4VCC+ 0.4V
line currentR
LOW level input voltageVEE− 0.4 −VEE+ 0.3 V
HIGH level input voltageVEE+ 1.5 −VCC+ 0.4 V
input current−1.5−µA
gain reduction for microphone and
MUTE = LOW−80−dB
receiving amplifiers
2000 Feb 1514
Page 15
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2000 Feb 1515
handbook, full pagewidth
APPLICATION INFORMATION
Philips SemiconductorsProduct specification
Low voltage versatile telephone
transmission circuit with dialler interface
a/b
telephone
line
b/a
VDR
95 V
R
protect
10 Ω
4 ×
BAS11
BZX79C10
BSN254
R
limit
3.9 Ω
R
ast1
130 kΩ
R
ast2
3.92 kΩ
C
R
ast3
390 Ω
Z
bal
BC547
GARS
1 nF
C
IR
C
GAR
100 pF
R
SLPE
20 Ω
R
pd1
470 kΩ
BZX79C10
LN
IR
QR
TEA1110A(T)
GAR
MIC+
MIC−
SLPEREGAGC
C
REG
4.7 µF
V
CC
DTMF
MUTE
V
EE
R
CC
619 Ω
signal from
dial and
control circuits
C
VCC
100 µF
supply for
peripheral
circuits
BF473
R
470 kΩ
pd2
BC558
MGG738
R
pd3
1 MΩ
R
pd4
470 kΩ
BC547
R
pd5
470 kΩ
R
68 kΩ
pd6
PD
input
Fig.13 Typical application of the TEA1110A in sets with Pulse Dialling or Flash facilities.
TEA1110A
Page 16
Philips SemiconductorsProduct specification
Low voltage versatile telephone
TEA1110A
transmission circuit with dialler interface
BONDING PAD LOCATIONS FOR TEA1110AUH
All x/y coordinates represent the position of the centre of the pad (in µm) with respect to the origin (x/y = 0/0) of the die
(see Fig.14). The size of all pads is 80 µm × 80 µm.
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
UNIT
mm
inches
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
max.
OUTLINE
VERSION
SOT27-1
A
min.
A
12
max.
IEC JEDEC EIAJ
050G04MO-001SC-501-14
b
1.73
1.13
0.068
0.044
b
0.53
0.38
0.021
0.015
1
cD
0.36
0.23
0.014
0.009
REFERENCES
scale
(1)(1)
19.50
18.55
0.77
0.73
7
EeM
6.48
6.20
0.26
0.24
E
(1)
Z
M
e
L
1
3.60
3.05
0.14
0.12
E
8.25
7.80
0.32
0.31
EUROPEAN
PROJECTION
10.0
8.3
0.39
0.33
H
0.2542.547.62
ISSUE DATE
w
0.010.100.30
95-03-11
99-12-27
max.
2.24.20.513.2
0.0870.170.0200.13
2000 Feb 1517
Page 18
Philips SemiconductorsProduct specification
Low voltage versatile telephone
transmission circuit with dialler interface
SO14: plastic small outline package; 14 leads; body width 3.9 mm
D
c
y
Z
14
8
TEA1110A
SOT108-1
E
H
E
A
X
v M
A
pin 1 index
1
e
02.55 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
A
max.
1.75
0.069
A
0.25
0.10
0.010
0.004
1
A2A
1.45
1.25
0.057
0.049
0.25
0.01
b
3
p
0.49
0.25
0.36
0.19
0.019
0.0100
0.014
0.0075
UNIT
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
(1)E(1)
cD
8.75
8.55
0.35
0.34
7
w M
b
p
scale
eHELLpQZywv θ
4.0
1.27
3.8
0.16
0.050
0.15
6.2
5.8
0.244
0.228
A
2
1.05
0.041
Q
A
1
detail X
1.0
0.7
0.4
0.6
0.028
0.039
0.024
0.016
(A )
L
p
L
0.25
0.010.004
A
3
θ
0.250.1
0.01
(1)
0.7
0.3
0.028
0.012
o
8
o
0
OUTLINE
VERSION
SOT108-1
IEC JEDEC EIAJ
076E06 MS-012
REFERENCES
2000 Feb 1518
EUROPEAN
PROJECTION
ISSUE DATE
97-05-22
99-12-27
Page 19
Philips SemiconductorsProduct specification
Low voltage versatile telephone
transmission circuit with dialler interface
SOLDERING
Introduction
This text gives a very brief insight to a complex
technology. A more in-depth account of soldering ICs can
be found in our
Packages”
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mount components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mount ICs, or for
printed-circuit boards with high population densities. In
these situations reflow soldering is often used.
Through-hole mount packages
SOLDERING BY DIPPING OR BY SOLDER WAVE
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
maybe necessary immediately after soldering to keep the
temperature within the permissible limit.
MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.
“Data Handbook IC26; Integrated Circuit
(document order number 9398 652 90011).
). If the
stg(max)
TEA1110A
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
WAVE SOLDERING
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit
boards with a high component density, as solder bridging
and non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by
a smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint
must be placed at a 45° angle to the transport direction
of the printed-circuit board. The footprint must
incorporate solder thieves downstream and at the side
corners.
During placement and before soldering, the package
must be fixed with a droplet of adhesive. The adhesive
can be applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Surface mount packages
REFLOW SOLDERING
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling
or pressure-syringe dispensing before package
placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling)
vary between 100 and 200 seconds depending on
heating method.
2000 Feb 1519
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
MANUAL SOLDERING
Fix the component by first soldering two
diagonally-oppositeendleads.Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Page 20
Philips SemiconductorsProduct specification
Low voltage versatile telephone
TEA1110A
transmission circuit with dialler interface
When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
Suitability of IC packages for wave, reflow and dipping soldering methods
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wavesoldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
BARE DIE DISCLAIMER
All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of
ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately
indicated in the data sheet. There is no post waffle pack testing performed on individual die. Although the most modern
processes are utilized for wafer sawing and die pick and place into waffle pack carriers, Philips Semiconductors has no
control of third party procedures in the handling, packing or assembly of the die. Accordingly, Philips Semiconductors
assumes no liability for device functionality or performance of the die or systems after handling, packing or assembly of
the die. It is the responsibility of the customer to test and qualify their application in which the die is used.
2000 Feb 1521
Page 22
Philips SemiconductorsProduct specification
Low voltage versatile telephone
transmission circuit with dialler interface
NOTES
TEA1110A
2000 Feb 1522
Page 23
Philips SemiconductorsProduct specification
Low voltage versatile telephone
transmission circuit with dialler interface
NOTES
TEA1110A
2000 Feb 1523
Page 24
Philips Semiconductors – a w orldwide compan y
Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
2000
Internet: http://www.semiconductors.philips.com
69
Printed in The Netherlands403502/03/pp24 Date of release: 2000 Feb 15Document order number: 9397 750 06724
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