Low voltage versatile telephone
transmission circuit with dialler
interface and transmit level
dynamic limiting
Product specification
File under Integrated Circuits, IC03A
March 1994
Page 2
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
FEATURES
• Low DC line voltage; operates down to 1.8 V (excluding
polarity guard)
• Voltage regulator with low voltage drop and adjustable
static resistance
• DC line voltage adjustment facility
• Provides a supply for external circuits
• Dynamic limiting (speech-controlled) in transmit
direction prevents distortion of line signal and sidetone
• Symmetrical high-impedance inputs (64 kΩ) for
dynamic, magnetic or piezo-electric microphones
• Asymmetrical high-impedance input (32 kΩ) for electret
microphones
• DTMF signal input
• Confidence tone in the earpiece during DTMF dialling
• Mute input for disabling speech during pulse or DTMF
dialling
• Power-down input for improved performance during
pulse dial or register recall (flash)
• Receiving amplifier for dynamic, magnetic or
piezo-electric earpieces
• Large amplification setting ranges on microphone and
earpiece amplifiers
• Line loss compensation (line current dependent) for
microphone and earpiece amplifiers (not used for DTMF
amplifier)
• Gain control curve adaptable to exchange supply
• Automatic disabling of the DTMF amplifier in
extremely-low voltage conditions
• Microphone MUTE function available with switch
• MUTE, POWER-DOWN and DTMF input reference (pin
) can be connected either to V
V
EE2
GENERAL DESCRIPTION
The TEA1064B is a bipolar integrated circuit that performs
all the speech and line interface functions required in fully
electronic telephone sets. It performs electronic switching
between dialling and speech. The IC operates at line
voltages down to 1.8 V DC (with reduced performance) to
facilitate the use of more telephone sets connected in
parallel. The transmit signal on the line is dynamically
limited (speech-controlled) to prevent distortion at high
transmit levels of both the sending signal and the sidetone.
REG17voltage regulator decoupling
AGC18automatic gain control input
V
EE2
SLPE20slope adjustment for DC curve/reference for peripheral circuits
11negative line terminal
16internal supply decoupling
19reference for POWER-DOWN (PD), MUTE and DTMF
TEA1064B
handbook, halfpage
DLS/MMUTE
LN
GAS1
GAS2
QR−
QR+
GAR
MIC−
MIC+
STAB
1
2
3
4
5
TEA1064B
6
7
8
9
10
Fig.2 Pin configuration.
March 19945
MBA433
20
SLPE
V
19
EE2
18
AGC
17
REG
V
16
CC
15
PD
MUTE
14
IR
13
DTMF
12
V
11
EE1
Page 6
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
FUNCTIONAL DESCRIPTION
, V
Supplies V
CC
, LN, SLPE, REG and STAB (Figs 3
EE2
and 5)
Power for the TEA1064B and its peripheral circuits is
usually obtained from the telephone line. The IC develops
its own supply voltage at V
and regulates its voltage
CC
drop. The internal supply requires a decoupling capacitor
between VCC and V
set by a 3.6 kΩ resistor between STAB and V
. The internal current stabilizer is
EE1
EE1
.
The DC current flowing into the set is determined by the
exchange supply voltage V
resistance R
, the subscriber line DC resistance R
exch
, the feeding bridge
exch
line
and the DC voltage (including polarity guard) on the
subscriber set (see Fig.3).
The internal voltage regulator generates a
temperature-compensated reference voltage that is
available between LN and SLPE (V
ref
= V
LN-SLPE
= 3.23 V
typ.). This internal voltage regulator requires decoupling
by a capacitor between REG and V
EE1
(C3).
The configuration shown in Fig.3, gives a stabilized
voltage across pins LN and SLPE which, applied via the
low-pass filter R16, C15, provides a supply to the
peripherals that is independant of the line current and
depends only on the peripheral supply current.
The value of R16 and the level of the DC voltage V
determine the supply capabilities. In the basic application
R16 = 392 Ω and C15 = 220 µF. The worst-case
peripheral supply current as a function of supply voltage is
shown in Fig.4.
To increase the supply capabilities, the value of R16 can
be decreased or the DC voltage V
by using R
VA(REG-SLPE)
Note
The TEA1064B application is the same as is used for
TEA1060/TEA1061, TEA1067 and TEA1068 integrated
circuits.
TEA1064B
LN-SLPE
can be increased
LN-SLPE
.
I
CC
Ip + 0.25 mA
V
CC
16
0.25 mA
11
19
V
V
EE1
EE2
handbook, full pagewidth
R
line
R
exch
V
exch
The voltage V
Resistor R16 together with the line current determine the supply capabilities and the maximum output swing on
the line (no loop damping is necessary).
The line voltage V
LN-SLPE
LN=Vref
is fixed to V
+ ({I
= 3.323 ±0.25 V.
ref
− 1.55 mA}× R9).
line
I
line
I
SLPE
TEA1064B
DC
AC
17
REG
C3R5
+ 0.25 mA
10
STAB20SLPE
R1
LN
1
R9
Fig.3 Supply arrangement with reference to SLPE.
R16C1
C15
peripheral
circuits
MBA435
I
p
V
p
March 19946
Page 7
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
MBA436
Vp (V)
handbook, halfpage
(mA)
I
= 15 mA; R16 = 392 Ω; valid for MUTE = 0 and 1.
line
Line current has very little influence.
5
I
p
4
3
2
1
0
2345
R
VA(REG-SLPE)
R
VA(REG-SLPE)
without
= 20 kΩ
TEA1064B
Fig.4Maximum supply current with respect to Fig.3 for peripherals (Ip) as a function of the peripheral supply
voltage (Vp).
I
SLPE
I
line
+ 0.25 mA
STAB
R1
I
CC
LN
116
20
SLPE
V
CC
0.25 mA
11
EE1
V
EE2
C1
peripheral
circuits
MBA432
I
p
handbook, full pagewidth
V
R
exch
exch
R
line
TEA1064B
DC
AC
171019
REGV
C3R5R9
Fig.5 Supply arrangement with reference to V
March 19947
EE1
.
Page 8
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
VCC). MUTE, PD and DTMF are then referenced to V
= 20 kΩ
3
VCC (V)
MBA434
2.4
handbook, halfpage
I
p
(mA)
1.6
0.8
0
(a) Ip= 1.94 mA
= 1.54 mA
(b) I
p
= 0.54 mA
(a′) I
p
= 0.16 mA
(b′)I
p
=15mA
I
line
R1 = 620 Ω and R9 = 20 Ω
Curve (a) and (a′) are valid when the receiving
amplifier is not driven or when MUTE = HIGH.
Curve (b) and (b′) are valid when the receiving
amplifier is driven and when MUTE = LOW.
V
o(RMS)
(a)
(b)
R
VA(REG-SLPE)
(a')
(b')
0124
= 150 mV, RT= 150 Ω.
R
VA(REG-SLPE)
without
Fig.6Maximum current Ipwith respect to Fig.5
available from Vccfor peripheral circuitry
with VCC> 2.2 V.
The maximum AC output swing on the line at low currents
is influenced by R16 (limited by current) and the maximum
output swing on the line at high currents is influenced by
DC voltage V
(limited by voltage). In both these
LN-SLPE
situations, the internal dynamic limiter in the sending
channel prevents distortion when the microphone is
overdriven. The maximum AC output swing on LN is
shown in Fig.7; practical values for R16 are from 200 Ω to
600 Ω and this influences both maximum output swing at
low line currents and the supply capabilities.
When the SLPE pin is the reference for peripheral circuits,
inputs MUTE, PD and DTMF must be referenced to SLPE.
This is achieved by connecting pin V
to pin SLPE; V
EE2
EE2
being the reference of MUTE, PD and DTMF input stages.
Active microphones can be supplied between VCC and
V
as shown in Fig.5. Low power circuits that provide
EE1
MUTE, PD and DTMF inputs to the TEA1064B can also be
powered from VCC (see Fig.6 for the supply capability of
and the pin V
If the line current I
converter shunts the excess current to SLPE via LN;
where ICC≈ 1.3 mA, the value required by the IC for
normal operation.
The DC line voltage on LN is:
• VLN = V
• VLN = V
in which:
• V
= 3.23 V ± 0.25 V is the internal reference voltage
ref
between LN and SLPE; its value can be adjusted by
external resistor RVA.
• R9 = external resistor between SLPE and V
basic operation).
With R9 = 20 Ω, this results in:
• VLN = 3.3 ± 0.25 V at I
• VLN = 4.1 ± 0.3 V at I
• VLN = 4.4 ± 0.35 V at I
R
VA(REG- SLPE)
The preferred value for R9 is 20 Ω. Changing R9
influences microphone gain, DTMF gain, the gain control
characteristics, sidetone and the DC characteristics
(especially the low voltage characteristics).
In normal conditions, I
static behaviour is equivalent to a voltage regulator diode
with an internal resistance of R9. In the audio frequency
range the dynamic impedance is determined mainly by R1.
The equivalent impedance of the circuit in audio frequency
range is shown in Fig.8.
The internal reference voltage V
by external resistor R
REG and SLPE. The voltage V
function of R
voltage influences the output swing of both sending and
receiving amplifiers.
At line currents below 8 mA (typ.), the DC voltage dropped
across the circuit is adjusted to a lower level automatically
(approximately 1.8 V at 2 mA). This gives the possibility of
operating more telephone sets in parallel with DC line
voltages (excluding polarity guard) down to an absolute
minimum of 1.8 V. At line currents below 8 mA (typ.), the
circuit has limited sending and receiving levels.
must therefore be connected to V
EE2
LN-SLPE
+ ({I
ref
line
VA(REG-SLPE)
TEA1064B
exceeds ICC+ 0.25 mA, the voltage
line
+ (I
x R9)
SLPE
− ICC− 0.25 x 10−3 A} x R9)
= 15 mA
line
= 15 mA, R
line
line
= 15mA,
VA(REG-SLPE)
= 20 kΩ
>> (ICC+ 0.25 mA) and the
SLPE
can be increased
LN-SLPE
VA(REG-SLPE)
connected between
is shown as a
LN-SLPE
in Fig.9. Changing the reference
EE1
EE1
.
EE1
(20 Ω in
= 33 kΩ
March 19948
Page 9
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
(mA)
MBA437
handbook, halfpage
L
V
R9
20 Ω
Leq=C3×R9 × R
Rp=15kΩ
p
Fig.8Equivalent impedance between LN and
VEE.
handbook, halfpage
6
V
LN(p-p)
(V)
4
Ip =
2
0
10
R16 = 392 Ω; Ipwith respect to Fig.3.
0 mA
1.4 mA
2.7 mA
2030
I
line
Fig.7Typical AC output swing at total harmonic
distortion (THD) = 2% on the line as a
function of line current with peripheral
supply current as a parameter.
TEA1064B
LN
eq
ref
R
p
REG
C3
4.7 µF
R1
V
C1
MBA438
CC
V
EE1
handbook, full pagewidth
VLN=V
LN-SLPE
+ ({I
− 1.55 × 10−3A} × R9).
line
Fig.9Internal reference voltage V
and 140 mA.
7.8
V
ref
(V)
6.6
5.4
4.2
3.0
08040120
LN-SLPE
as a function of resistor R
RVVA (REG-SLPE) (kΩ)
MBA467
VA(REG-SLPE)
with R
VA
infinite
for line currents between 11 mA
March 19949
Page 10
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
Microphone inputs MIC+ and MIC− and gain pins
GAS1 and GAS2
The TEA1064B has symmetrical microphone inputs, its
input impedance is 64 kΩ (2 x 32 kΩ) and its voltage
amplification is typically 52 dB with R7 = 68 kΩ. Either
dynamic, magnetic or piezo-electric microphones can be
used, or an electret microphone with a built-in FET buffer.
Arrangements for the microphone types are shown in
Fig.10.
handbook, full pagewidth
MIC+
9
(1)
MIC−
8
The gain of the microphone amplifier is proportional to
external resistor R7 connected between GAS1 and GAS2
and with this it can be adjusted between 44 dB and
52 dB to suit the sensitivity of the transducer.
An external 100 pF capacitor (C6) is required between
GAS1 and SLPE to ensure stability. A larger value of C6
may be chosen to obtain a first-order low-pass filter with a
cut-off frequency corresponding to the time constant
R7 x C6.
V
CC
MIC−
MIC+
16
8
9
11
V
EE1
TEA1064B
MIC+
9
MIC−
8
MBA439
(a)(b)
Resistor (1) may be connected to reduce the terminating impedance, or for sensitive types a resistive attenuator
can be used to prevent overloading the microphone inputs.
(c)
Fig.10 Microphone arrangements (a) magnetic or dynamic microphone (b) electret microphone (c) piezo-electric
microphone currents.
March 199410
Page 11
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
Dynamic limiter (microphone) pin DLS/MMUTE
A low level at the DLS/MMUTE pin inhibits the microphone
inputs MIC+ and MIC− but has no influence on the
receiving and DTMF amplifiers.
Removing the low level at the DLS/MMUTE pin provides
the normal function of the microphone amplifier after a
short time determined by the capacitor connected to
DLS/MMUTE pin. The microphone mute function can be
realised by a simple switch as shown in Fig.11.
To prevent distortion of the transmitted signal, the gain of
the sending amplifier is reduced rapidly when peaks of the
signal on the line exceed an internally-determined
threshold. The time in which gain reduction is effected
(attack time) is very short. The circuit stays in the
gain-reduced condition until the peaks of the sending
signal remain below the threshold level. The sending gain
then returns to normal after a a time determined by the
capacitor connected to DLS/MMUTE (release time).
The internal threshold adapts automatically to the DC
voltage setting of the circuit (V
). This means that
LN-SLPE
the maximum output swing on the line will be higher if the
DC voltage dropped across the circuit is increased.
Fig.12 shows the maximum possible output swing on the
line as a function of the DC voltage drop (V
I
− Ip as a parameter.
line
LN-SLPE
) with
The internal threshold level is lowered automatically if the
DC current in the transmit output stage is insufficient. This
prevents distortion of the sending signal in applications
using parallel-connected telephones or telephones
operating over long lines, for example.
Dynamic limiting also considerably improves sidetone
performance in over-drive conditions (less distortion;
limited sidetone level).
handbook, halfpage
10
V
LN(p-p)
(V)
8
6
4
2
R17
3.3 kΩ
Fig.11 Microphone-mute function.
DLS/MMUTE
V
EE1
TEA1064B
7
11
MBA440
MBA464
I
line-Ip
25
23
21
19
17
15
13
11
(mA)
March 199411
0
33.544.55
R16 = 392 Ω.
VLN-V
SLPE
(V)
5.5
Fig.12 Typical output swing on line as a function of
the DC voltage drop V
I
− Ipas a parameter.
line
LN-SLPE
with
Page 12
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
Receiving amplifier IR, QR+, QR− and GAR
The receiving amplifier has one input IR and two
complimentary outputs, QR+ (non-inverting) and QR−
(inverting). These outputs may be used for single-ended or
differential drive, depending on the type and sensitivity of
the earpiece used (see Fig.13). Gain from IR to QR+ is
typically 31 dB with R4 = 100 kΩ, sufficient for
handbook, full pagewidth
11
QR+
5
QR−
4
V
EE
(a)(b)(c)(d)
QR+
5
QR−
4
low-impedance magnetic or dynamic earpieces which are
suitable for single-ended drive. By using both outputs
(differential drive) the gain is increased by 6 dB.
Differential drive can be used when the earpiece
impedance exceeds 450 Ω as with high-impedance
dynamic, magnetic or piezo-electric earpieces.
(1)
QR+
5
QR−
4
TEA1064B
QR+
5
QR−
4
(2)
MBA441
Resistor (1) may be connected to prevent distortion (inductive load).
Resistor (2) is required to increase the phase margin (stability with capacitive load).
Fig.13 Alternative receiver arrangements (a) dynamic earpiece with an impedance less than 450 Ω
(b) dynamic earpiece with an impedance more than 450 Ω
(c) magnetic earpiece with an impedance more than 450 Ω
(d) piezo-electric earpiece.
March 199412
Page 13
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
The output voltage of the receiving amplifier is specified for
continuous-wave drive. Fig.14 shows the maximum output
swing of the receiving amplifier as a function of the DC
voltage drop (VLN). The maximum output voltage will be
higher under speech conditions, where the ratio of the
peak to the RMS value is higher.
The gain of the receiving amplifier can be adjusted to suit
the sensitivity of the transducer used. The adjustment
range is between 20 dB and 39 dB with single-ended drive
and between 26 dB and 45 dB with differential drive. The
gain is proportional to the external resistor R4 connected
between GAR and QR+. The overall gain between LN and
QR+ can be found by subtracting the attenuation of the
anti-sidetone network (32 dB) from the amplifier gain.
Two external capacitors (C4 = 100 pF and C7 = 10 x C4 =
1 nF) ensure stability. A larger value may be chosen to
obtain a first-order low-pass filter. The cut-off frequency
corresponds with time constant R4 x C4. The relationship
C7 = 10 x C4 must be maintained.
1.5
handbook, halfpage
V
QR(rms)
(V)
1.0
0.5
0
346
Valid for both options; THD = 2%, I
Curve (1) is for a differential load of 47 nf (series
resistance = 100 Ω; f = 3400 Hz.
Curve (2) is for a differential load of 450 Ω;
f = 1 kHz.
Curve (3) is for a single-ended load of 150 Ω;
f = 1 kHz.
(1)
(2)
(3)
=15mA.
line
TEA1064B
MLB031
5
VLN (V)
Fig.14 Typical output swing of the receiving
amplifier as a function of DC voltage drop
VLNwith the load at the receiver output as
parameter.
March 199413
Page 14
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
Automatic gain control input AGC
Automatic compensation of line loss is obtained by
connecting a resistor (R6) between AGC and V
EE1
.
This automatic gain control varies the gain of the
microphone amplifier and receiving amplifier in
accordance with the DC line current. The control range is
6.1 dB; this corresponds to a 5 km line of 0.5 dB diameter
copper twisted-pair cable (DC resistance = 176 Ω/km,
average attenuation = 1.2 dB/km). The DTMF gain is not
affected by this feature.
handbook, full pagewidth
0
∆A
vd
(dB)
−2
The value of R6 must be chosen with reference to the
exchange supply voltage and its feeding bridge resistance
(see Fig.15 and Table 1). Different values of R6 give the
same line current ratios at the start and the end of the
control range. If automatic line-loss compensation is not
required the AGC pin can be left open-circuit, the
amplifiers then provide their maximum gain.
R6 =
∞
TEA1064B
MLB030
−4
R6 = 66.5 kΩ
−6
93.1 kΩ
118 kΩ
I
line
(mA)
140120100806040200
Fig.15 Variation of gain as a function of line current with R6 as a parameter; R9 = 20 Ω.
Table 1 V alues of R6 giving optimum line-loss compensation at various values of exchange supply voltage (V
exchange feeding bridge resistance (R
); R9 = 20 Ω
exch
(Ω)
R
exch
4006008001000
R6 (kΩ)
3584.566.5xx
V
exch
(V)
4811893.177.866.5
60xx97.684.5
exch
) and
March 199414
Page 15
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
V
input
EE2
V
is the reference for MUTE, POWER-DOWN and
EE2
DTMF inputs. These signals are referenced to V
generated by peripherals powered between VCC and V
EE1
when
EE1
but they can also be referenced to SLPE when peripherals
are powered as shown in Fig.3. In the first instance
(reference to V
the second instance (reference to SLPE), V
EE1
), V
has to be connected to V
EE2
has to be
EE2
EE1
. In
connected to SLPE.
MUTE input (see notes 1 and 2)
MUTE = HIGH enables the DTMF input and inhibits the
microphone and receiving amplifier inputs.
MUTE = LOW or open-circuit disables the DTMF input and
enables the microphone and receiving amplifier inputs.
Switching MUTE gives negligible clicks at the telephone
outputs and on the line.
Dual-tone multi-frequency input DTMF (see note 1)
When the DTMF input is enabled, dialling tones may be
sent on the line. The voltage gain between DTMF-V
and LN-V
is typically 26.5 dB less than the gain of the
EE1
EE2
microphone amplifier and varies with R7 in the same way
as the gain of the microphone amplifier. This means that
the tone level at the DTMF input has to be adjusted after
setting the gain of the microphone amplifier.
With R7 = 68 kΩ the gain is typically 25.5 dB.
The signalling tones can be heard in the earpiece at a low
level (confidence tone).
Power-down input PD (see notes 1. and 2.)
During pulse dialling or register recall (timed loop break)
the telephone line is interrupted; as a consequence it
provides no supply for the transmission circuit connected
to V
or for the peripherals between VLN and SLPE.
CC
These supply gaps are bridged by the charges in the
capacitors C1 and C15. The requirements on these
capacitors are eased by an applied HIGH level to the PD
input during the time of the loop break. This reduces the
internal supply current I
from 1.3 mA (typ.) to 60 µA
CC1
(typ.) and switches off the voltage regulator to prevent
discharge via LN to V
CC2
.
A HIGH level at PD also internally disconnects the
capacitor at REG so that the voltage stabilizer has no
switch-on delay after line interruptions. This minimizes the
contribution of the IC to the current waveform during pulse
,
dialling or register recall.
When the power-down facility is not required, the PD pin
can be left open-circuit or connected to V
Sidetone suppression
Suppression of the transmitted signal in the earpiece is
obtained by the anti-sidetone network comprising R1//Z
R2, R3, R8, R9 and Z
compensation is obtained when the following conditions
are fulfilled:
(a) R9 x R2 = R1 x (R3 + {R8//Z
(b) (Z
bal
/{Z
bal
+ R8}) = (Z
If fixed values are chosen for R1, R2, R3 and R9, then
condition (a) is always fulfilled provided R8//Z
To obtain optimum sidetone suppression, condition (b) has
to be fulfilled, resulting in:
Z
= (R8/R1) x Z
bal
Where k is a scale factor; k = (R8/R1).
The scale factor k (value of R8) is chosen to meet the
following criteria:
• compatibility with a standard capacitor from the E6 or
E12 range for Z
• Z
//R8 << R3 to fulfil condition (a) and thus ensure
bal
correct anti-sidetone bridge operation
• Z
In practise Z
+ R8 >> R9 to avoid influencing the transmit gain
bal
varies considerably with the line length and
line
line type. Therefore the value chosen for Z
an average line length giving satisfactory sidetone
suppression with short and long lines. The suppression
also depends on the accuracy of the match between Z
and the impedance of the average line.
(see Fig.16). Maximum
bal
bal
/{Z
line
line
= k x Z
line
bal
line
TEA1064B
EE2
})
+ R1})
bal
.
line
<< R3
bal
should be for
bal
,
March 199415
Page 16
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
EXAMPLE
The line impedance for which optimum suppression is to
be obtained can be represented by 210 Ω+
(1265 Ω //140 nF). This represents a 5 km line of 0.5 mm
diameter copper twisted-pair cable matched with 600 Ω
(176 Ω/km; 38 nF/km).
With k = 0.64 this results in : R8 = 390 Ω;
Z
= 130 Ω+ (820 Ω//220 nF).
bal
The anti-sidetone network for the TEA1060 family shown
in Fig.16 attenuates the signal received from the line by
32 dB before it enters the receiving amplifier. The
attenuation is almost constant over the whole
audio-frequency range.
handbook, full pagewidth
LN
Alternatively a conventional Wheatstone bridge can be
used as an anti-sidetone circuit (see Fig.17). Both bridge
types can be used with either resistive or complex set
impedances. (More information on the balancing of
anti-sidetone bridges can be obtained in our publication
“Versatile speech transmission ICs for electronic
telephone sets”
, order number 9398 341 10011).
Notes
1. The reference level used for the MUTE, DTMF and PD
inputs is V
EE2
2. A LOW level for any of these pins is defined by
connection to V
voltage greater than V
VCC+ 0.4 V.
TEA1064B
.
, a HIGH level is defined as a
EE2
+ 1.5 V and smaller than
EE2
handbook, full pagewidth
Z
line
V
EE2
R1
R9
SLPE
R2
i
m
R3
R8
IR
R
t
Z
bal
MBA465
Fig.16 Equivalent circuit of TEA1060 family anti-sidetone bridge.
LN
Z
line
V
EE2
R1
R9
Z
bal
i
m
R8
IR
R
t
R
A
SLPE
Fig.17 Equivalent circuit of an anti-sidetone network in the Wheatstone bridge configuration.
March 199416
MBA466
Page 17
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
TEA1064B
with dialler interface and transmit level dynamic limiting
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
V
V
I
V
P
T
T
T
LN
LN
LN
LN
i
tot
amb
stg
j
positive line voltage continuous−12V
repetitive line voltage during
−13.2V
switch-on line interruption
repetitive peak line voltage one 1 ms
controlling the gain from
IR (pin 13) to QR+, QR−
(pins 4, 5) and the gain from
MIC+, MIC− (pins 8, 9) to LN (pin 1)
G
I
v
line
gain control range with respect to
I
=15mA
line
highest line current for maximum
gain
I
line
lowest line current for minimum
gain
∆G
v
Microphone mute input DLS/
V
IL
I
IL
change of gain between
I
= 15 and 35 mA
line
MMUTE (pin 7)
LOW level input voltageV
input current at LOW level input
voltage
t
rel
release time after a LOW level on
pin 7
∆G
v
change of microphone amplifier
gain at LOW level input voltage
on pin 7
MUTE = HIGH−−100−dB
MUTE = HIGH;
single-ended load;
RL= 300 Ω
R6 = 93.1 kΩ
(between pins 18 and
11)
I
=75mA−5.7−6.1−6.5dB
line
C16 = 470 nF−30−ms
−11−+8dB
−VCC+0.4V
EE2
V
EE2
−−18−dB
EE2
−V
CC1
+0.4 V
EE2
V
−24−mA
−61−mA
−0.9−1.4−1.9dB
EE1
−V
EE1
+0.3 V
−85−60−35µA
−−100−dB
March 199422
Page 23
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March 199423
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
handbook, full pagewidth
I
p
C1
C15
220
µF
V
i
100 µF
10
µF
V
i
13
IR
9
MIC+
8
MIC−
12
DTMF
14
MUTE
15
PD
7
DLS/MMUTE
C16
470 nF
R16
392 Ω
R1
620 Ω
161
V
CC
TEA1064B
V
EE2VEE1
REG AGC STAB
C3
4.7
µF
I
line
LN
SLPE
18171119
1020
R5
3.6
R6
kΩ
QR−
QR+
GAR
GAS1
GAS2
R9
20 Ω
4
5
6
2
3
R4
100
kΩ
R7
68
kΩ
100 µF
R
600 Ω
C4
100 pF
C7 1 nF
C6
100 pF
V
o
L
11 to
140 mA
MBA443
For measuring gain from MIC+ and MIC− the MUTE input should be LOW or open-circuit.
For measuring the DTMF input, the MUTE input should be HIGH.
Inputs not being tested should be open-circuit.
Fig.20 Test circuit for defining voltage gain of MIC−, MIC+ and DTMF inputs; voltage gain (Gv) is defined as 20log Vo/Vi.
TEA1064B
Page 24
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March 199424
R16
392 Ω
R2
100 nF
100
C1
µF
V
i
I
p
C15
220
µF
R5
3.92 kΩ
130 Ω
820
Ω
220
nF
R8
390
Ω
130 kΩ
S1
2
1
10
µF
13
9
8
12
14
15
7
C16
470 nF
V
IR
MIC+
MIC−
DTMF
MUTE
PD
DLS/MMUTE
CC
V
EE2VEE1
R1
620 Ω
161
LN
TEA1064B
REG AGC STAB
1020
18171119
C3
4.7
µF
R6
R5
3.6
kΩ
GAS1
GAS2
SLPE
QR−
QR+
GAR
R9
20 Ω
4
Z
V
T
5
R4
kΩ
R7
68
kΩ
C4
100 pF
C7 1 nF
C6
100 pF
100
6
2
3
I
line
100 µF
o
R
L
600 Ω
11 to
140 mA
MBA444
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
handbook, full pagewidth
Fig.21 Test circuit for defining voltage gain of the receiving amplifier; voltage gain (Gv) is defined as 20logVo/Vi (with S1 in position 1).
TEA1064B
Page 25
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k,
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March 199425
telephone
line
BAS11
(2×)
BZW14
(2×)
R10
13 Ω
R3
3.92 kΩ
R2
130 kΩ
R4
100 kΩ
Z
bal
C7
R8
390 Ω
C5
100 nF
R13
1 nF
C4
100 pF
R14
116
R9
LN
SLPE
C6
100 pF
13
IR
4
QR−
5
QR+
6
GAR
9
MIC+
8
MIC−
20 Ω
full pagewidth
R1
620 Ω
TEA1064B
REGGAS2GAS1
173220
R7
68
C3
kΩ
4.7
µF
392 Ω
V
CC
AGC STAB
1810
R6
R16
DTMF
MUTE
DLS/MMUTE
V
V
EE1
11
R5
3.6
kΩ
PD
EE2
C1
100 µF
12
14
15
C15
220 µF
+
from dial
and
control circuits
−
7
19
R17
3.3 kΩ
C16
470
nF
APPLICATION INFORMATION
The basic application circuit is shown in Fig.22 and a typical application is shown in Fig.23.
with dialler interface and transmit level dynamic limiting
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
MBA445
The diode bridge and R10 limit the current into, and the voltage across, the circuit during line transients.
A different protection arrangement is required for pulse dialling or register recall.
Fig.22 Basic application of TEA1064B with SLPE as supply reference for peripherals, shown here with piezo-electric earpiece and
DTMF dialling.
TEA1064B
Page 26
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
handbook, full pagewidth
telephone
line
cradle
contact
TEA1064B
V
EE1
BSN254A
LN
SLPE
DTMF
MUTE
V
EE2
PD
V
DTMF
M
FL
V
SS
DD
TEA1064B
PCD3310
MBA446
The broken line indicates optional flash (register recall by timed loop break).
Fig.23 Typical DTMF-pulse set application circuit (simplified) showing the TEA1064B with the CMOS bilingual
dialling circuit PCD3310.
March 199426
Page 27
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
A
A
UNIT
inches
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
max.
mm
OUTLINE
VERSION
SOT146-1
12
min.
max.
1.73
1.30
0.068
0.051
IEC JEDEC EIAJ
b
b
1
0.53
0.38
0.021
0.015
0.36
0.23
0.014
0.009
REFERENCES
cD E eM
(1)(1)
26.92
26.54
1.060
1.045
SC603
6.40
6.22
0.25
0.24
E
10
(1)
1
3.60
3.05
0.14
0.12
8.25
7.80
0.32
0.31
EUROPEAN
PROJECTION
H
E
10.0
0.2542.547.62
8.3
0.39
0.010.100.30
0.33
ISSUE DATE
92-11-17
95-05-24
M
L
e
Z
w
max.
2.04.20.513.2
0.0780.170.0200.13
March 199427
Page 28
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
SO20: plastic small outline package; 20 leads; body width 7.5 mm
D
c
y
Z
20
11
TEA1064B
SOT163-1
E
H
E
A
X
v M
A
pin 1 index
1
e
0510 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
A
max.
2.65
0.10
A
1
0.30
0.10
0.012
0.004
A2A3b
2.45
0.25
2.25
0.096
0.01
0.089
p
0.49
0.36
0.019
0.014
cD
0.32
0.23
0.013
0.009
UNIT
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
10
w M
b
p
scale
(1)E(1)(1)
13.0
12.6
0.51
0.49
eHELLpQ
7.6
1.27
7.4
0.30
0.050
0.29
10.65
10.00
0.419
0.394
Q
A
2
0.055
A
1.4
1
detail X
1.1
1.1
1.0
0.4
0.043
0.043
0.039
0.016
(A )
L
p
L
0.25
0.01
A
3
θ
0.250.1
0.01
0.004
ywvθ
Z
0.9
0.4
0.035
0.016
o
8
o
0
OUTLINE
VERSION
SOT163-1
IEC JEDEC EIAJ
075E04 MS-013AC
REFERENCES
March 199428
EUROPEAN
PROJECTION
ISSUE DATE
95-01-24
97-05-22
Page 29
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
“Data Handbook IC26; Integrated Circuit Packages”
our
(order code 9398 652 90011).
DIP
S
OLDERING BY DIPPING OR BY WAVE
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
R
EPAIRING SOLDERED JOINTS
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
SO
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
stg max
). If the
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
AVE SOLDERING
W
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
EPAIRING SOLDERED JOINTS
R
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
TEA1064B
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
March 199429
Page 30
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
TEA1064B
with dialler interface and transmit level dynamic limiting
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
March 199430
Page 31
Philips SemiconductorsProduct specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
NOTES
TEA1064B
March 199431
Page 32
Philips Semiconductors – a worldwide company
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
Printed in The Netherlands415102/00/02/pp32 Date of release: March 1994Document order number: 9397 750 nnnnn
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