The TDE1708DFT is an integrated power switch
with up to 48 V power supply capability. Two
output configurations are possible:
Load to GND (high side mode)
Load to V
Especially dedicated to proximity detectors, its
internal +5 V supply can be used to supply
external circuits (See also AN495).
(low side mode)
S
TDE1708DFT
Intelligent power switch
DFN (4x4)
A signal is internally generated to block the In
signal, and prevent activation of the output switch,
as long as an abnormal condition is detected. The
power-on transition, as well as the chip over
temperature and the output overcurrent, concur to
the generation of such signal. A minimum delay of
25 ms (Typ. value) is added to the trailing edge of
such signal to ensure that a stable normal
situation is present when the signal disappears.
The delay (of the disappearance of the block
signal; no delay at its on set) can be further
increased connecting a capacitor between pin3
and ground. It can drive resistive or inductive
loads.
The LED driver tells the output status. It can source or sink current (I
old typ
= 3 mA),
according to the output configuration chosen. The thresholds, represented by the output
comparator in the block diagram, are set at about 1.5 V - 2 V.
For instance, in the high side load case of the Application Circuit, when the voltage on pin 8
(the output) differs from V
less than 1.5 V, the output is sensed in “OFF” state and the
CC
LED driver is disabled.
If instead pin 8 differs from V
more than 3 V (the output comparator threshold value plus
CC
the drop voltage on the LED), then the output is sensed “ON” and the driver will force the
current on the LED.
Figure 3.Low side driver topologyFigure 4.High side driver topology
TDE1708DFT
TDE1708DFTDE1708DFT
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TDE1708DFTApplication information
3.1 Adjustable input hysteresis circuit
The TDE1708DFT is a device realized in bipolar technology and therefore it has the usual
problems of temperature compensation that such technology involves; despite all it
maintains an input dynamics within 1 V over industrial temperatures range.
In all input voltage range it will guarantee a high impedance of 1 MΩ determining an input
current about 2 µA.
Exploiting this input high impedance is possible connects a sensor directly on it and bypass
the obstacle of active signal conditioning circuit using a voltage firm point as ground of
sensor, the delay capacitor, connected on the pin 3, as low pass filter and capacitor on Vreg
pin to minimize the noise on it and protect for errors the low-voltage internal circuits,
according AN495.
In Figure 5. the input external network is optimized for accepting both a sensor with ground
connected to the body and a sensor with independent ground.
In order to ground the body of the sensor, J1 has to be shorted, while J2 opened and
connect the sensor on M3; in case of independent ground J1 must be opened, J2 shorted
and the sensor connected on M4.
DL1 indicate commutation status of the device output and C3 realize a simple output filtering
in case is used an inductive load. With C2 about 10 nF we obtain a good filtering and
immunity from input voltage noise. C4 is 4,7nF according AN495.
R2 is an optional resistor plugged only when the sensor needs to adapt its impedance with
the input impedance of device.
Figure 5.Application circuit for adjustable input hysteresis
TDE1708DFT
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Page 10
Package mechanical dataTDE1708DFT
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.
4.1 Foot print recommended
Figure 6.Foot print
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Page 11
TDE1708DFTPackage mechanical data
4.2 DFN (4x4) mechanical data and package dimensions
Table 7.Package dimensions
mm
Dim.
TypMi nMa x
A0.900.801
A10.0200.05
A30.20
b0.300.230.38
D43.904.10
D232.823.23
E43.904.10
E22.202.30
e0.80
L0.500.400.60
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Package mechanical dataTDE1708DFT
Figure 7.Package dimension
Sitting plane
Bottom viewTo p vi ew
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Page 13
TDE1708DFTRevision history
5 Revision history
Figure 8.Document revision history
DateRevisionChanges
26-Jun-20061Initial release.
31-Oct-20062
Updated package in cover page, inserted low/high side I
5.
in Ta b le
SC
09-Jan-20073Updated I
27-Feb-20094Updated cover page
in Table 5 on page 6.
SCHS
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TDE1708DFT
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