Datasheet tda9901 DATASHEETS (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA9901

Wideband differential digital
controlled variable gain amplifier

Product specification
Supersedes data of 1998 Apr 15
File under Integrated Circuits, IC02

1999 Oct 08

Philips Semiconductors Product specification

Wideband differential digital controlled
variable gain amplifier

FEATURES

• 130 MHz, −3 dB small signal bandwidth

• Digitally controlled gain

• TTL/CMOS compatible digital inputs (3.3 or 5 V)

• TTL single ended or differential clock input with PECL

compatibility

• 24 dB gain control range

• Five steps of 6 dB plus 6 dB fixed gain

• 30 dB gain maximum

• High impedance differential inputs

• Low impedance differential outputs

• High power supply rejection

• 125 nV/√Hz output voltage noise density at 30 dB gain

• Fast gain settling

• Dual control modes: transparent or latched.

TDA9901

GENERAL DESCRIPTION

The TDA9901 is a wideband, low noise amplifier with
differential inputs andoutputs. TheTDA9901 incorporates
an AGC function with digital control. The TDA9901 is
optimized for fast switching between different gain
settings, preserving small phase and amplitude error.

The TDA9901 presents an excellent combination of low
noise and good linearity for a wide input frequency range.

The TDA9901 is optimized for processing IF signals in
GSM base stations. It is also suited for many other
applications as a general purpose digitally controlled
variable gain amplifier.

The TDA9901 is able to operate from 4.75 to 5.25 V
supply for the analog part and from 3.0 to 5.25 V for the
digital part.

APPLICATIONS

• Linear AGC systems

• IF amplifierin IF conversion systems (e.g. base stations

or satellite receivers)

• Instrumentation

• Multi-purpose amplifier

• Driver for differential ADCs (e.g. TDA8768).

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V
V
I

DDA

I

DDD

G

DDA
DDD

dif

analog supply voltage 4.75 5.0 5.25 V
digital supply voltage 3.0 3.3 5.25 V
analog supply current − 30 36 mA
digital supply current − 3.0 5.0 mA
differential gain minimum gain 5.7 6.11 6.46 dB

maximum gain 29.3 30.5 31.5 dB

B

P

−3dB

tot

−3 dB small signal bandwidth V

o(dif)(p-p)

T

amb

= 0.125 V;

=25°C

110 130 − MHz

total power dissipation − 160 216 mW

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

TDA9901TS SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1

1999 Oct 08 2

Philips Semiconductors Product specification

Wideband differential digital controlled
variable gain amplifier

BLOCK DIAGRAM

handbook, full pagewidth

INN

CMVGA

V

DDD

6

IN

7

TE

18

2

REFERENCE
GENERATOR

V

DDA

GRAY2

11

GRAY1

19

DECODER

LATCHES

0, 6, 12, 18 or 24 dB

GRAY0

20

8, 9, 10, 13

n.c.

CLK3CLKN

1

REFERENCE
GENERATOR

4

TDA9901

6 dB

12

V

SSA

V

SSD

17

MGM962

TDA9901

15

OUT

14

OUTN

165

CMADC

Fig.1 Block diagram.

1999 Oct 08 3

Philips Semiconductors Product specification

Wideband differential digital controlled
variable gain amplifier

PINNING

SYMBOL PIN DESCRIPTION

GRAY0 1 digital control signal bit 0 input

(LSB)
TE 2 transparent enable input
CLK 3 clock input for gain control setting
CLKN 4 inverting clock input for gain

control setting (active low)
CMVGA 5 regulator output common mode

VGA input
IN 6 non-inverting analog input
INN 7 inverting analog input (active low)
n.c. 8 not connected
n.c. 9 not connected
n.c. 10 not connected
V

DDA

V

SSA

n.c. 13 not connected
OUTN 14 inverting analog output (active low)
OUT 15 non-inverting analog output
CMADC 16 regulator output common mode

V

SSD

V

DDD

GRAY2 19 digital control signal bit 2 input

GRAY1 20 digital control signal bit 1 input

11 analog supply voltage
12 analog ground

ADC input

17 digital ground
18 digital supply voltage

(MSB)

handbook, halfpage

GRAY0

CMVGA

TE

CLK

CLKN

INN

n.c.
n.c.
n.c.

IN

10

1
2
3
4
5

TDA9901TS

6
7
8
9

MGM963

Fig.2 Pin configuration.

TDA9901

GRAY1

20
19

GRAY2
V

18

DDD

V

17

SSD

16

CMADC
OUT

15

OUTN

14

n.c.

13

V

12

SSA

V

11

DDA

FUNCTIONAL DESCRIPTION

The TDA9901 provides a digitally controlled variable gain function for high-frequency applications.
The TDA9901 can beoperated in two different modes, depending onthe value at pin TE. When TE is at logic 1, the gain

can be instantly controlled when the clock signal is HIGH (transparent mode). The gain is fixed during the LOW period
of the clock. When TE is at logic 0 the gain of the TDA9901 is changed at the rising edge of the clock signal.

1999 Oct 08 4

Philips Semiconductors Product specification

Wideband differential digital controlled

TDA9901

variable gain amplifier

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER MIN. MAX. UNIT

V

DDA

V

DDD

∆V

DD

V

I

I

O

T

stg

T

amb

T

j

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

analog supply voltage −0.3 +7.0 V
digital supply voltage −0.3 +7.0 V
supply voltage difference between V

DDA

and V

DDD

−1.0 +4.0 V
input voltage level −0.3 +7.0 V
output current − 10 mA
storage temperature −55 +150 °C
ambient temperature −40 +85 °C
junction temperature − 150 °C

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air 120 K/W

CHARACTERISTICS

V

DDA=V11

T

amb

to V12= 4.75 to 5.25 V; V

DDD=V18

to V17= 3.0 to 5.25 V; V

= −40 to +85 °C; typical values measured at V

DDA

= 5.0 V; V

SSA

= 3.3 V and T

DDD

and V

shorted together;

SSD

=25°C; unless otherwise

amb

specified; note 1.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies

V
V
∆V

I

DDA

I

DDD

DDA
DDD

DD

analog supply voltage 4.75 5.0 5.25 V
digital supply voltage 3.0 3.3 5.25 V
voltage difference

between V

DDA

and V

DDD

−0.2 − +2.5 V

analog supply current − 30 36 mA
digital supply current − 3.0 5.0 mA

Variable gain amplifier transfer characteristics

B

t

−3dB

d(g)

−3 dB small signal
bandwidth

V

o(dif)(p-p)

T

amb

= 0.125 V;

=25°C

group delay time up to fi= 20 MHz;

110 130 − MHz

− 2.5 − ns
minimum gain;
T

=25°C

amb

∆t

d(g)

group delay difference 6 dB gain step;

T

=25°C

amb

−−300 ps

1999 Oct 08 5

Philips Semiconductors Product specification

Wideband differential digital controlled

TDA9901

variable gain amplifier

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

t

st

G

step

G

(min)

G

(max)

∆G/∆T gain stability as a function

|∆G/∆VDD| gainstability as a function

∆V

i(offset)

F noise figure R

V

n(o)(eq)

PSRR

(VDDA)

PSRR

(VDDD)

CMRR common mode rejection

settling time 10 to 90% maximum

output transition;
C

L(max)

= 5 pF on
each output;
T

=25°C

amb

gain step size DC input

T

=25°C 5.88 6.09 6.28 dB

amb

all temperatures 5.6 6.09 6.56 dB

minimum gain setting DC input

T

=25°C 5.76 6.11 6.40 dB

amb

all temperatures 5.7 6.11 6.46 dB

maximum gain setting DC input

T

=25°C 29.9 30.5 30.9 dB

amb

all temperatures 29.3 30.5 31.5 dB

minimum gain −−1.0 − mdB/°C

of temperature

maximum gain −−7.5 − mdB/°C
minimum gain − 15 25 mdB/V

of power supply
input offset voltage

6 dB gain step − 0.8 − mV

difference

= 100 Ω;

s

fi= 20 MHz

minimum gain − 29.1 − dB
maximum gain − 9.9 − dB

equivalent output noise
voltage spectral density

Rs= 100 Ω;
fi= 20 MHz;
T

=25°C

amb

G=6dB − 75 − nV/√Hz
G = 12 dB − 82 − nV/√Hz
G = 18 dB − 97 − nV/√Hz
G = 24 dB − 91 − nV/√Hz
G = 30 dB − 124 − nV/√Hz

power supply ripple
rejection of V

DDA

minimum gain

0to20MHz − 57 − dB
20 to 100 MHz − 39 − dB

power supply ripple
rejection of V

DDD

minimum gain dB

0to20MHz − 67 − dB
20 to 100 MHz − 51 − dB

0to20MHz − 75 − dB

ratio

20 to 150 MHz − 45 − dB

−−3.6 ns

1999 Oct 08 6

Philips Semiconductors Product specification

Wideband differential digital controlled

TDA9901

variable gain amplifier

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Analog inputs

V

i(max)(p-p)

maximum input voltage
(peak-to-peak value)

V

i(cm)

common mode input
voltage

I

i

R

i

C

i

input current V
input resistance 10 −−kΩ

input capacitance −−5pF
Analog outputs; note 2
V

o(max)(p-p)

maximum differential

output voltage

(peak-to-peak value)

V

o(cm)

common mode output

voltage
∆V

/∆T common mode output

o(cm)

voltage variation with

temperature

SR

o(se)

single-ended output slew

rate
R

o

C

o

output resistance − 15 26 Ω

output capacitance − 3 − pF
Variable gain amplifier dynamic performance; CL= 5 pF; RL= 680 Ω (see Figs 6, 7, 8, 9 and 10)

minimum gain − 1.0 − V
maximum gain − 60.4 − mV

2.0 2.7 V

= 2.7 V − 55 −µA

i(cm)

DDA

− 1.9 V

maximum gain 2.0 −−V
minimum gain 2.0 −−V

referenced to V
T

=25°C

amb

DDA

;

V

DDA

− 2.56 V

DDA

− 2.42 V

DDA

− 2.29 V

−−1.8 − mV/°C

− 275 − V/µs

HD

2

HD

3

∆HD

/∆T 3rd harmonic distortion

3

2nd harmonic distortion Vo=V

3rd harmonic distortion Vo=V

variation with temperature

Reference voltage output ADC: pin CMADC

V

ref(CMADC)

ADC reference output

voltage
R

o(CMADC)

∆V

ref(CMADC)

output resistance T

/∆T ADC reference output

voltage variation with

temperature

o(max)

fi= 0.5 MHz −−80 −67 dBc
f

= 4.43 MHz −−77 −67 dBc

i

f

= 12.5 MHz −−76 −65 dBc

i

f

= 21.4 MHz −−74 −62 dBc

i

;

o(max)

T

=25°C

amb

f

= 0.5 MHz −−64 −60 dBc

i

f

= 4.43 MHz −−64 −59 dBc

i

= 12.5 MHz −−62 −58 dBc

f

i

f

= 21.4 MHz −−61 −57 dBc

i

fi= 21.4 MHz − 80 − mdB/°C

referenced to V
T

=25°C

amb

=25°C − 17 26 Ω

amb

DDA

;

V

DDA

− 1.64 V

DDA

− 1.45 V

DDA

− 1.26 V

−−0.11 − mV/°C

1999 Oct 08 7

Philips Semiconductors Product specification

Wideband differential digital controlled

TDA9901

variable gain amplifier

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I

o(CMADC)(max)

C

o(CMADC)

Reference voltage output VGA: pin CMVGA

V

ref(CMVGA)

R

o(CMVGA)

∆V

ref(CMVGA)

I

o(CMVGA)(max)

C

o(CMVGA)

Gain switching characteristics (in latched mode); f

t

h

t

su

t

W

t

PD1

t

set1

Gain switching characteristics (in transparent mode); f

t

PD2

t

set2

Clock timing input: pins CLK and CLKN (see Fig.3)
f

CLK(max)

t

CPL

t

CPH

t

r

t

f

Digital inputs: pins TE, GRAY0, GRAY1 and GRAY2

V

IL

V

IH

I

IH

I

IL

C

i

Clock inputs in TTL mode

V

IL

V

IH

I

IH

I

IL

maximum output current − 1.0 − mA

output capacitance − 3 − pF

VGA reference output

voltage

output resistance T

/∆T VGA reference output

referenced to V
T

=25°C

amb

=25°C − 920Ω

amb

DDA

;

V

DDA

− 2.48 V

DDA

− 2.30 V

DDA

− 2.17 V

− 1.75 − mV/°C

voltage variation with

temperature

maximum output current − 1.0 − mA

output capacitance − 3 − pF

= 52 MHz; T

CLK

=25°C; (see Fig.3)

amb

input data hold time 2.0 −−ns

input data set-up time 3.8 −−ns

input data pulse width 5.8 −−ns

propagation delay time − 4.2 5.9 ns

gain settling time 10 to 90% full scale

− 2.6 3.2 ns
if ±6 dB gain
change; note 3

= 52 MHz; T

CLK

=25°C; (see Fig.4)

amb

propagation delay time − 6.7 9.5 ns
gain settling time 10 to 90% full scale

− 5.4 6.9 ns
if ±6 dB gain
change; note 4

maximum clock frequency 52 −−MHz
clock LOW pulse width 4.0 −−ns
clock HIGH pulse width 4.0 −−ns
rise time − 4 − ns
fall time − 4 − ns

LOW-level input voltage 0 − 0.8 V
HIGH-level input voltage 2.0 − V

DDD

HIGH-level input current −10 − +10 µA
LOW-level input current −10 − +10 µA
input capacitance −−3pF

LOW-level input voltage note 5 0 − 0.8 V
HIGH-level input voltage note 5 2.0 − V

DDD

HIGH-level input current 15 − 80 µA
LOW-level input current −40 −−10 µA

V

V

1999 Oct 08 8

Philips Semiconductors Product specification

Wideband differential digital controlled

TDA9901

variable gain amplifier

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

C

i

Clock inputs in differential mode

V

IL

V

IH

I

IH

I

IL

C

i

∆V

i(CLK )(p-p)

Notes

1. Due to on-chip regulator behaviour a warm-up time of 1 minute (typical) is recommended for optimal performance.

2. The analog output voltages are positive with respect to AGND.

3. In latching mode (TE = 0), the gain settling is latched at the rising edge of the clock input.

4. In transparent mode, the gain settling is directly controlled by the input data pattern.

5. The circuit may be used with a single TTL clock on CLK or CLKN. The non used clock pin has to be decoupled to
ground with a 100 nF capacitance.

6. There are four modes of operation for the clock inputs in non TTL mode:
a) PECL mode 1: (DC level vary 1 : 1 with V
b) PECL mode 2: (DC level vary 1 : 1 with V

rising edge of the clock input signal when in latched mode. A DC level of 3.65 V has to be applied on CLKN
decoupled to V

c) PECL mode 3: (DC level vary 1 : 1 with V

rising edge of the clock input signal when in latched mode. A DC level of 3.65 V has to be applied on CLK
decoupled to V

d) AC driving mode 4: when driving the CLK input directly and with any AC signal of minimum 0.1 V (p-p) and with

a DC level of 2.5 V, the gain change takes place on the rising edge of the clock signal. When driving the CLKN
input with the same signal, gain change takes place on the falling edge of the clock signal. It is recommended to
decouple the CLKN or CLK input to V

input capacitance −−2pF

LOW-level input voltage V
HIGH-level input voltage V

= 5.0 V; note 6 3.19 − 3.52 V

DDA

= 5.0 V; note 6 3.83 − 4.12 V

DDA

HIGH-level input current 15 − 80 µA
LOW-level input current −40 −−5µA
input capacitance −−2pF
differential AC input

voltage for switching

DC voltage
level = 2.5 V

0.1 − 2.0 V

CLK or CLKN
(peak-to-peak value)

) CLK and CLKN inputs are differential PECL levels.

DDA

) CLK input is at PECL level and gain change takes place on the

DDA

via a 100 nF capacitor.

SSD

) CLKN input is at PECL level and gain change takes place on the

DDA

via a 100 nF capacitor.

SSD

via a 100 nF capacitor.

SSD

Table 1 Input coding

GREY INPUT DATA CODE

STATE

D2 D1 D0

0000minimum
1001minimum + 6
2011minimum + 12
3010minimum + 18
4110minimum + 24

Other −−−minimum + 24

1999 Oct 08 9

GAIN (dB)

Philips Semiconductors Product specification

Wideband differential digital controlled
variable gain amplifier

handbook, full pagewidth

CLK

GRAY0
GRAY1
GRAY2

OUT

and

OUTN

t

PD1

t

r

t

su

t

CPH

gain N

t

set1

t

f

t

h

gain N

t

CPL

gain N + 1

gain N + 1

50 %

50 %

90 %
10 %

MGM964

LOW

HIGH

LOW

HIGH

V

o(max)

0.5V

0 V

TDA9901

o(max)

handbook, full pagewidth

GRAY0
GRAY1
GRAY2

OUT

and

OUTN

Fig.3 Latched mode timing diagram.

gain N + 1

gain N + 1

t

PD2

gain N

t

set2

gain N

50 %

90 %
10 %

MGM965

LOW

HIGH

V

o(max)

0.5V

0 V

o(max)

Fig.4 Transparent mode timing diagram with CLK HIGH.

1999 Oct 08 10

Philips Semiconductors Product specification

Wideband differential digital controlled
variable gain amplifier

handbook, full pagewidth

FILTER

sine wave
generator

(1) C1 and C2 represent the board line capacitance. They represent about 5 pF with the TDA8768 input capacitance. Special

care has to be taken to minimize this load in order to have the best dynamic performance.

(2) The HD

(3) The chain measurement shows the harmonic distortion of the TDA9901 as the measurement from TDA8768 is negligible.

and HD3of the TDA8768 is lower than that measured on the TDA9901.This measurement method is preferred to

2

conventional methods due to its low contribution to the HD

100 Ω

CMVGA OUT

100
nF

5

IN

6

TDA9901TS

100

Ω

7

INN OUTN

.

2

15

14

47 nF

680 Ω

680 Ω

47 nF

dB

V

i

42

(1)

C1

V

i

43

(1)

C2

(2)
(3)

TDA8768

(ADC)

36

CLK

TDA9901

D0...11

30 MHz

12

FCE306

−55

handbook, halfpage

HD

(dBc)

−60

−65

−70

−75

−80

−85

−1

10

(1) HD

3

(2) HD

2

Typical condition; 2 V (p-p) differential output.

(1)

(2)

11010

Fig.5 Dynamic distortion measurement diagram.

f (MHz)

FCE307

2

−55

handbook, halfpage

HD

(dBc)

−60

−65

−70

−75

−80

−85

−1

10

(1) HD

3

(2) HD

2

Typical condition; 2 V (p-p) differential output.

FCE308

(1)

(2)

11010

f (MHz)

2

Fig.6 Harmonic distortion as a function of

frequency for minimum gain.

1999 Oct 08 11

Fig.7 Harmonic distortion as a function of

frequency for minimum gain plus 6 dB.

Philips Semiconductors Product specification

Wideband differential digital controlled
variable gain amplifier

f (MHz)

FCE309

2

−55

handbook, halfpage

HD

(dBc)

−60

−65

−70

−75

−80

−85

−1

10

(1) HD

3

(2) HD

2

Typical condition; 2 V (p-p) differential output.

(1)

(2)

11010

−55

handbook, halfpage

HD

(dBc)

−60

(1)

−65

−70

−75

(2)

−80

−85

−1

10

(1) HD

3

(2) HD

2

Typical condition; 2 V (p-p) differential output.

11010

TDA9901

FCE310

f (MHz)

2

Fig.8 Harmonic distortion as a function of

frequency for minimum gain plus 12 dB.

−55

handbook, halfpage

HD

(dBc)

−60

−65

−70

−75

−80

−85

10

−1

(1) HD
(2) HD

3
2

(1)

(2)

11010

f (MHz)

Fig.9 Harmonic distortion as a function of

frequency for minimum gain plus 18 dB.

FCE311

2

Typical condition; 2 V (p-p) differential output.

Fig.10 Harmonic distortion as a function of

frequency for minimum gain plus 24 dB.

1999 Oct 08 12

Philips Semiconductors Product specification

Wideband differential digital controlled
variable gain amplifier

APPLICATION INFORMATION

handbook, full pagewidth

V

nF

100 nF

47
µF

1:1

100

IN

GRAY0

CLK

CLKN

100 Ω100 Ω

TE

n.c.

1

2

3

(1)

INN

4

5

IN

6

7

8

TDA9901TS

TDA9901

GRAY1

20

GRAY2

19

100 nF

18

47 nF

47 nF

n.c.

3.3 V

R1

100

(2)

(2)

R2

OUT

OUTN

47
µF

nF

17

16

15

14

13

n.c.

n.c.

(1) Single-ended clock signal can be applied if required.
(2) R1 and R2 should be at least 680 Ω.

9

10

12

11

Fig.11 Application diagram.

100 nF

5 V

MGM966

1999 Oct 08 13

Philips Semiconductors Product specification

Wideband differential digital controlled
variable gain amplifier

PACKAGE OUTLINE

SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm

20

D

c

y

Z

11

E

H

TDA9901

SOT266-1

A

X

v M

E

A

pin 1 index

110

w M

b

e

DIMENSIONS (mm are the original dimensions)

mm

A

max.

1.5

0.1501.4

1.2

0.25

b

3

p

0.32

0.20

UNIT A1A2A

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

p

0 2.5 5 mm

cD

0.20

6.6

0.13

6.4

(1)E(1)

4.5

4.3

scale

eHELLpQZywv θ

0.65 1.0 0.2

6.6

6.2

Q

A

2

A

1

detail X

0.65

0.75

0.45

0.45

(A )

L

p

L

A

3

θ

0.13 0.1

0.48

0.18

(1)

o

10

o

0

OUTLINE
VERSION

SOT266-1

IEC JEDEC EIAJ

REFERENCES

1999 Oct 08 14

EUROPEAN

PROJECTION

ISSUE DATE

90-04-05
95-02-25

Philips Semiconductors Product specification

Wideband differential digital controlled
variable gain amplifier

SOLDERING
Introduction to soldering surface mount packages

Thistext gives a verybriefinsightto a complextechnology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages.Wave soldering isnot always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit boardbyscreen printing, stencillingor
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating,soldering andcooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended
forsurfacemount devices (SMDs) orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

TDA9901

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswith leads on foursides,thefootprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement andbefore soldering,the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

1999 Oct 08 15

Philips Semiconductors Product specification

Wideband differential digital controlled

TDA9901

variable gain amplifier

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

BGA, SQFP not suitable suitable
HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable

(3)

PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;

5. Wave soldering is only suitablefor SSOP and TSSOP packages with a pitch (e) equal to or largerthan 0.65 mm; it is

, SO, SOJ suitable suitable

temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

The package footprint must incorporate solder thieves downstream and at the side corners.

it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

WAVE REFLOW

(2)

SOLDERING METHOD

suitable

(3)(4)
(5)

suitable
suitable

(1)

.

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1999 Oct 08 16

Philips Semiconductors Product specification

Wideband differential digital controlled
variable gain amplifier

NOTES

TDA9901

1999 Oct 08 17

Philips Semiconductors Product specification

Wideband differential digital controlled
variable gain amplifier

NOTES

TDA9901

1999 Oct 08 18

Philips Semiconductors Product specification

Wideband differential digital controlled
variable gain amplifier

NOTES

TDA9901

1999 Oct 08 19

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© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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1999

Internet: http://www.semiconductors.philips.com

68

Printed in The Netherlands 545004/25/02/pp20 Date of release: 1999 Oct 08 Document order number: 9397 750 05272