Datasheet tda8792 DATASHEETS (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8792

3.3 V, 25 MHz 8-bit
analog-to-digital converter (ADC)

Product specification
Supersedes data of 1995 Apr 26
File under Integrated Circuits, IC02

1996 Feb 21

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit
analog-to-digital converter (ADC)

FEATURES

• 8-bit resolution

• Sampling rate up to 25 MHz

• 30 MHz input signal bandwidth (full scale)

• High signal-to-noise ratio over a large analog input

frequency range (7.3 effective bits at 4.43 MHz
full-scale input at f

• CMOS compatible digital inputs

• External reference voltage regulator

• Power dissipation only 53 mW (typical)

• Standby mode (only 1.2 mW typical)

• Low analog input capacitance, no buffer amplifier

required

• No sample-and-hold circuit required.

QUICK REFERENCE DATA

= 25 MHz)

clk

TDA8792

APPLICATIONS

Analog-to-digital conversion for:

• General purpose

• Hand-held equipment

• Mobile telecommunication

• Instrumentation

• Video.

GENERAL DESCRIPTION

The TDA8792 is a 8-bit analog-to-digital converter (ADC)
for low-voltage, portable applications. It operates at 3.3 V
and converts the analog input signal into 8-bit
binary-coded digital words at a maximum sampling rate of
25 MHz. The output data is valid after a delay of 6 clock
cycles.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

DDA

V

DDD

V

DDO

I

DDA

I

DDD

I

DDO

analog supply voltage 2.85 3.3 3.6 V
digital supply voltage 2.70 3.3 3.6 V
output stages supply voltage 2.5 3.3 3.6 V
analog supply current − 12 20 mA
digital supply current − 36mA
output stages supply current f

= 25 MHz; CL= 15 pF;

clk

− 12mA

ramp input
INL integral non-linearity f
DNL differential non-linearity f
f

clk(max)

P

tot

maximum clock frequency 25 −−MHz
total power dissipation f

= 25 MHz; ramp input −±0.4 ±0.8 LSB

clk

= 25 MHz; ramp input −±0.3 ±0.75 LSB

clk

= 25 MHz; CL= 15 pF;

clk

− 53 100 mW

ramp input

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

TDA8792M SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1

1996 Feb 21 2

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit
analog-to-digital converter (ADC)

BLOCK DIAGRAM

dbook, full pagewidth

STDBY

1

V

DDD

2

V

SSD2

3

V

SSA1

4

V

I

V

DDA

I

bias

V

RT

5

6

7

8

7 x 8

OFFSET

COMPENSATED

COMPARATORS

DECODER

LATCHES

TDA8792

8

OUTPUT
BUFFER

24
23

22

21 D7

D620

D519

D4 18

D317

TDA8792

CLK
V

SSO

V

DDO

MSB

data outputs

V

V

RM

V

RB

SSA2

MLD119 - 1

D2 16

D1 15

D014

LSB

OE 13

9

10

12

REFERENCE

LADDER

DAC

Fig.1 Block diagram.

1996 Feb 21 3

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit
analog-to-digital converter (ADC)

PINNING

SYMBOL PIN DESCRIPTION

STDBY 1 standby input
V

DDD

V

SSD2

V

SSA1

V

I

V

DDA

I

bias

V

RT

V

RM

V

RB

n.c. 11 not connected
V

SSA2

OE

D0 14 data output; bit 0 (LSB)
D1 15 data output; bit 1
D2 16 data output; bit 2
D3 17 data output; bit 3
D4 18 data output; bit 4
D5 19 data output; bit 5
D6 20 data output; bit 6
D7 21 data output; bit 7 (MSB)
V

DDO

V

SSO

CLK 24 clock input

2 digital supply voltage (+3.3 V)
3 digital ground 2
4 analog ground 1
5 analog input voltage
6 analog supply voltage (+3.3 V)
7 bias current input
8 reference voltage TOP input
9 reference voltage MIDDLE

10 reference voltage BOTTOM input

12 analog ground 2

output enable input (CMOS level

13

input, active LOW)

positive supply voltage for output

22

stage (+3.3 V)

23 output ground

handbook, halfpage

V

DDD

V

SSD2
SSA1

V

DDA

I

bias

V

V

RM

V

SSA2

RT

RB

n.c.

1
2
3
4

V

5

I

6

TDA8792

7
8

9
10
11
12



MLD120 - 1

STDBY

V

V

Fig.2 Pin configuration.

TDA8792

CLK

24

V

23

SSO

22

V

DDO

21

D7

20

D6
D5

19

D4

18
17

D3
D2

16

D1

15

D0

14

OE

13

1996 Feb 21 4

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit
TDA8792

analog-to-digital converter (ADC)

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DDA

V

DDD

V

DDO

∆V

∆V

∆V

V

I

V

clk(p-p)

I

O

T

stg

T

amb

T

j

DD1

DD2

DD3

analog supply voltage note 1 −0.5 +5.0 V
digital supply voltage note 1 −0.5 +5.0 V
output stages supply voltage note 1 −0.5 +5.0 V
supply voltage differences between

∆V

DD1=VDDA

− V

DDD

supply voltage differences between
∆V

DD2=VDDD

− V

DDO

supply voltage differences between
∆V

DD3=VDDA

− V

DDO

input voltage referenced to V
AC input voltage for switching

referenced to V

SSA
SSD

−0.3 +0.3 V

−1.0 +1.0 V

−1.0 +1.0 V

−0.5 +5.0 V

− V

DDD

(peak-to-peak value)
output current − 10 mA
storage temperature −55 +150 °C
operating ambient temperature −20 +75 °C
junction temperature − +125 °C

V

Note

1. The supply voltages V
differences ∆V

DD1

, ∆V

DDA
DD2

, V

DDD

and ∆V

and V

DDO

are respected.

DD3

may have any value between −0.5 V and +5.0 V provided that the

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air 119 K/W

1996 Feb 21 5

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit
TDA8792

analog-to-digital converter (ADC)

CHARACTERISTICS

V

DDA=V6

V

SSA,VSSD

VIH=V
unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply

V

DDA

V

DDD

V

DDO

I

DDA

I

DDD

I

DDO

Inputs

LOCK INPUT CLK (REFERENCED TO V

C
V

IL

V

IH

I

IL

I

IH

C

I

INPUTS OE AND STDBY (REFERENCED TO V
V

IL

V

IH

I

IL

I

IH

VI(ANALOG INPUT VOLTAGE REFERENCED TO V
I

IL

I

IH

Z

I

C

I

Reference voltages for the resistor ladder; see Table 1
V

RB

V

RT

V

diff

I

ref

R

LAD

TC

DDD

RLAD

to V

; CL= 15 pF; T

= 2.85 to 3.6 V; V

4,12

and V

SSO

DDD=V2

shorted together; V

= 0 to +70 °C; typical values measured at V

amb

to V3and V1= 2.7 to 3.6 V; V

DDA

to V

= −0.15 to +0.15 V; f

DDD

DDO=V22

= 25 MHz; 50% duty factor; VIL=0V;

clk

DDA=VDDD=VDDO

to V23= 2.5 to 3.6 V;

= 3.3 V and T

amb

=25°C;

analog supply voltage 2.85 3.3 3.6 V
digital supply voltage 2.7 3.3 3.6 V
output stages supply voltage 2.5 3.3 3.6 V
analog supply current − 12 20 mA
digital supply current − 36mA
output stages supply current CL= 15 pF; ramp input − 12mA

); note 1

SSD

LOW level input voltage 0 − 0.8 V
HIGH level input voltage 2.0 − V
LOW level input current V
HIGH level input current V

= 0.4 V −10 −−µA

clk

= 2.7 V −−10 µA

clk

DDD

V

input capacitance − 10 − pF

); see Tables 2 and 3

SSD

LOW level input voltage 0 − 0.8 V
HIGH level input voltage 2.0 − V

DDD

V
LOW level input current VIL= 0.4 V −10 −−µA
HIGH level input current VIH= 2.7 V −−+10 µA

)

SSA

LOW level input current VI=0V −20 −−µA
HIGH level input current VI= 1.5 V −−+20 µA
input impedance fi= 4.43 MHz − 35 − kΩ
input capacitance fi= 4.43 MHz − 5 − pF

reference voltage BOTTOM 0 − 0.15 V
reference voltage TOP 1.4 − 1.6 V
differential reference voltage VRT− V

RB

1.25 1.5 1.6 V
reference current − 1.3 − mA
resistor ladder − 1250 −Ω
temperature coefficient of the resistor

− 1 −Ω/K
ladder

1996 Feb 21 6

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit
TDA8792

analog-to-digital converter (ADC)

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Outputs

DIGITAL OUTPUTS D7 TO D0 (REFERENCED TO V
V

OL

V

OH

I

OZ

LOW level output voltage IO=1mA 0 − 0.4 V
HIGH level output voltage IO= −1mA V
output current in 3-state mode 0.4V<VO<V

Switching characteristics

C

LOCK INPUT CLK (V

f

clk(max)

f

clk(min)

t

CPH

t

CPL

maximum clock frequency 25 −−MHz
minimum clock frequency 0.5 −−MHz
clock pulse width HIGH 16 −−ns
clock pulse width LOW 16 −−ns

= 3.15 TO 3.45 V; V

DDA

Analog signal processing

INEARITY

L
INL integral non-linearity ramp input −±0.4 ±0.8 LSB

DNL differential non-linearity ramp input −±0.3 ±0.75 LSB

ANDWIDTH (V

B

= 3.15 TO 3.45 V; V

DDA

= 3.15 TO 3.45 V); T

DDD

B analog bandwidth full-scale sine wave;

t

STLH

t

STHL

analog input settling time LOW-to-HIGH full-scale square wave;

analog input settling time HIGH-to-LOW full-scale square wave;

HARMONICS
h

1

h

all

fundamental harmonics (full scale) fi= 4.43 MHz −−0dB
harmonics (full scale); all components fi= 4.43 MHz

second harmonics −−61 − dB
third harmonics −−61 − dB

THD total harmonic distortion f
SIGNAL-TO-NOISE RATIO; see Figs 6 and 11; note 4
S/N signal-to-noise ratio (full scale) without harmonics;

)

SSO

DDO

= 3.15 TO 3.45 V); see Fig.3 and note 1

DDD

=25°C

AMB

note 2
small signal at mid-scale;

Vi= ±10 LSB at
code 128; note 2

Fig.5; note 3

Fig.5; note 3

= 4.43 MHz −−58 − dB

i

= 25 MHz;

f

clk

fi= 4.43 MHz

− 0.4 − V

DDO

DDO

V

−10 − +10 µA

20 30 − MHz

− 35 − MHz

− 812ns

− 812ns

− 46 − dB

1996 Feb 21 7

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit
TDA8792

analog-to-digital converter (ADC)

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

E

FFECTIVE BITS; see Figs 6 and 11;note4

EB effective bits f

DIFFERENTIAL GAIN; see note 5
G

diff

differential gain f

DIFFERENTIAL PHASE; see note 5

ϕ

diff

Timing (f

t

ds

t

h

t

d

differential phase f

= 25 MHz); see Fig.3 and note 6

clk

sampling delay time −−2ns
output hold time 6 −−ns

output delay time 8 13 25 ns
3-state output delay times; see Fig.4
t

dZH

t

dZL

t

dHZ

t

dLZ

enable HIGH − 17 28 ns

enable LOW − 22 30 ns

disable HIGH − 20 28 ns

disable LOW − 22 30 ns

Standby mode output delay times

t

dSTBLH

t

dSTBHL

standby (LOW-to-HIGH transition) −−200 ns

start-up (HIGH-to-LOW transition) −−note 7 ns

Notes

1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock
must not be less than 1 ns.

2. The analog bandwidth is defined as the maximum full-scale input sine wave frequency which can be applied to the
device. No glitches greater than 8 LSBs are observed in the reconstructed signal neither is there any significant
attenuation.

3. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale
input (square-wave signal) in order to sample the signal and obtain correct output data.

4. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent
fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB × 6.02 + 1.76 dB.

5. Measurement carried out using video analyser VM700A, where the video analog signal is reconstructed through a
digital-to-analog converter.

6. Output data acquisition: the output data is available after the maximum delay time of t
operation, the hardware design must be taken into account the td and th limits with respect to the input characteristics
of the acquisition circuit.

7. Maximum value standby mode start-up output delay time (HIGH-to-LOW transition): .

= 25 MHz

clk

= 2.0 MHz − 7.4 − bits

f

i

= 4.43 MHz − 7.3 − bits

f

i

= 7.5 MHz − 7.2 − bits

f

i

= 10 MHz − 7.0 − bits

f

i

= 25 MHz;

clk

− 1.5 − %

PAL modulated ramp

= 25 MHz;

clk

− 0.5 − deg

PAL modulated ramp

. In the event of 25 MHz clock

d

100

7000

+

-----------------------­f

(MHz)

clk

1996 Feb 21 8

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit
TDA8792

analog-to-digital converter (ADC)

Table 1 Output coding and input voltage (typical values; referenced to V

BINARY OUTPUT BITS

STEP V

I(p-p) (V)

D7 D6 D5 D4 D3 D2 D1 D0

Underflow <000000000
0 0 00000000
1 . 00000001

. . ........

. . ........

254 . 1 1 1 1 1 1 1 0
255 1.5 11111111
Overflow >1.5 11111111

Table 2 Mode selection

OE D7 TO D0

1 high impedance
0 active; binary

Table 3 Standby selection

STDBY D7 TO D0 I

1 LOW 0.4 mA
0 active 15 mA

SSA

)

DDA+IDDD

(typ.)

CLK

V

l

DATA
D0 to D7

t

CPH

sample N 1

DATA

N 6

t

CPL

1.4 V

sample N 2

t

ds

DATA

N 5

t

d

sample N 6

DATA

N 1

t

h

V

0.4 V

DATA

N

MLD121

DDO

50%

0.4 V

Fig.3 Timing diagram.

1996 Feb 21 9

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit

analog-to-digital converter (ADC)

V

handbook, full pagewidth

DDD

OE

output
data

output
data

LOW

t

dLZ

10 %

TDA8792

HIGH

OE

TDA8792

50 %

LOW

V

S1

DDD

t

dZH

50 %

TEST

t

dLZ

t

dZL

t

dHZ

t

dZH

V

DDD

V

DDD

GND
GND

S1

MLD122

t

dHZ

HIGH

t

dZL

50 %

3.3 kΩ

15 pF

90 %

fOE= 100kHz.

Fig.4 Timing diagram and test conditions of 3-state output delay time.

1996 Feb 21 10

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit

analog-to-digital converter (ADC)

t

STLH

code 255

V

I

50 %

code 0

2 ns

CLK

MLD123

50 %

2 ns

2 ns

t

STHL

50 %

50 %

TDA8792

2 ns

Fig.5 Analog input settling-time diagram.

handbook, full pagewidth

0

A

(dB)

20

40

60

80

100

120

0 3.13 4.69 6.25 9.38 10.91.56 7.82

Effective bits: 7.42; THD =−57.27 dB;
Harmonic levels (dB): 2nd =−60.76; 3rd = −60.96; 4th = −76.17; 5th = −80.63; 6th = −66.96.

MLD118

12.5

f (MHz)

Fig.6 Typical Fast Fourier Transform (f

1996 Feb 21 11

= 25 MHz; fi= 4.43 MHz).

clk

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit

analog-to-digital converter (ADC)

INTERNAL PIN CONFIGURATIONS

D7 to D0

MLD124

Fig.7 Digital data outputs.

handbook, halfpage

V

DDD

OE,

CLK or STDBY



V

SSD



MLD126 - 1

handbook, halfpage

V

V

DDA

V
V
V

SSA

V

DDA

V

I

V

SSA

Fig.8 Analog inputs.

RT
RM
RB

TDA8792

MLD125

R

LAD

MLC859

Fig.9 Digital inputs.

V

DDA

I

bias

V

SSA

MLD127

Fig.11 Bias current input.

1996 Feb 21 12

Fig.10 VRB, VRM and VRT.

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit

analog-to-digital converter (ADC)

APPLICATION INFORMATION

handbook, full pagewidth

3.3 V

3.3 V
100 nF

22 kΩ

3.3 V
100 nF

100 nF

100 nF

100 nF

STDBY

V

DDD

V

SSD2

V

SSA1

V

DDA

I

bias

V

RT

V

RM

V

RB

n.c.

V

SSA2

TDA8792

1

2

3

4

V

I

5

6

TDA8792

7

(1)

8

(1)

9

(1)

10

(2)

11

12

MLD128 - 1

CLK

24

V

SSO

23

V

DDO

22

D7

21

D6

20

D5

19

D4

18

D3

17

D2

16

D1

15

D0

14

OE

13

3.3 V

100 nF

The analog and digital supplies should be separated and decoupled.
The external voltage generator must be built such that a good supply voltage ripple rejection is achieved with respect to the LSB value. The reference

ladder voltages can also be derived from a well regulated V
For applications where the input signal must remain well centred around middle scale, VRM must be decoupled and connected to analog input signal

(pin 5) through a resistor. The values must be defined in accordance with the input signal frequency in order to avoid direct coupling into the ADC ladder
(e.g. R = 5 kΩ and C = 100 nF).

, VRM and VRT are decoupled to V

(1) V

RB

(2) Pin 11 should be connected to V

.

SSA

in order to prevent noise influence.

SSA

supply through a resistor bridge and a decoupled capacitor.

DDA

Fig.12 Application diagram.

1996 Feb 21 13

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit
analog-to-digital converter (ADC)

PACKAGE OUTLINE

SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm

D

c

y

Z

24 13

TDA8792

SOT340-1

E

H

E

A

X

v M

A

pin 1 index

112

w M

b

e

DIMENSIONS (mm are the original dimensions)

mm

A

max.

2.0

0.21

0.05

1.80

1.65

0.25

b

3

p

0.38

0.25

UNIT A1A2A

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

p

cD

0.20

8.4

0.09

8.0

0 2.5 5 mm

scale

(1)E(1) (1)

eHELLpQZywv θ

5.4

0.65 1.25

5.2

7.9

7.6

Q

A

2

A

1

detail X

0.9

1.03

0.7

0.63

(A )

L

p

L

A

3

θ

0.13 0.10.2

0.8

0.4

o

8

o

0

OUTLINE
VERSION

SOT340-1 MO-150AG

IEC JEDEC EIAJ

REFERENCES

1996 Feb 21 14

EUROPEAN

PROJECTION

ISSUE DATE

93-09-08
95-02-04

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit
analog-to-digital converter (ADC)

SOLDERING SSOP
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
cases reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

Reflow soldering

Reflow soldering techniques are suitable for all SSOP
packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from 215 to
250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

Wave soldering

Wave soldering isnot recommended for SSOP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

(order code 9398 652 90011).

TDA8792

If wave soldering cannot be avoided, the following
conditions must be observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave)
soldering technique should be used.

• The longitudinal axis of the package footprint must

be parallel to the solder flow and must incorporate
solder thieves at the downstream end.

Even with these conditions, only consider wave
soldering SSOP packages that have a body width of

4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds at between 270 and
320 °C.

1996 Feb 21 15

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit
TDA8792

analog-to-digital converter (ADC)

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1996 Feb 21 16

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit

analog-to-digital converter (ADC)

TDA8792

NOTES

1996 Feb 21 17

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit

analog-to-digital converter (ADC)

TDA8792

NOTES

1996 Feb 21 18

Philips Semiconductors Product specification

3.3 V, 25 MHz 8-bit

analog-to-digital converter (ADC)

TDA8792

NOTES

1996 Feb 21 19

Philips Semiconductors – a worldwide company

Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428)

BUENOS AIRES, Tel. [phone], Fax. [phone]

Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]

Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]

Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands,

Tel. [phone], Fax. [phone]

Brazil: Rua do Rocio 220 - 5

CEP: 04552-903-SÃO PAULO-SP, Brazil,
P.O. Box 7383 (01064-970),
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS:

Tel. [phone], Fax. [phone]

Chile: Av. Santa Maria 0760, SANTIAGO,

Tel. [phone], Fax. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,

72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17,

77621 BOGOTA, Tel. [phone],
Fax. [phone]

Denmark: Prags Boulevard 80, PB 1919, DK-2300

COPENHAGEN S, Tel. [phone], Fax. [phone]

Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]

France: 4 Rue du Port-aux-Vins, BP317,

92156 SURESNES Cedex,
Tel. [phone], Fax. [phone]

Germany: P.O. Box 10 51 40, 20035 HAMBURG,

Tel. [phone], Fax. [phone]

Greece: No. 15, 25th March Street, GR 17778 TAVROS,

Tel. [phone] 911, Fax. [phone]

India: Philips INDIA Ltd, Shivsagar Estate, A Block,

Dr. Annie Besant Rd. Worli, Bombay 400 018
Tel. [phone], Fax. [phone]

Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4,

P.O. Box 4252, JAKARTA 12950,
Tel. [phone], Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS S.r.l.,

Piazza IV Novembre 3, 20124 MILANO,
Tel. [phone], Fax. [phone]

Japan: Philips Bldg13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong,

Yongsan-ku, SEOUL, Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,

SELANGOR, Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905,

Tel. [phone], Fax. [phone]

th

floor, Suite 51,

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]

Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: Philips Electrical Industries of Pakistan Ltd.,

Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton,
KARACHI 75600, Tel. [phone],
Fax. [phone]

Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Portugal: PHILIPS PORTUGUESA, S.A.,

Rua dr. António Loureiro Borges 5, Arquiparque - Miraflores,
Apartado 300, 2795 LINDA-A-VELHA,
Tel. [phone], Fax. [phone]

Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

South Africa: S.A. PHILIPS Pty Ltd.,

195-215 Main Road Martindale, 2092 JOHANNESBURG,
P.O. Box 7430, Johannesburg 2000,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,

Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM,

Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West

Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. [phone], Fax. [phone]

Turkey:Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. [phone], Fax. [phone]

Ukraine: Philips UKRAINE, 2A Akademika Koroleva str., Office 165,

252148 KIEV, Tel.[phone], Fax. [phone]

United Kingdom: Philips Semiconductors LTD.,

276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. [phone], Fax. [phone]

United States:811 East Arques Avenue, SUNNYVALE,

CA 94088-3409, Tel. [phone], Fax. [phone]

Uruguay: Coronel Mora 433, MONTEVIDEO,

Tel. [phone], Fax. [phone]

Internet: http://www.semiconductors.philips.com/ps/
For all other countries apply to: Philips Semiconductors,

International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. [phone]

SCDS47 © Philips Electronics N.V. 1996

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537021/1100/02/pp20 Date of release: 1996 Feb 21
Document order number: 9397 750 00675