Page 1
INTEGRATED CIRCUITS
DATA SH EET
TDA8787A
10-bit, 3.0 V, up to 25 Msps
analog-to-digital interface for CCD
cameras
Product specification
Supersedes data of 2000 Oct 12
File under Integrated Circuits, IC02
2000 Nov 14
Page 2
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
FEATURES
• Correlated Double Sampling (CDS), Programmable
GainAmplifier (PGA),10-bitAnalog-to-DigitalConverter
(ADC) and reference regulator included
• Fully programmable via a 3-wire serial interface
• Sampling frequency up to 25 MHz;
(TDA8787AHL = 18 MHz; TDA8787AHL/S1 = 25 MHz)
• PGA gain range of 36 dB (in steps of 0.1 dB)
• Low power consumption of only 170 mW at 2.7 V
• Power consumption in standby mode of 4.5 mW
(typical value)
• 3.0 V operation; 2.5 to 3.6 V operation for the digital
outputs
• Active control pulses polarity selectable via serial
interface
• 8-bit DAC included for analog settings
• TTL compatible inputs, CMOS compatible outputs.
APPLICATIONS
• Low-power, low-voltage CCD camera systems.
GENERAL DESCRIPTION
The TDA8787A is a 10-bit analog-to-digital interface for
CCD cameras. The device includes a correlated double
sampling circuit, a PGA, clamp loops and a low-power
10-bit ADC, together with its reference voltage regulator.
The PGA gain and the ADC input clamp level are
controlled via the serial interface.
An additional DAC is provided for additional system
controls. Its output voltage range is 1.0 V peak-to-peak
which is available at pin OFDOUT.
TDA8787A
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
TDA8787AHL LQFP48 plastic low profile quad flat package; 48 leads;
TDA8787AHL/S1 LQFP48 SOT313-2 25 MHz
NAME DESCRIPTION VERSION
SOT313-2 18 MHz
body 7 × 7 × 1.4 mm
PIXEL
FREQUENCY
2000 Nov 14 2
Page 3
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
TDA8787A
interface for CCD cameras
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
CCA
V
CCD
V
CCO
I
CCA
I
CCD
I
CCO
ADC
res
V
i(CDS)(p-p)
f
pix(max)
f
pix(min)
DR
PGA
N
tot(rms)
V
n(i)(eq)(rms)
P
tot
analog supply voltage 2.7 3.0 3.6 V
digital supply voltage 2.7 3.0 3.6 V
digital outputs stages supply
2.5 2.6 3.6 V
voltage
analog supply current all clamps active; f
digital supply current f
digital outputs supply current f
=18MHz − 13 17 mA
pix
= 18 MHz; CL= 20 pF; input ramp
pix
= 18 MHz − 50 60 mA
pix
− 12mA
response time is 800 µs
ADC resolution − 10 − bits
CDS input amplitude (video
signal) (peak-to-peak value)
VCC= 2.85 V 650 −−mV
≥ 3.0 V 800 −−mV
V
CC
maximum pixel frequency 25 −−MHz
minimum pixel frequency 2 −−MHz
PGA dynamic range − 36 − dB
total noise (RMS value) at
PGA code = 0; see Fig.8 − 0.15 − LSB
CDS input to ADC output
equivalent input noise
PGA code = 383 − 70 −µV
voltage (RMS value)
total power consumption V
CCA=VCCD=VCCO
V
CCA=VCCD=VCCO
=3V − 190 − mW
= 2.7 V − 170 − mW
2000 Nov 14 3
Page 4
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
d
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
2000 Nov 14 4
book, full pagewidth
BLOCK DIAGRAM
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
CPCDS1
CPCDS2
V
CCA3
AGND3
V
CCA1
AGND1
OFDOUT
V
SHP
SHD
47
CDS CLOCK GENERATOR
7
8
42
41
CORRELATED
4
IN
6
5
9
DOUBLE
SAMPLING
input
clamp
OFD DAC
CCD3
1
48
V
ref
DGND3
2
V
CLAMP
CCA2
AGND2
18
17
PGA
9-BIT
REGISTER
8-BIT
REGISTER
CLPOB
13
CLPDM
12
AGND5
43
TDA8787AHL
SHIFTERSHIFT
DAC
10-bit ADC
REGISTER
SERIAL
INTERFACE
7-BIT
BLK
11
BLANKING
CLK
LATCH
40
REGULATOR
OE
37
OUTPUT
BUFFER
20
DGND1
19
V
CCD1
39
DGND2
38
V
CCD2
26
OGND
36
D9
35
D8
34
D7
33
D6
32
D5
31
D4
30
D3
29
D2
28
D1
27
D0
25
V
CCO
44
DCLPC
15
14 3
TEST2
TEST1 AGND4
16
TEST3
45
OPGA OPGAC
46
Fig.1 Block diagram.
SEN
22
23
SCLK
SDATA
21
24
VSYNC
10
FCE330
STDBY
TDA8787A
Page 5
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
TDA8787A
interface for CCD cameras
PINNING
SYMBOL PIN DESCRIPTION
V
CCD3
DGND3 2 digital ground 3
AGND4 3 analog ground 4
IN 4 input signal from CCD
AGND1 5 analog ground 1
V
CCA1
CPCDS1 7 clamp storage capacitor 1
CPCDS2 8 clamp storage capacitor 2
OFDOUT 9 analog output of the additional 8-bit control DAC
STDBY 10 standby mode control input (LOW: TDA8787A active; HIGH: TDA8787A standby)
BLK 11 blanking control input
CLPDM 12 clamp pulse input at dummy pixel (should be connected to ground)
CLPOB 13 clamp pulse input for optical black
TEST1 14 test pin input 1 (should be connected to AGND2)
TEST2 15 test pin input 2 (should be connected to AGND2)
TEST3 16 test pin input 3 (should be connected to AGND2)
AGND2 17 analog ground 2
V
CCA2
V
CCD1
DGND1 20 digital ground 1
SDATA 21 serial data input for serial interface control
SCLK 22 serial clock input for serial interface control
SEN 23 strobe pin for serial interface control
VSYNC 24 vertical sync pulse input
V
CCO
OGND 26 digital output ground
D0 27 ADC digital output 0 (LSB)
D1 28 ADC digital output 1
D2 29 ADC digital output 2
D3 30 ADC digital output 3
D4 31 ADC digital output 4
D5 32 ADC digital output 5
D6 33 ADC digital output 6
D7 34 ADC digital output 7
D8 35 ADC digital output 8
D9 36 ADC digital output 9 (MSB)
OE 37 output enable control input (LOW: outputs active; HIGH: outputs in high impedance)
V
CCD2
DGND2 39 digital ground 2
CLK 40 data clock input
1 digital supply voltage 3
6 analog supply voltage 1
18 analog supply voltage 2
19 digital supply voltage 1
25 output stages supply voltage
38 digital supply 2
2000 Nov 14 5
Page 6
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
SYMBOL PIN DESCRIPTION
AGND3 41 analog ground 3
V
CCA3
AGND5 43 analog ground 5
DCLPC 44 regulator decoupling pin
OPGA 45 PGA output (test pin)
OPGAC 46 PGA complementary output (test pin)
SHP 47 preset sample-and-hold pulse input
SHD 48 data sample-and-hold pulse input
42 analog supply 3
SHD
SHP
48
47
OPGA
OPGAC
46
45
DCLPC
AGND5
44
43
CCA3
V
42
AGND3
CLK
41
40
DGND2
V
39
38
CCD2
TDA8787A
OE
37
V
CCD3
DGND3
AGND4
AGND1
V
CCA1
CPCDS1
CPCDS2
OFDOUT
STDBY
BLK
CLPDM
24
VSYNC
36
35
34
33
32
31
30
29
28
27
26
25
FCE331
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
OGND
V
CCO
1
2
3
4
IN
5
6
7
8
9
10
11
12
13
14
TEST1
CLPOB
15
TEST2
16
TEST3
TDA8787AHL
17
18
19
CCA2
CCD1
V
V
AGND2
20
21
SDATA
DGND1
22
SCLK
23
SEN
Fig.2 Pin configuration.
2000 Nov 14 6
Page 7
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
TDA8787A
interface for CCD cameras
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CCA
V
CCD
V
CCO
∆V
CC
V
i
I
o
T
stg
T
amb
T
j
Note
1. The supply voltages V
voltage difference ∆VCC remains as indicated.
analog supply voltage note 1 −0.3 +5.0 V
digital supply voltage note 1 −0.3 +5.0 V
output stages supply voltage note 1 −0.3 +5.0 V
supply voltage difference
between V
between V
between V
CCA
CCA
CCD
and V
and V
and V
CCD
CCO
CCO
−0.5 +0.5 V
−0.5 +1.2 V
−0.5 +1.2 V
input voltage referenced to AGND −0.3 +5.0 V
data output current −±10 mA
storage temperature −55 +150 °C
ambient temperature −20 +75 °C
junction temperature − 150 °C
, V
CCA
CCD
and V
may have any value between −0.3 and +5.0 V provided that the supply
CCO
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th(j-a)
thermal resistance from junction to ambient in free air 76 K/W
2000 Nov 14 7
Page 8
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
TDA8787A
interface for CCD cameras
CHARACTERISTICS
V
CCA=VCCD
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supplies
V
CCA
V
CCD
V
CCO
I
CCA
I
CCD
I
CCO
P
tot
Digital inputs
INPUTS: PINS STDBY, CLPDM, CLPOB, SCLK, SDATA, SEN, VSYNC, OE, CLK AND BLK
V
IL
V
IH
I
i
INPUTS: PINS SHP AND SHD
V
IL
V
IH
I
i
Clamps
= 3.0 V; V
CCO
= 2.6 V; f
= 18 MHz; T
pix
= −20 to +75°C; unless otherwise specified.
amb
analog supply voltage 2.7 3.0 3.6 V
digital supply voltage 2.7 3.0 3.6 V
digital outputs stages
2.5 2.6 3.6 V
supply voltage
analog supply current all clamps active − 50 60 mA
digital supply current − 13 17 mA
digital outputs supply
current
CL= 20 pFon all dataoutputs;
input ramp response time is
− 12mA
800 µs
total power consumption V
CCA=VCCD=VCCO
V
CCA=VCCD=VCCO
=3V − 190 − mW
= 2.7 V − 170 − mW
LOW-level input voltage 0 − 0.6 V
HIGH-level input voltage 2.2 − 5.0 V
input current 0 ≤ Vi≤ V
CCD
−2 − +2 µA
LOW-level input voltage 0 − 0.6 V
HIGH-level input voltage 2.2 − 5.0 V
input current 0 ≤ Vi≤ V
CCD
−10 − +10 µA
GLOBAL CHARACTERISTICS OF THE CLAMP LOOPS
t
W(clamp)
clamp active pulse width
in numbers of pixels
PGA input code = 255 for
maximum 4 LSB error
INPUT CLAMP: PIN CLPDM
g
m(CDS)
CDS input clamp
transconductance
OPTICAL BLACK CLAMP: PIN CLPOB
G
shift
gain from CPCDS1 and 2
to PGA inputs
I
LSB(cp)
charge pump current for
±1 LSB error at ADC
PGA input code = 0 −±20 −µA
PGA input code = 383 −±0.60 −µA
output
2000 Nov 14 8
12 −−pixels
1.5 2.7 3.5 mS
− 0.27 −
Page 9
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
TDA8787A
interface for CCD cameras
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Correlated Double Sampling (CDS) (pin IN)
V
i(CDS)(p-p)
CDS input amplitude
(video signal)
(peak-to-peak value)
V
i(rst)(max)
maximum CDS input reset
pulse amplitude
I
i
C
i
t
CDS(min)
input current at floating gate level −1 − +1 µA
input capacitance − 2 − pF
CDS control pulses
minimum active time
t
h(IN-SHP)
t
h(IN-SHD)
hold time SHP to IN T
hold time SHD to IN T
Amplifier
DR
∆G
PGA
PGA
PGA dynamic range − 36 − dB
PGA gain step −0.3 − +0.3 dB
Analog-to-Digital Converter (ADC)
LE
LE
(i)
(d)
integral non-linearity error f
differential non-linearity
error
Total chain characteristics (CDS, PGA and ADC)
f
pix(max)
f
pix(min)
t
CLKH
t
CLKL
t
d(SHD-CLK)
t
su(BLK-CLK)
maximum pixel frequency 25 −−MHz
minimum pixel frequency 2 −−MHz
clock HIGH time 15 −−ns
clock LOW time 15 −−ns
time delay SHD to CLK see Fig.3 10 −−ns
set-up time of
BLK compared to CLK
V
i(IN)
video input dynamicsignal
for ADC full-scale output
N
tot(rms)
total noise from CDS input
to ADC output
(RMS value)
V
n(i)(eq)(rms)
equivalent input noise
voltage (RMS value)
VCC= 2.85 V 650 −−mV
V
≥ 3.0 V 800 −−mV
CC
500 −−mV
V
i(CDS)(p-p)
= 800 mV;
black-to-white transition in
1 pixel (±2 LSB typical);
T
=25°C; note 1
amb
f
=18MHz
pix
11 15 − ns
(TDA8787AHL)
=25MHz
f
pix
911−ns
(TDA8787AHL/S1)
=25°C; see
amb
− 12ns
Figs 3 and 4
=25°C; see
amb
− 12ns
Figs 3 and 4
= 18 MHz; ramp input −±1.3 ±2.5 LSB
pix
f
= 18 MHz; ramp input −±0.5 ±0.9 LSB
pix
10 −−ns
PGA input code = 0 800 −−mV
PGA input code = 383 12.7 −−mV
see Fig.8
PGA input code = 0 − 0.15 − LSB
PGA input code = 96 − 0.8 − LSB
PGA input code = 383 − 70 −µV
PGA input code = 0 − 120 −µV
2000 Nov 14 9
Page 10
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
TDA8787A
interface for CCD cameras
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
O
CCD(max)
maximum offset between
CCD floating level and
CCD dark pixel level
Digital-to-Analog Converter (OFDOUT DAC)
V
OFDOUT(p-p)
additional 8-bit control
RL=1MΩ−1.0 − V
DAC(OFD) output voltage
(peak-to-peak value)
V
OFDOUT
DC output voltage OFD input code 0 − AGND − V
OFD input code 255 − AGND + 1.0 − V
TC
OFD
OFD output range
temperature coefficient
Z
OFDOUT
I
OFDOUT
Digital outputs (f
V
OH
V
OL
I
OZ
t
h(o)
t
d(o)
C
L
OFD output impedance − 2000 −Ω
OFD output drive current static −− 100 µA
= 18 MHz; CL= 10 pF); see Figs 3 and 4
pix
HIGH-level output voltage IOH= −1mA V
LOW-level output voltage IOL=1mA 0 − 0.5 V
OFF-state output current 0.5V<VOZ<V
output hold time 9 −−ns
output delay time V
V
CCO
CCO
load capacitance −− 22 pF
Serial interface
f
SCLK(max)
maximum frequency
pin SCLK
CCO
= 3.0 V − 17 23 ns
= 2.7 V − 19 25 ns
−80 − +80 mV
− 250 − ppm/°C
− 0.5 − V
CCO
CCO
V
−20 − +20 µA
5 −−MHz
Note
1. Depending on application environments and especially in case of high gain operation and digital supply with jitter, it
is preferable to apply 12 ns or higher CDS pulses.
2000 Nov 14 10
Page 11
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
handbook, full pagewidth
IN
SHP
SHD
t
h(IN-SHP)
N
0.6 V 0.6 V
0.6 V 0.6 V
N + 1N + 2N + 3
t
CDS(min)
t
CDS(min)
0.6 V
TDA8787A
2.2 V
2.2 V
CLK
DATA
BLK
t
h(IN-SHD)
2.2 V
t
CLKH
t
d(SHD-CLK)
2.2 V
0.6 V
0.6 V
t
su(BLK-CLK)
50%
t
h(o)
0.6 V
N − 1
t
N
d(o)
FCE337
Fig.3 Pixel frequency timing diagram with active HIGH-level polarities.
2000 Nov 14 11
Page 12
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
handbook, full pagewidth
IN
SHP
2.2 V
t
h(IN-SHP)
N
0.6 V
N + 1N + 2N + 3
t
CDS(min)
TDA8787A
0.6 V
SHD
CLK
DATA
BLK
2.2 V
t
h(IN-SHD)
t
CLKL
0.6 V
0.6 V
2.2 V
0.6 V
2.2 V
2.2 V
t
su(BLK-CLK)
t
CDS(min)
t
d(SHD-CLK)
50%
t
h(o)
2.2 V
N − 1
0.6 V
t
N
d(o)
FCE328
Fig.4 Pixel frequency timing diagram with active LOW-level polarities.
2000 Nov 14 12
Page 13
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
handbook, full pagewidth
1.0
V
OFDOUT
(V)
0
0
OFD control DAC input code
TDA8787A
FCE332
255
handbook, full pagewidth
PGA output
CLPOB
(active HIGH)
BLK
(active HIGH)
Fig.5 DAC output voltage output as a function of DAC input code.
(1)
4 pixels
CLPOB
WINDOW
VIDEO OPTICAL BLACK
HORIZONTAL FLYBACK DUMMY VIDEO
BLK window
FCE333
(1) In case the number of clamp pixels is limited to 18 × (t
); otherwise this timing interval can be smaller.
W(clamp)
Fig.6 Line frequency timing diagram.
2000 Nov 14 13
Page 14
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
42
Total
gain
(dB)
36
30
24
18
12
6
0
0 64 192 320
ADC input range is 1 Vpp.
128
256 383
TDA8787A
FCE327
PGA input code
Fig.7 Total gain as a function of PGA input code.
FCE329
N
tot(rms)
(LSB)
6
5
4
3
2
1
0
0 64 192 320
handbook, halfpage
128 256 383
PGA input code
Noise measurement at ADC outputs; coupling capacitor at input is grounded, so only noise contribution of the front-end is evaluated. Front-end works
at 18 Mpixels with line of 1024 pixels whose first 40 are used to run CLPOB and the last 40 for CLPDM. Data at the ADC outputs are measured during
the other pixels. As a result of this, the standard deviation of the codes statistic is computed, resulting in the noise.
Fig.8 Typical total noise performance as a function of PGA gain.
2000 Nov 14 14
Page 15
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
handbook, full pagewidth
SDATA
SD0
SCLK
SEN
8
OFDOUT DAC
LATCHES
FLIP-FLOP FLIP-FLOP FLIP-FLOP
SD1 SD2 SD3 SD4 SD510SD6
LSB MSB
9
PGA GAIN
LATCHES
ADC CLAMP
LATCHES
SHIFT REGISTER
7 6
TDA8787A
SD7 SD8 SD9 A0 A1
LATCH
SELECTION
CONTROL PULSE
POLARITY
LATCHES
VSYNC
control pulses
polarity
settings
handbook, full pagewidth
SDATA
SCLK
SEN
8-bit DAC
PGA
control
ADC clamp
control
Fig.9 Serial interface block diagram.
t
su2
t
MSB LSB
A1 A0 SD9 SD7 SD6 SD5 SD4 SD3
t
su1
SD8
hd4
FCE334
SD2 SD1 SD0
t
t
hd3
FCE335
su3
t
su1=tsu2=tsu3
= 10 ns (minimum); t
hd3=thd4
= 10 ns (minimum).
Fig.10 Loading sequence of control input data via the serial interface.
2000 Nov 14 15
Page 16
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
TDA8787A
interface for CCD cameras
Table 1 Serial interface programming; see Figs 9 and 10
ADDRESS BITS
A1 A0
0 0 PGA gain control (bits SD8 to SD0); bit SD9 should be set to logic 0
0 1 DAC OFDOUT output control (bits SD7 to SD0); bits SD8 and SD9 should be set to
logic 0
1 0 ADC clamp reference control (SD6 to SD0); from code 0 to 127; bits SD7, SD8 and
SD9 should be set to logic 0
1 1 control pulses polarity settings (pins SHP, SHD, CLPDM, CLPOB, BLK and CLK)
Table 2 Polarity settings
SYMBOL PIN SERIAL CONTROL BIT
SHP and SHD 47 and 48 SD0 1 = HIGH; 0 = LOW
CLK 40 SD1 1 = HIGH; 0 = LOW
CLPDM 12 (connected to ground) SD2 always 0 = LOW
CLPOB 13 SD3 1 = HIGH; 0 = LOW
BLK 11 SD5 1 = HIGH; 0 = LOW
VSYNC 24 SD6 0 = rising; 1 = falling
DATA BITS SD9 TO SD0
(1)
ACTIVE EDGE OR LEVEL
Note
1. Bit SD4 is not used.
Table 3 Standby mode selection; pin STDBY
STDBY ADC DIGITAL OUTPUTS; PINS D9 TO D0 I
1 logic state LOW 1.5 mA
0 active 64 mA
Table 4 Output enable (OE) pin 37
OE ADC DIGITAL OUTPUTS; PINS D9 TO D0
0 active, binary
1 high impedance
CCA+ICCO+ICCD
(typical)
2000 Nov 14 16
Page 17
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
APPLICATION INFORMATION
Power and grounding recommendations
When designing a printed-circuit board for applications
such as PC cameras, surveillance cameras, camcorders
and digital still cameras, care should be taken to minimize
the noise.
For the front-end integrated circuit, the basic rules
of printed-circuit board design and implementation
of analog components (such as additional operational
amplifiers) must be respected, particularly with respect
to power and ground connections.
The following additional recommendation is given for the
CDS input pin(s) which is /are internally connected to the
programmable gain amplifier.
The connections between the CCD interface and
CDS input should be as short as possible and a ground
ring protection around these connections can be
beneficial. Separate analog and digital supplies provide
the best solution. If this is not possible to do this on the
board then the analog supply pins must be decoupled
effectively from the digital supply pins. If the same power
supply and ground are used for all the pins then the
decouplingcapacitors must be placedasclose as possible
to the IC package.
In order to minimize the noise due to package and die
parasitics in a two-groundsystem, thefollowing measures
must be implemented:
• Allthe analog anddigitalsupply pins must bedecoupled
• The digital output pins andtheir associated lines should
TDA8787A
to the analog ground plane. Only the ground pin
associated with thedigital outputs mustbe connected to
thedigital ground plane. Alltheother ground pinsshould
be connected to the analog ground plane. The analog
anddigital ground planes mustbe connectedtogetherat
one point as close as possible to the ground pin
associated with the digital outputs.
be shielded by the digital ground plane which can then
be used as a return path for digital signals.
2000 Nov 14 17
Page 18
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
Application diagram
handbook, full pagewidth
(2) (2)
CCD
(2)
1 µF
V
V
CCD
CCA
1 µF
1 µF
1 µF
100
nF
V
CCD3
DGND3
AGND4
AGND1
V
CCA1
CPCDS1
CPCDS2
OFDOUT
STDBY
BLK
CLPDM
SHD
47 46 45 44 43 42 41 40 39 38 37
48
1
2
3
IN
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
SHP
OPGA
OPGAC
DCLPC
TDA8787AHL
1 µF
AGND5
V
CCA
V
100 nF
CCA3
AGND3
CLK
V
CCD
CCD2
DGND2
V
100 nF
OE
TDA8787A
V
CCD
D9
36
D8
35
D7
34
D6
33
D5
32
D4
31
D3
30
D2
29
D1
28
D0
27
OGND
26
V
CCO
25
100
nF
V
CCD
SEN
CCA2
100
nF
CCD1
V
V
TEST1
TEST2
V
CCA
TEST3
AGND2
V
CCD
(1) Pins SEN and VSYNC should be interconnected when no vertical synchronization signal is available, while control pin VSYNC should be
programmed by serial interface as LOW-level active.
(2) The timing of the signals on pins IN, SHD and SHP has to comply with the hold times t
CLPOB
SCLK
SDATA
DGND1
serial interface
100
nF
V
CCD
h(IN-SHP)
and t
VSYNC
FCE336
h(IN-SHD)
(1)
(see Fig.3).
Fig.11 Application diagram.
2000 Nov 14 18
Page 19
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
PACKAGE OUTLINE
LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm
c
y
X
36
37
25
Z
24
E
A
TDA8787A
SOT313-2
e
w M
pin 1 index
48
1
e
DIMENSIONS (mm are the original dimensions)
mm
A
A1A2A3bpcE
max.
0.20
0.05
1.45
1.35
1.60
UNIT
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
b
p
0.25
w M
D
H
D
0.27
0.17
12
Z
D
(1) (1)(1)
D
0.18
7.1
0.12
6.9
b
p
13
v M
B
v M
0 2.5 5 mm
scale
(1)
eH
H
7.1
6.9
0.5
9.15
8.85
D
E
A
B
9.15
8.85
H
E
LL
E
0.75
0.45
A
p
A
2
A
1
L
detail X
Z
D
0.12 0.10.21.0
0.95
0.55
(A )
3
L
p
Zywv θ
E
0.95
0.55
θ
o
7
o
0
OUTLINE
VERSION
SOT313-2 MS-026136E05
IEC JEDEC EIAJ
REFERENCES
2000 Nov 14 19
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
00-01-19
Page 20
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
SOLDERING
Introduction to soldering surface mount packages
Thistext gives a verybrief insighttoa complex technology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages.Wave soldering isnot always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit boardbyscreen printing, stencillingor
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating,soldering andcooling) vary
between 100 and 200 seconds depending on heating
method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Wave soldering
Conventional single wave soldering is not recommended
forsurfacemount devices (SMDs) orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
• For packages with leads on two sides and a pitch (e):
• Forpackageswith leads on foursides,thefootprint must
During placement andbefore soldering,the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
TDA8787A
turbulent wave with high upward pressure followed by a
smooth laminar wave.
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
2000 Nov 14 20
Page 21
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
TDA8787A
interface for CCD cameras
Suitability of surface mount IC packages for wave and reflow soldering methods
PACKAGE
BGA, SQFP not suitable suitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable
(3)
PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
5. Wave soldering is only suitable for SSOP andTSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
, SO, SOJ suitable suitable
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
The package footprint must incorporate solder thieves downstream and at the side corners.
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
WAVE REFLOW
(2)
(3)(4)
(5)
SOLDERING METHOD
(1)
suitable
suitable
suitable
.
2000 Nov 14 21
Page 22
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
TDA8787A
interface for CCD cameras
DATA SHEET STATUS
DATA SHEET STATUS
Objective specification Development This data sheet contains the design target or goal specifications for
Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be
Product specification Production This data sheet contains final specifications. Philips Semiconductors
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
atthese or at anyotherconditions above those giveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationor warranty that such applicationswill be
suitable for the specified use without further testing or
modification.
PRODUCT
STATUS
DEFINITIONS
product development. Specification may change in any manner without
notice.
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expectedto result inpersonal injury. Philips
Semiconductorscustomersusing or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseof any of theseproducts,conveysno licence or title
under any patent, copyright, or mask work right to these
products,and makes no representationsor warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
(1)
2000 Nov 14 22
Page 23
Philips Semiconductors Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
NOTES
TDA8787A
2000 Nov 14 23
Page 24
Philips Semiconductors – a w orldwide compan y
Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,
Tel. +61 2 9704 8141, Fax. +61 2 9704 8139
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,
Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773
Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 68 9211, Fax. +359 2 68 9102
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Colombia: see South America
Czech Republic: see Austria
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,
Tel. +45 33 29 3333, Fax. +45 33 29 3905
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615 800, Fax. +358 9 6158 0920
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,
Tel. +33 1 4099 6161, Fax. +33 1 4099 6427
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 2353 60, Fax. +49 40 2353 6300
Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966
Indonesia: PT Philips DevelopmentCorporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),
Tel. +39 039 203 6838, Fax +39 039 203 6800
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087
Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
Tel. +48 22 5710 000, Fax. +48 22 5710 001
Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
Tel. +27 11 471 5401, Fax. +27 11 471 5398
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 93 301 6312, Fax. +34 93 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263
Taiwan: Philips Semiconductors, 5F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2451, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
60/14 MOO 11, Bangna Trad Road KM. 3, Bagna, BANGKOK 10260,
Tel. +66 2 361 7910, Fax. +66 2 398 3447
Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors,
Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN,
The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
2000
Internet: http://www.semiconductors.philips.com
70
Printed in The Netherlands 753504/03/pp24 Date of release:2000 Nov 14 Document order number: 9397 750 07755
Loading...