Product specification
Supersedes data of 1995 May 11
File under Integrated Circuits, IC02
1996 Jun 04
Page 2
Philips SemiconductorsProduct specification
10-bit, 1000 Msps Digital-to-Analog
TDA8776A
Converter (DAC)
FEATURES
• 10-bit resolution
• Conversion rate up to 1000 MHz
• 10K/100K ECL input levels
• Internal reference voltage generator
• No deglitching circuit required
• Internal input register
• Power dissipation only 925 mW (typical)
• Internal 50 Ω output load (connected to the analog
ground)
• Very few external components required.
QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
V
V
V
EEA
EED
EEI
analog supply voltage−5.46−5.20−4.94V
digital supply voltage−5.46−5.20−4.94V
input stages digital supply
note 1−5.46−5.20−4.94V
voltage
I
EEA
I
EED
I
EEI
analog supply currentnote 1−108145mA
digital supply currentnote 1−6085mA
input stages digital supply
note 1−1015mA
current
V
OUT
− V
OUT
full-scale analog output voltage
notes 1 and 2; ZL=50Ω1.72.02.5V
(peak-to-peak value)
INLDC integral non-linearitynote 3−±0.3±0.5LSB
DNLDC differential non-linearitynote 3−±0.2±0.45LSB
f
clk(max)
t
S1
P
tot
maximum clock frequency1000−−MHz
settling time (differential)10% to 90% full scale; Fig.9 −0.5−ns
total power dissipation−925−mW
APPLICATIONS
High-speed digital-to-analog conversion for:
• High resolution video and graphics
• Direct digital synthesis (DDS)
• Telecommunication
• High-speed modems.
GENERAL DESCRIPTION
The TDA8776A is a 10-bit Digital-to-Analog Converter
(DAC) for high resolution video and other high frequency
applications. It converts the digital input signal into an
analog output voltage at a maximum conversion rate of
1000 Msps. No external reference voltage is required and
all digital inputs are 10K/100K-ECL compatible.
Notes
1. D0 to D9 connected to either HIGH or LOW level, CLK is HIGH and
2. The analog output voltages (V
OUT
and V
) are negative with respect to AGND (see Table 1). The external output
OUT
CLK is LOW.
resistance between AGND and each of these outputs is typically 50 Ω.
3. A warm-up time is necessary to reach optimal performances.
IGND12input ground for ECL input buffers
D013data input; bit 0 (LSB)
D114data input; bit 1
3digital supply voltage 1 (−5.2 V)
4digital supply voltage 2 (−5.2 V)
6analog voltage output 1
7analog voltage output 2
8complementary analog voltage
output 1
9complementary analog voltage
output 2
11digital supply voltage 3 (−5.2 V)
TDA8776A
SYMBOL PINDESCRIPTION
D215data input; bit 2
D316data input; bit 3
D417data input; bit 4
D518data input; bit 5
D619data input; bit 6
D720data input; bit 7
D821data input; bit 8
D922data input; bit 9 (MSB)
n.c.23not connected
V
24analog supply voltage (−5.2 V)
25input supply voltage for ECL input
buffers (−5.2 V)
AGND1
V
OUT1
V
OUT2
V
OUT1
V
OUT2
AGND2
V
EED3
EED2VEED1
V
4
3
2
5
6
7
8
9
10
11
12
IGND
TDA8776A
13
14
D0
Fig.2 Pin configuration.
n.c.
DGND1
DGND2
1
28
15
16
D1D2D3
CLK
27
17
D4
CLK
26
18
D5
25
24
23
22
21
20
19
MBE582
V
V
n.c.
D9
D8
D7
D6
EEI
EEA
1996 Jun 044
Page 5
Philips SemiconductorsProduct specification
10-bit, 1000 Msps Digital-to-Analog
TDA8776A
Converter (DAC)
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
EEA
V
EED
V
EEI
V
− V
EEA
EED
AGND − DGNDground voltage differential−0.1+0.1V
V
I
I
OUT/IOUT
T
stg
T
amb
T
j
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
analog supply voltage−7.0±0.3V
digital supply voltage−7.0±0.3V
input stages digital supply voltage−7.0±0.3V
supply voltage differential−0.5+0.5V
thermal resistance from junction to ambient in free air55 (typ.)K/W
1996 Jun 045
Page 6
Philips SemiconductorsProduct specification
10-bit, 1000 Msps Digital-to-Analog
TDA8776A
Converter (DAC)
CHARACTERISTICS
V
EEA=V24
V
EEI=V25
shorted together; V
V
EEA=VEED
Supply
V
EEA
V
EED
V
EEI
I
EEA
I
EED
I
EEI
AGND − DGNDground voltage differential−0.1−+0.1V
Inputs
D
IGITAL INPUTS (D9 TO D0) AND CLOCK INPUTS (CLK AND CLK)
V
IL
V
IH
I
IL
I
IH
f
clk(max)
Outputs (referenced to AGND); notes 1 and 2
V
OUT
Z
O
Transfer function
INLDC integral non-linearitynote 3−±0.3±0.5LSB
DNLDC differential non-linearitynote 3−±0.2±0.45LSB
to V5and V10= −5.46 to −4.94 V; V
to V12= −5.46 to −4.94 V; V
− V
OUT
= −5.2 V and T
= 2 V (p-p); ZL=50Ω; unless otherwise specified (typical values measured at
OUT
=25°C).
amb
EED
and V
EED=V3,V4
shorted together; T
EEI
and V11to V2and V28= −5.46 to −4.94 V;
=0to+70°C; AGND, DGND and IGND
amb
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
analog supply voltage−5.46−5.20−4.94V
digital supply voltage−5.46−5.20−4.94V
input stages digital supply voltagenote 1−5.46−5.20−4.94V
analog supply currentnote 1−108145mA
digital supply currentnote 1−6085mA
input stages digital supply currentnote 1−1015mA
LOW level input voltage−1.9−1.8−1.6V
HIGH level input voltage−1.2−0.9−0.8V
LOW level input currentVI= −1.8 V−−10µA
HIGH level input currentVI= −0.9 V−−20µA
maximum clock frequency1000−−MHz
− V
OUT(p-p)
full-scale analog output voltage
ZL=50Ω1.72.02.5V
(peak-to-peak value)
output impedance−50−Ω
Spurious free dynamic range (f
= 1000 MHz); V
clk
EEA=VEED
SFDRspurious free dynamic range
= 10 MHz−65−69−dB
f
OUT
f
= 50 MHz−−60−dB
OUT
f
= 100 MHz−52−57−dB
OUT
= 200 MHz−−46−dB
f
OUT
1996 Jun 046
= 5.2 V; T
=25°C; note 4; see Fig.3
amb
Page 7
Philips SemiconductorsProduct specification
10-bit, 1000 Msps Digital-to-Analog
TDA8776A
Converter (DAC)
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Switching characteristics (f
t
SU;DAT
t
HD;DAT
t
PD
t
S1
t
S2
t
d
data set-up time−400500ps
data hold time100150−ps
propagation delay time−0.80.9ns
settling time10% to 90% full scale−0.5−ns
settling timechange to ±1 LSB−2.0−ns
input to 50% output delay time−1.41.5ns
Output transients; glitches (f
E
g
differential glitch energy from codetransition 511 to 512−12pV.s
Notes
1. D0 to D9 connected to either HIGH or LOW level, CLK is HIGH and CLK is LOW.
2. The analog output voltages (V
resistance between AGND and each of these outputs is typically 50 Ω.
3. Due to on-chip regulator behaviour a warm-up time is necessary to reach optimal performances; a typical time is
1 minute.
4. Devices with higher SFDR (min.) can be delivered on special request.
5. The worst case characteristics are obtained at the transition from input code 0 to 1023 and if an external load
impedance greater than 50 Ω is connected between V
The specified values have been measured directly on a 50 Ω load between V
impedance between V
6. The data set-up (t
SU;DAT
stable in order to be correctly registered. A negative set-up time indicates that the data may be initiated after the
falling edge of the clock and still be recognized. The data hold time (t
falling edge of the clock that the input data must be stable in order to be correctly registered. A negative hold time
indicates that the data may be released prior to the falling edge of the clock and still be recognized.
7. The definition of glitch energy and the measurement set-up are shown in Fig.10. The glitch energy is measured at
the input transition between code 511 to 512.
= 1000 MHz); notes 5 and 6; see Figs 8 and 9
clk
= 1000 MHz); note 7; see Fig.10
clk
and V
OUT
and AGND has been applied. All input data is latched at the falling edge of the clock.
OUT
) are negative with respect to AGND (see Table 1). The external output
OUT
OUT
or V
and AGND in parallel with the external 50 Ω load.
OUT
and AGND. No further load
OUT
) is the minimum period preceding the falling edge of the clock that the input data must be
) is the minimum period following the
HD;DAT
Table 1 Input coding and DAC output voltages (typical values; referenced to AGND regardless of the offset voltage)
The shaded areas indicate when the input data may change and be correctly registered. Data input update must be completed within tbf ns after the
falling edge of the clock (t
is negative; tbf ns). Data must be held at least tbf ns after the falling edge (t
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
cases reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“IC Package Databook2
(order code 9398 65290011).
Reflow soldering
Reflow soldering techniques are suitable for all PLCC
packages.
The choice of heating method may be influenced by larger
plastic packages (44 leads, or more). If infrared or vapour
phase heating is used and the large packages are not
absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For more
information, refer to the Drypack chapter in our
Reference Manual”
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
(order code 9398 510 63011).
”
“Quality
TDA8776A
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration:
45 minutes at 45 °C.
Wave soldering
Wave soldering techniques can be used for all PLCC
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds at 270 to 320 °C
1996 Jun 0416
Page 17
Philips SemiconductorsProduct specification
10-bit, 1000 Msps Digital-to-Analog
TDA8776A
Converter (DAC)
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 708 296 8556
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 825 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands537021/1200/02/pp20 Date of release: 1996 Jun 04Document order number: 9397 750 00888
Internet: http://www.semiconductors.philips.com/ps/
(1)ADDRESS CONTENT SOURCE April 2, 1998
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.