Datasheet tda8764a DATASHEETS (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8764A

10-bit high-speed low-power ADC

Product specification
File under Integrated Circuits, IC11

2000 Jul 03

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

FEATURES

• 10-bit resolution (binary or gray code)

• Sampling rate up to 60 MHz

• DC sampling allowed

• One clock cycle conversion only

• High signal-to-noise ratio over a large analog input

frequency range (9.3 effective bits at 5 MHz full-scale
input at f

= 60 MHz)

clk

• No missing codes guaranteed

• In Range (IR) CMOS output

• TTL and CMOS levels compatible digital inputs

• 2.7 to 3.6 V CMOS digital outputs

• Low-level AC clock input signal allowed

• Power dissipation only 312 mW

• Low analog input capacitance, no buffer amplifier

required

• No sample-and-hold circuit required.

ORDERING INFORMATION

APPLICATIONS

High-speed analog-to-digital conversion for:

• Video data digitizing

• Radar pulse analysis

• High energy physics research

• Transient signal analysis

•Σ∆modulators

• Medical imaging.

GENERAL DESCRIPTION

The TDA8764A is a 10-bit high-speed low-power
Analog-to-Digital Converter (ADC) for professional video
and other applications. It converts the analog input signal
into10-bitbinaryorgraycodeddigitalwordsatamaximum
sampling rate of 60 MHz. All digital inputs and outputs are
TTL and CMOS compatible, although a low-level sine
wave clock input signal is allowed.

The device requires an external source to drive its
reference ladder.

TYPE NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA8764ATS/6 SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1
TDA8764AHL/6 LQFP32 plastic low profile quad flat package; 32 leads; body 5 × 5 × 1.4 mm SOT401-1

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CCA

V

CCD

V

CCO

I

CCA

I

CCD

I

CCO

INL integral non-linearity f
DNL differential non-linearity f
f

clk(max)

analog supply voltage 4.75 5.0 5.25 V
digital supply voltage 4.75 5.0 5.25 V
output stages supply voltage 2.7 3.3 3.6 V
analog supply current − 29 37 mA
digital supply current − 33 40 mA
output stages supply current f

maximum clock frequency TDA8764ATS and

= 60 MHz; ramp input − 0.5 2.0 mA

clk

= 60 MHz; ramp input −±0.8 ±2 LSB

clk

= 60 MHz; ramp input −±0.35 ±0.9 LSB

clk

60 −−MHz

TDA8764AHL

P

tot

total power dissipation f

= 60 MHz; ramp input − 312 411 mW

clk

2000 Jul 03 2

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

BLOCK DIAGRAM

handbook, full pagewidth

V

RT

analog

voltage input

V

RM

V

RB

V

CCA

3 (7) 1 (5) 10

9 (15)

V

8 (14)

I

7 (13)

6 (12)

ANALOG-TO-DIGITAL

CONVERTER

R

LAD

TDA8764A

4 (8) 12 (18)
AGND

DGND n.c.

CLK

CLOCK DRIVER

IN-RANGE LATCH

5, 27, 28
(9, 1, 3, 4, 10, 11, 32)

V

LATCHES

CCD

14 (20)

OGND

GRAY

OE

(16)

CMOS

OUTPUTS

CMOS

OUTPUT

15 (21)11 (17)

(6) 2

(31) 25
(30) 24
(29) 23
(28) 22
(27) 21
(26) 20
(25) 19
(24) 18

(23) 17
(22) 16

(19) 13

(2) 26

FCE253

TC

D9

MSB

D8
D7
D6
D5
D4
D3
D2
D1

LSB

D0
V

CCO

IR output

data outputs

The pin numbers given in parenthesis refer to the TDA8764AHL.

Fig.1 Block diagram.

2000 Jul 03 3

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

PINNING

SYMBOL

DESCRIPTION

TDA8764ATS TDA8764AHL

CLK 1 5 clock input
TC 2 6 twos complement input (active LOW)

PIN

V

CCA

3 7 analog supply voltage (5 V)
AGND 4 8 analog ground
n.c. 5 9 not connected
V

RB

V

RM

V

I

V

RT

6 12 reference voltage BOTTOM input

7 13 reference voltage MIDDLE input

8 14 analog input voltage

9 15 reference voltage TOP input
OE 10 16 output enable input (active LOW)
V

CCD

11 17 digital supply voltage (5 V)
DGND 12 18 digital ground
V

CCO

13 19 supply voltage for output stages (2.7 to 3.6 V)
OGND 14 20 output ground
GRAY 15 21 gray code input (active HIGH)
D0 16 22 data output; bit 0 (LSB)
D1 17 23 data output; bit 1
D2 18 24 data output; bit 2
D3 19 25 data output; bit 3
D4 20 26 data output; bit 4
D5 21 27 data output; bit 5
D6 22 28 data output; bit 6
D7 23 29 data output; bit 7
D8 24 30 data output; bit 8
D9 25 31 data output; bit 9 (MSB)
IR 26 2 in range data output
n.c. 27 1 not connected
n.c. 28 3 not connected
n.c. − 4 not connected
n.c. − 10 not connected
n.c. − 11 not connected
n.c. − 32 not connected

2000 Jul 03 4

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

handbook, halfpage

Fig.2 Pin configuration (SSOP28).

CLK

TC

V

CCA

AGND

n.c.

V

RB

V

RM

V

RT

OE

V

CCD
DGND
V

CCO
OGND

1
2
3
4
5
6
7

V

8

I

9
10
11
12
13

TDA8764ATS

FCE254

n.c.

28
27

n.c.
IR

26
25

D9

24

D8

23

D7

22

D6
D5

21
20

D4
D3

19

D2

18

D1

17

D0

16

GRAY

1514

handbook, full pagewidth

n.c.

n.c.
n.c.

CLK

TC

V

CCA

AGND

n.c.
32

1

IR

2
3
4
5
6
7
8

9

n.c.

D8

D9
31

30

TDA8764AHL

10

11

n.c.

n.c.

Fig.3 Pin configuration (LQFP32).

2000 Jul 03 5

D7
29

12

RB

V

V

D6
28

13
RM

D5

D4

D3

27

26

25

D2

24

D1

23
22

D0
GRAY

21
20

OGND
V

19

CCO

18

DGND
V

17

CCD

14

15

I

V

RT

V

16
OE

FCE255

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CCA

V

CCD

V

CCO

∆V

CC

V

I

V

i(sw)(p-p)

I

O

T

stg

T

amb

T

j

analog supply voltage note 1 −0.3 +7.0 V
digital supply voltage note 1 −0.3 +7.0 V
output stages supply voltage note 1 −0.3 +7.0 V
supply voltage difference between

V
V
V

CCA
CCA
CCD

− V

− V

− V

CCD
CCO
CCO

−1.0 +1.0 V

−1.0 +4.0 V

−1.0 +4.0 V

input voltage referenced to AGND −0.3 +7.0 V
AC input voltage for switching (peak-to-peak value) referenced to DGND − V

CCD

V
output current − 10 mA
storage temperature −55 +150 °C
ambient temperature −40 +85 °C
junction temperature − 150 °C

Note

1. The supply voltages V

CCA

, V

CCD

and V

may have any value between −0.3 and +7.0 V provided that the supply

CCO

voltage differences ∆VCC are respected.

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air

SSOP28 110 K/W
LQFP32 90 K/W

2000 Jul 03 6

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

CHARACTERISTICS

V

= 4.75 to 5.25 V; V

CCA

T

= 0 to 70 °C; typical values measured at V

amb

and T

=25°C; unless otherwise specified.

amb

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supplies

V
V
V
∆V

CCA
CCD
CCO

CC

analog supply voltage 4.75 5.0 5.25 V
digital supply voltage 4.75 5.0 5.25 V
output stages supply voltage 2.7 3.3 3.6 V
supply voltage difference

between

V

− V

CCA

V

− V

CCA

V

− V

CCD

I

CCA

I

CCD

I

CCO

analog supply current − 29 37 mA
digital supply current − 33 40 mA
output stages supply current f

Inputs

= 4.75 to 5.25 V; V

CCD

CCD
CCO
CCO

= 2.7 to 3.6 V; AGND and DGND shorted together;

CCO
CCA=VCCD

=5V; V

= 3.3 V; VRB= 1.3 V; VRT= 3.7 V; CL=10pF

CCO

−0.20 −+0.20 V

−0.20 − +2.55 V

−0.20 − +2.55 V

= 60 MHz; ramp input − 0.5 2.0 mA

clk

PIN CLK (REFERENCED TO DGND); note 1
V

IL

V

IH

I

IL

I

IH

C

i

LOW-level input voltage 0 − 0.8 V
HIGH-level input voltage 2 − V
LOW-level input current V
HIGH-level input current V

= 0.8 V −10+1 µA

CLK

=2V − 210 µA

CLK

input capacitance − 2 − pF
PINS OE; TC AND GRAY (REFERENCED TO DGND); see Tables 3 and 4
V

IL

V

IH

I

IL

I

IH

LOW-level input voltage 0 − 0.8 V

HIGH-level input voltage 2 − V

LOW-level input current VIL= 0.8 V −1 −− µA

HIGH-level input current VIH=2V −−1 µA
PIN VI(ANALOG INPUT VOLTAGE REFERENCED TO AGND)
I

IL

I

IH

Y

i

LOW-level input current VI=VRB= 1.3 V − 0 −µA

HIGH-level input current VI=VRT= 3.7 V − 55 −µA

input admittance fi= 5 MHz; note 2

R

input resistance − 45 − kΩ

i

C

input capacitance 3 5 7 pF

i

CCD

CCD

V

V

2000 Jul 03 7

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Reference voltages for the resistor ladder; see Table 1

V

RB

V

RT

V

diff(ref)

I

ref

R

LAD

TC

RLAD

V

offset(B)

V

offset(T)

V

I(p-p)

Outputs

reference voltage BOTTOM 1.2 1.3 2.2 V

reference voltage TOP 3.4 3.7 V

differential reference voltage

VRT− V

RB

reference current V

= 2.4 V − 17.6 − mA

diff

2.2 2.4 3.2 V

− 0.8 V

CCA

resistor ladder − 136 −Ω

temperature coefficient of the

resistor ladder

offset voltage BOTTOM V

offset voltage TOP V

analog input voltage

= 2.4 V; note 3 − 200 − mV

diff

= 2.4 V; note 3 − 190 − mV

diff

V

= 2.4 V; note 4 1.95 2.01 2.10 V

diff

− 1860 − ppm

− 253 − mΩ/K

(peak-to-peak value)

PINS D9 TO D0 AND IR (REFERENCED TO OGND)
V

OL

V

OH

I

OZ

LOW-level output voltage IOL= 1 mA 0 − 0.5 V

HIGH-level output voltage IOH= −1mA V

output current in 3-state mode 0.5 V < VO<V

Switching characteristics

PIN CLK; see Fig.5; note 1
f

clk(max)

t

CPH

t

CPL

maximum clock frequency 60 −− MHz

clock pulse width HIGH T

clock pulse width LOW T

Analog signal processing

LINEARITY
INL integral non-linearity f

DNL differential non-linearity f

E
E

offset
G

offset error middle code −±1− LSB

gain error (from device to device) note 5 −±0.5 − %

− 0.5 − V

CCO

CCO

=25°C 7.0 −− ns

amb

=25°C 3.5 −− ns

amb

= 60 MHz; ramp input −±0.8 ±2 LSB

clk

= 60 MHz;ramp input;

clk

−20 − +20 µA

−±0.35 ±0.9 LSB

CCO

no missing code

V

2000 Jul 03 8

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

BANDWIDTH (f

=60MHZ)

CLK

B analog bandwidth full-scale sine wave;

note 6
75% full-scale sine wave;

note 6
small signal at mid-scale;

V

= ±10 LSB at

I

code 512; note 6

t

stLH

t

stHL

HARMONICS (f
H

all(FS)

analog input settling time

LOW-to-HIGH

analog input settling time

HIGH-to-LOW

=60MHZ)

CLK

harmonics (full-scale);

full-scale square wave;
see Fig.7; note 7

full-scale square wave;
see Fig.7; note 7

fi= 5 MHz

all components

second harmonic −−68 − dB

third harmonic −−67 − dB
SFDR spurious free dynamic range f
THD total harmonic distortion f

= 5 MHz − 72 − dB

i

= 5 MHz −−64 − dB

i

f

=15MHz −−57 − dB

i

SIGNAL-TO-NOISE RATIO; note 8
SNR

signal-to-noise ratio (full-scale) without harmonics;

FS

f

= 60 MHz; fi= 5 MHz

clk

without harmonics;
f

= 60 MHz; fi= 15 MHz

clk

EFFECTIVE BITS; note 8
EB

effective bits f

=60MHz

clk

f

= 5 MHz − 9.3 − bits

i

f

= 10 MHz − 8.9 − bits

i

f

= 15 MHz − 8.8 − bits

i

= 20 MHz − 8.6 − bits

f

i

TWO-TONE; note 9
TTID two-tone intermodulation

f

=60MHz −−67 − dB

clk

distortion
BIT ERROR RATE
BER bit error rate f

= 60 MHz; fi= 5 MHz;

clk

VI= ±16 LSB at code 512

− 30 − MHz

− 45 − MHz

− 700 − MHz

− 5 − ns

− 5 − ns

− 58 − dB

53 57 − dB

− 10

−13

− times/

sample

2000 Jul 03 9

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Timing (f

t

ds

t

h

t

d

t

d

C

L

SR slew rate V

3-state output delay times (f

t

dZH

t

dZL

t

dHZ

t

dLZ

= 60 MHz; CL= 10 pF); see Fig.5 and note 10

clk

sampling delay time − 0.7 2 ns

output hold time 4 −− ns

output delay time TDA8764ATS V

output delay time TDA8764AHL V

= 2.7 V − 10 14 ns

CCO

V

= 3.3 V − 913 ns

CCO

= 2.7 V − 13 17 ns

CCO

V

= 3.3 V − 12 16 ns

CCO

digital output load capacitance −−10 pF

= 2.7 V 0.2 0.3 − V/ns

CCO

= 60 MHz); see Fig.6

clk

enable HIGH V

enable LOW V

disable HIGH V

disable LOW V

= 3.3 V − 16 20 ns

CCO

= 3.3 V − 30 34 ns

CCO

= 3.3 V − 25 30 ns

CCO

= 3.3 V − 23 27 ns

CCO

Notes

1. The rise and fall times of the clock signal must not be less than 0.5 ns.
1

2. The input admittance is

Y

i

j ω Ci+=

----­R

i

3. Analog input voltages producing code 0 up to and including code 1023:

a) V

and the reference voltage BOTTOM (VRB) at T

b) V

produces data outputs equal to code 1023 at T

(offset voltage BOTTOM) is the difference between the analog input which produces data equal to 00

offset(B)

=25°C.

amb

(offset voltage TOP) is the difference between VRT(reference voltage TOP) and the analog input which

offset(T)

=25°C.

amb

4. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities

of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
pins VRB and VRT via offset resistors ROB and ROT as shown in Fig.4.

a) Thecurrentflowinginto the resistor ladder is andthefull-scaleinput range at the converter,

to cover code 0 to 1023, is

b) Since R

-----------------------------------------­ROBRLR

, ROB and ROT have similar behaviour with respect to process and temperature variation, the ratio

L

R

L

++

will be kept reasonably constant from device to device. Consequently variation of the output

OT

V

×

== V(

IRLIL

I

L

-----------------------------------------­R

OBRLROT

codes at a given input voltage depends mainly on the differenceV

VRTVRB–

=

------------------------------------------

++

R

OBRLROT

R

L

++

× VRB)– 0.˙8375 V(

RT

− VRBand its variation with temperature and

RT

RTVRB

)–×=

supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the
matching between each of them is then optimized.

V

–()V

V

i(p-p)

–

i(p-p)

100×=

E

5.

G

1023V0

----------------------------------------------------

6. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device.

No glitches greater than 2 LSBs, nor any significant attenuation are observed in the reconstructed signal.

2000 Jul 03 10

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

7. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale

input (square wave signal) in order to sample the signal and obtain correct output data.

8. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent

fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(Nyquist frequency). Conversion to signal-to-noise ratio: S/N = EB × 6.02 + 1.76 dB.

9. Intermodulation measured relative to either tone with analog input frequencies of 4.5 and 4.3 MHz. The two input

signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter.

10. Output data acquisition: the output data is available after the maximum delay time of td. It is recommended to have

the lowest possible output load. These parameters are guaranteed by characterization and not by production test.

handbook, halfpage

V

RT

R

OT

R

L

R

I

L

OB

FCE256

V

RM

V

RB

R

LAD

Fig.4 Explanation of note 4.

code 1023

code 0

2000 Jul 03 11

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

Table 1 Output coding and input voltage (typical values; referenced to AGND; VRB= 1.3 V; VRT= 3.7 V; binary/gray

codes

STEP V

U/F <1.5 0 0 0 0 0 0 0 0 0 0 0 0000000000

0 1.5 100000000000000000000
1 : 100000000010000000001

: : :::::::::::::::::::::

: : :::::::::::::::::::::
1022 : 111111111101000000001
1023 3.51 1 1 1 1 1 1 1 1 1 1 1 1000000000

O/F >3.51 0 1 1 1 1 1 1 1 1 1 1 1000000000

Table 2 Output coding and input voltage (typical values; referenced to AGND; binary/twos complement codes

STEP V

U/F <1.5 0 0 0 0 0 0 0 0 0 0 0 1000000000

0 1.5 100000000001000000000
1 : 100000000011000000001

: : :::::::::::::::::::::

: : :::::::::::::::::::::
1022 : 111111111100111111110
1023 3.51 1 1 1 1 1 1 1 1 1 1 1 0111111111

O/F >3.51 0 1 1 1 1 1 1 1 1 1 1 0111111111

IR

I

I

D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

IR

D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

BINARY OUTPUT BITS GRAY OUTPUT BITS

BINARY OUTPUT BITS TWOS COMPLEMENT OUTPUT BITS

Table 3

Table 4 Gray mode selection

2000 Jul 03 12

TC mode selection

TC OE D9 to D0 IR

X 1 high-impedance high-impedance
0 0 active; twos complement active
1 0 active; binary active

GRAY

X 1 high-impedance high-impedance
0 0 active; binary active
1 0 active; gray active

OE D9 to D0 IR

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

t

CPH

CPL

sample N + 1

sample N + 2

V

IH

50%
V

IL

handbook, full pagewidth

CLK

V

l

t

sample N

handbook, full pagewidth

data LOW

output

V

CCD

OE

t

DATA
D0 to D9

dLZ

DATA

N - 2

t

ds

DATA

N - 1

t

Fig.5 Timing diagram.

t

t

dZL

HIGH

d

dHZ

HIGH

DATA

N

t

h

FCE257

50%

t

dZH

HIGH
50%
LOW

50%

90%

DATA

N + 1

LOW

50%

output

data HIGH

LOW

10%

TDA8764A

OE

fOE= 100 kHz.

Fig.6 Timing diagram and test conditions of 3-state output delay time.

Fig.6 Timing diagram and test conditions of 3-state output delay time.

2000 Jul 03 13

3.3 kΩ

10 pF

S1

V

CCD

TEST S1

t

dLZ

t

dZL

t

dHZ

t

dZH

V

CCD

V

CCD

DGND
DGND

FCE258

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

handbook, full pagewidth

code 1023

V

code 0

CLK

t

stLH

I

50%

2 ns

50%

0.5 ns

t

2 ns

50%

Fig.7 Analog input settling-time diagram.

stHL

50%

0.5 ns

FCE259

2000 Jul 03 14

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

INTERNAL PIN CONFIGURATIONS

handbook, halfpage

Fig.8 CMOS data and in range outputs.

FCE260

V

CCO

D9 to D0

IR

OGND

handbook, halfpage

V

CCA

V

I

AGND

FCE261

Fig.9 Analog input.

handbook, halfpage

V

CCO

OE
TC

GRAY

OGND

FCE262

Fig.10 OE, GRAY and TC inputs.

2000 Jul 03 15

handbook, halfpage

V

CCA

V
V
V

AGND

RT

R

RM
RB

LAD

FCE263

Fig.11 VRB, VRM and VRT inputs.

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

handbook, halfpage

V

CCD

CLK

DGND

1.5V

FCE264

Fig.12 CLK input.

2000 Jul 03 16

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

APPLICATION INFORMATION

handbook, halfpage

100 nF

100 nF

100 nF

AGND

100 nF

100 nF

AGND

AGND

33 Ω

(3)

(2)

(2)

CLK

V

CCA

AGND

V

RB

V

RM

V

RT

V

CCD

DGND

TC

n.c.

(1)

(1)

V

OE

I

(1)

1

2

3

4

5

6

7

TDA8764ATS

8

9

10

11

12

n.c.

28

n.c.

27

IR

26

D9

25

D8

24

D7

23

D6

22

D5

21

D4

20

D3

19

D2

18

D1

17

V

CCO

13

100 nF

The analog and digital supplies should be separated and well decoupled.

An application note is available and describes the design and the realization of a demoboard that uses TDA8764ATS with an application environment.

(1) VRB, VRM and VRT are decoupled to AGND.

(2) Decoupling capacitor for supplies must be placed close to the device.

(3) This resistor is mandatory (33 Ω is its minimum value) and must be near the clock source.

(2)

OGND

14

16

15

FCE265

D0

GRAY

Fig.13 Application diagram (SSOP28).

2000 Jul 03 17

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

handbook, full pagewidth

100 nF

D6 D5 D4n.c. D3D9 D8 D7

n.c.

n.c.

n.c.

33 Ω

CLK

(3)

TC

V

CCA

(2)

AGND

32 31 30 29 28 27 26 25

1

IR

2

3

4

TDA8764AHL

5

6

7

8

12 13 14

9

n.c.

11

10

n.c.

n.c.

(1)

100 nF

V

V

RM

RB

(1)

100 nF

AGNDAGND

D2

24

D1

23

D0

22

GRAY

21

OGND

20

V

CCO

19

DGND

18

V

CCD

17

16

15

V

I

AGND

V

RT

(1)

100 nF

OE

(2)

100 nF

(2)

100 nF

FCE266

The analog and digital supplies should be separated and well decoupled.

An application note is available and describes the design and the realization of a demoboard that uses TDA8764AHL with an

application environment.

, VRM and VRT are decoupled to AGND.

(1) V

RB

(2) Decoupling capacitor for supplies must be placed close to the device.

(3) This resistor is mandatory (33 Ω is its minimum value) and must be near the clock source.

Fig.14 Application diagram (LQFP32).

2000 Jul 03 18

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

PACKAGE OUTLINES

SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm

SOT341-1

D

c

y

Z

28 15

A

2

A

pin 1 index

114

w M

b

e

p

1

E

H

E

L

detail X

Q

L

p

(A )

A

X

v M

A

A

3

θ

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT A1A2A

mm

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

A

max.

0.21

0.05

1.80

1.65

IEC JEDEC EIAJ

2.0

OUTLINE
VERSION

SOT341-1 MO-150

0.25

b

3

p

0.38

0.20

0.25

0.09

(1)E(1) (1)

cD

10.4

5.4

10.0

REFERENCES

0.65 1.25

5.2

2000 Jul 03 19

eHELLpQZywv θ

7.9

7.6

1.03

0.63

0.9

0.7

EUROPEAN

PROJECTION

0.13 0.10.2

1.1

0.7

ISSUE DATE

95-02-04
99-12-27

o

8

o

0

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm

c

y

X

A

H

E

E

A

2

A

A

25

32

24

17

Z

16

E

e

b

w M

p

pin 1 index

9

1

8

SOT401-1

(A )

1

L

L

detail X

3

θ

p

Z

e

b

p

D

H

D

w M

D

B

v M

v M

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT

mm

A

max.

1.60

A

1A2A3bp

0.15

1.5

1.3

0.25

0.05

cE

0.27

0.18

0.17

0.12

(1)

(1) (1)(1)

D

5.1

4.9

eH

H

5.1

4.9

0.5

7.15

6.85

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE
VERSION

IEC JEDEC EIAJ

REFERENCES

SOT401-1 136E01 MS-026

2000 Jul 03 20

B

D

A

7.15

6.85

LL

E

1.0

0.75

0.45

p

0.2

0.12 0.1

EUROPEAN

PROJECTION

Z

0.95

0.55

D

Zywv θ

E

o

0.95

7

o

0.55

0

ISSUE DATE

99-12-27
00-01-19

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

SOLDERING
Introduction to soldering surface mount packages

Thistextgivesavery brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wavesoldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board by screen printing,stencillingor
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswithleadsonfoursides,the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Wave soldering

Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)orprinted-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

2000 Jul 03 21

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

WAVE REFLOW

(1)

BGA, LFBGA, SQFP, TFBGA not suitable suitable

SOLDERING METHOD

HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable

(3)

PLCC

, SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

(2)

(3)(4)
(5)

suitable

suitable
suitable

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

2000 Jul 03 22

Philips Semiconductors Product specification

10-bit high-speed low-power ADC TDA8764A

DATA SHEET STATUS

DATA SHEET STATUS

Objective specification Development This data sheet contains the design target or goal specifications for

Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be

Product specification Production This data sheet contains final specifications. Philips Semiconductors

Note

1. Please consult the most recently issued data sheet before initiating or completing a design.

DEFINITIONS
Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseor at any other conditions above those given inthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.

PRODUCT

STATUS

DEFINITIONS

product development. Specification may change in any manner without
notice.

published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.

reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.

DISCLAIMERS
Life support applications  These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected toresult in personal injury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofanyoftheseproducts,conveys no licence or title
under any patent, copyright, or mask work right to these
products,andmakes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.

(1)

2000 Jul 03 23

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Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

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New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

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Philippines: Philips Semiconductors Philippines Inc.,

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Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

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United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
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Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

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For all other countries apply to: Philips Semiconductors,
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© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

2000

Internet: http://www.semiconductors.philips.com

70

Printed in The Netherlands 613502/01/pp24 Date of release: 2000 Jul 03 Document order number: 9397 750 06996