Datasheet tda8574 DATASHEETS (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8574

Class-H high-output voltage level
line driver

Product specification
Supersedes data of 1997 Feb 26
File under Integrated Circuits, IC01

1998 Oct 16

Philips Semiconductors Product specification

Class-H high-output voltage level line
driver

FEATURES

• Output voltage swing larger than supply voltage

• High supply voltage ripple rejection

• Low distortion

• Low noise

• ESD protected on all pins.

GENERAL DESCRIPTION

The TDA8574(T) is a two channel class-H high-output
voltage line driver for use in car audio applications.
The line driver behaves as a non-inverting amplifier with a
gain of 8 dB and a single-ended output. Due to the class-H
voltage lifting principle the voltage swing over the load is
more than the supply voltage. With a supply voltage of 9 V
the output voltage swing over the load will be
14 V (peak-to-peak).

QUICK REFERENCE DATA

TDA8574

The TDA8574 is available in a DIP16 package and the
TDA8574T in a SO16 package.

Line drivers are necessary in car audio systems in which
the power amplifiers are driven by long cables.
The signal-to-noise ratio of these car audio systems is
improved by using the TDA8574(T) class-H high-output
level line driver. The high-output level of TDA8574(T)
enables a reduction of the gain of the power amplifier
resulting in an improvement of the power amplifier
performance.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

I

CC

G

v

V

o(rms)

supply voltage 6 9 12 V
supply current VCC=9V − 813mA
voltage gain 7.5 8 8.5 dB

maximal output voltage (RMS value) THD = 0.1% 5.0 5.2 − V
SVRR supply voltage ripple rejection 50 65 − dB
THD total harmonic distortion V
V

no

Z

 output impedance −−10 Ω

o

noise output voltage − 5 −µV

= 3 V; f = 1 kHz − 0.003 − %

o(rms)

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

TDA8574T SO16 plastic small outline package; 16 leads; body width 7.5 mm SOT162-1
TDA8574 DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4

1998 Oct 16 2

Philips Semiconductors Product specification

Class-H high-output voltage level line
driver

BLOCK DIAGRAM

handbook, full pagewidth

V

SVRL

CCL

1

BUFFER

3

BUFFER

REFERENCE

24 kΩ

30 kΩ

V

−
+

+

−

V

36 kΩ

CCL

CCL

LIFT

AMP.

SIGNAL

AMP.

TDA8574

16

CL+

15

CL−

13

OUTL

INL

INML

INMR

INR

SVRR

V

CCR

2
4

5
7

REFERENCE

6

8

BUFFER

BUFFER

TDA8574(T)

30 kΩ

24 kΩ

V

−
+

+

−

V

36 kΩ

CCR

CCR

5 Ω

SIGNAL

AMP.

LIFT

AMP.

14

11

12

10

MGE668

LGND

RGND

OUTR

CR−

9

CR+

Fig.1 Block diagram.

1998 Oct 16 3

Philips Semiconductors Product specification

V

Class-H high-output voltage level line
driver

PINNING

SYMBOL PIN DESCRIPTION

V

CCL

INL 2 input voltage left channel
SVRL 3 SVRR left channel
INML 4 inverting input left channel
INMR 5 inverting input right channel
SVRR 6 SVRR right channel
INR 7 input voltage right channel
V

CCR

CR+ 9 lift capacitor (+) right channel
CR− 10 lift capacitor (−) right channel
RGND 11 ground right channel
OUTR 12 output voltage right channel
OUTL 13 output voltage left channel
LGND 14 ground left channel
CL− 15 lift capacitor (−) left channel
CL+ 16 lift capacitor (+) left channel

1 supply voltage left channel

8 supply voltage right channel

handbook, halfpage

V

1

CCL

INL

2
3

SVRL

4

INML

INMR

SVRR

INR

V

CCR

TDA8574

TDA8574T

5
6
7
8

MGE667

Fig.2 Pin configuration.

TDA8574

16

CL+

15

CL−

14

LGND

13

OUTL

12

OUTR

11

RGND

10

CR−

9

CR+

FUNCTIONAL DESCRIPTION
Lift amplifier

The lift amplifier, referred to as LIFT AMP. in Fig.1, is used
as a non-inverting amplifier with a voltage gain of 8 dB set
by an internal feedback network. If the output voltage of
the signal amplifier is low, the external lift capacitor is
recharged by the lift amplifier. As soon as the output
voltage of the signal amplifier increases above 0.87 × V

CC

the lift amplifier switches the voltage of the lift capacitor in
series with the supply voltage VCC. The voltage at the
positive side of the lift capacitor is referred to as lifted
supply voltage.

Signal amplifier

The signal amplifier, referred to as SIGNAL AMP. in Fig.1,
is used as a non-inverting amplifier. The voltage gain G

is

v

set by the feedback resistors according to the formula:

R

G

v

2

1

+=

------ ­R

1

and should be set to 8 dB. The LIFT AMP. and SIG AMP.
must have equal voltage gain Gv. The rail-to-rail output
stage of the signal amplifier uses the lifted supply voltage
to increase the output voltage swing.

The DC output level is set to ≈0.87 × V

The maximum

CC.

peak-to-peak output voltage of the signal amplifier is
calculated with the formula:

op p–()max

20.87VCC0.4–()×≈

Buffers

The buffers prevent loading of the internal voltage divider
network made by a series connection of resistors. For a
good supply voltage ripple rejection this internal voltage
divider network has to be decoupled by an external
capacitor.

Reference

This circuit supplies all currents needed in the device.

1998 Oct 16 4

Philips Semiconductors Product specification

Class-H high-output voltage level line

TDA8574

driver

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC

I

ORM

T

stg

T

amb

T

j

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

supply voltage operating − 12 V

repetitive peak output current − 20 mA

storage temperature −55 +150 °C

operating ambient temperature −40 +85 °C

junction temperature − +150 °C

thermal resistance from junction to ambient in free air

TDA8574 (DIP16) 75 K/W
TDA8574T (SO16) 110 K/W

1998 Oct 16 5

Philips Semiconductors Product specification

Class-H high-output voltage level line

TDA8574

driver

DC CHARACTERISTICS

V

=9V; T

CC

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

I

CC

V

O

Note

1. The DC output voltage with respect to ground is ≈0.87 × V

AC CHARACTERISTICS

V

= 9 V; f = 1 kHz; RL=10kΩ; T

CC

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

G

v

∆G

 channel unbalance −−0.5 dB

v

α

cs

f

lr

f

hr

 input impedance 22 30 38 kΩ

Z

i

Z

 output impedance −−10 Ω

o

V

o(max)(rms)

V

no

THD + N total harmonic distortion plus

SVRR supply voltage ripple rejection note 7 50 65 − dB

=25°C; RL=10kΩ; in accordance with application diagram (see Fig.3).

amb

supply voltage Vin=0V 6 9 12 V

supply current − 813mA

DC output voltage note 1 − 7.8 − V

CC.

=25°C; in accordance with test circuit (see Fig.3); note 1.

amb

voltage gain 7.5 8 8.5 dB

channel separation Rs= 600 Ω; V

= 1 V; note 1 80 90 − dB

o(rms)

low frequency roll-off −1 dB; note 2 −−5Hz
high frequency roll-off −1dB 20 −−kHz

maximum output voltage

THD + N = 0.1% 5.0 5.2 − V

(RMS value)
noise output voltage unweighted; note 3 − 79µV

A-weighted; note 4 − 5 −µV

noise

f = 1 kHz; V
f = 17 Hz to 20 kHz; note 6 − 0.01 − %

= 3 V (RMS); note 5 − 0.003 0.01 %

o

f = 20 Hz to 20 kHz; note 8 − 55 − dB

Notes

1. The channel separation is determined by the parasitic capacitance between the inverting input left channel (pin 4)
and the inverting input right channel (pin 5). The PCB layout has a major contribution to the parasitic capacitance.
To obtain best results, the PCB tracks to pin 4 and pin 5 should be separated as much as possible.

2. The frequency response is externally fixed by the input coupling capacitors.

3. Noise output voltage is measured in a bandwidth of 20 Hz to 20 kHz with a source resistor R

= 600 Ω.

s

4. Noise output voltage is measured in a bandwidth of 20 Hz to 20 kHz with an A-weighted filter with a source resistor
Rs= 600 Ω.

5. Distortion is measured at a frequency of 1 kHz using an A-weighted filter.

6. Distortion is measured at an output voltage of 3.0 V (RMS) at frequencies between 17 Hz and 20 kHz.

7. Ripple rejection is measured at the output, using a source resistor Rs= 600 Ω and a ripple amplitude of
100 mV (RMS) at a frequency of 1 kHz.

8. Ripple rejection is measured at the output, using a source resistor Rs= 600 Ω and a ripple amplitude of
100 mV (RMS) at frequencies between 20 Hz and 20 kHz.

1998 Oct 16 6

Philips Semiconductors Product specification

Class-H high-output voltage level line
driver

APPLICATION INFORMATION

C6

100

nF

C1

22 µF

C1

22 µF

R

s

V

i(R)

C2

47 µF

24 kΩ 36 kΩ

(1)

R1

24 kΩ 36 kΩ

R1

R2

V

CCL

SVRL

INL

INML

INMR

INR

SVRR

V

CCR

(1)

R2

(1)

1

3

REFERENCE

2
4

5
7

REFERENCE

6

8

(1)

handbook, full pagewidth

V

CC

R

s

V

i(L)

BUFFER

BUFFER

BUFFER

BUFFER

24 kΩ

+

30 kΩ

+

TDA8574(T)

+

30 kΩ

+

24 kΩ

36 kΩ

V

−

−

V

V

−

−

V

36 kΩ

CCL

CCL

CCR

CCR

LIFT

AMP.

SIGNAL

AMP.

5 Ω

SIGNAL

AMP.

LIFT

AMP.

TDA8574

V

CC

C5

1.5 nF

CL+

16

15

CL−

13

OUTL

14

LGND

RGND

11

12

OUTR

10

CR−

9

CR+

C4
100
µF

C3

22 µF

C3

22 µF

C5

1.5 nF

V

CC

C4

100

µF

MGE669

RL

10 kΩ

RL

10 kΩ

(1) R1 and R2 should have a tolerance of ≤ 1%.

Fig.3 Application diagram.

1998 Oct 16 7

Philips Semiconductors Product specification

Class-H high-output voltage level line
driver

Printed-Circuit Board (PCB) layout

handbook, full pagewidth

TDA8574

64

46.08

22 µF 22 µF

OUTR

10 kΩ

SGND

INR

Dimensions in mm.
IC mounted on track side, additional components mounted on component side.
Tracks viewed from component side.

22 µF

47 µF

36 kΩ

RL

24 kΩ

V

SO16

CC

GND

10 kΩ

22 µF

36 kΩ

24 kΩ

OUTL

SGND

INL

MBH883

Fig.4 Recommended PCB-layout.

1998 Oct 16 8

Philips Semiconductors Product specification

Class-H high-output voltage level line
driver

Application characteristics

VCC= 9 V; RI=10kΩ; T

THD + N

(%)

10

10

10

1

−1

−2

−3

handbook, halfpage

=25°C; 80 kHz filter.

amb

MGD906

f = 10 kHz

1 kHz

100 Hz

24

Vo (V)

60

THD + N

(%)

10

10

10

1

−1

−2

−3

10

handbook, halfpage

TDA8574

MGD907

Vo = 5 V

4 V

3 V

2 V

2

10

3

10

4

10

f (Hz)

5

10

Fig.5 Total harmonic distortion plus noise as a

function of Vo.

10

handbook, halfpage

G

(dB)

8

6

4

2

10

2

10

3

10

4

10

MGD908

5

10

f (Hz)

Fig.6 Total harmonic distortion plus noise as a

function of frequency.

−40

handbook, halfpage

SVRR

(dB)

−50
Rs =

600 Ω

−60

0 Ω

−70

6

10

−80

10

2

10

3

10

MGD909

4

10

f (Hz)

5

10

Fig.7 Total circuit gain as a function of frequency.

1998 Oct 16 9

Fig.8 Supply voltage ripple rejection as a function

of frequency.

Philips Semiconductors Product specification

Class-H high-output voltage level line
driver

−60

handbook, halfpage

α

cs

(dB)

−80

−100

−120

0

f = 10 kHz

1 kHz

100 Hz

15

234

MGD910

Vo (V)

−60

handbook, halfpage

α

cs

(dB)

−80

−100

−120

10

TDA8574

MGD911

1 V

3 V

5 V

2

10

3

10

4

10

f (Hz)

5

10

Fig.9 Channel separation as a function of Vo.

Fig.10 Channel separation as a function of

frequency.

1998 Oct 16 10

Philips Semiconductors Product specification

Class-H high-output voltage level line
driver

PACKAGE OUTLINES

SO16: plastic small outline package; 16 leads; body width 7.5 mm

D

c

y

Z

16

9

TDA8574

SOT162-1

E

H

E

A

X

v M

A

pin 1 index

1

e

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

A

max.

2.65

0.10

A

1

0.30

0.10

0.012

0.004

A2A

2.45

2.25

0.096

0.089

0.25

0.01

b

3

p

0.49

0.36

0.019

0.013

0.014

0.009

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

8

w M

b

p

0 5 10 mm

scale

(1)E(1) (1)

cD

0.32

10.5

0.23

10.1

0.41

0.40

eHELLpQ

7.6

1.27

7.4

0.30

0.050

0.29

A

2

10.65

10.00

0.419

0.394

A

1

0.055

1.4

1.1

0.4

0.043

0.016

detail X

0.043

0.039

1.1

1.0

Q

3

0.25 0.1

0.01

A

θ

ywv θ

0.004

Z

0.9

0.4

0.035

0.016

o

8

o

0

(A )

L

p

L

0.25

0.01

OUTLINE

VERSION

SOT162-1

IEC JEDEC EIAJ

075E03 MS-013AA

REFERENCES

1998 Oct 16 11

EUROPEAN

PROJECTION

ISSUE DATE

95-01-24
97-05-22

Philips Semiconductors Product specification

Class-H high-output voltage level line
driver

DIP16: plastic dual in-line package; 16 leads (300 mil)

D

seating plane

L

Z

16

e

b

TDA8574

SOT38-4

M

E

A

2

A

A

1

w M

b

1

b

2

9

c

(e )

1

M

H

pin 1 index

1

0 5 10 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

A

A

UNIT

max.

mm

inches

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE
VERSION

SOT38-4

12

min.

max.

IEC JEDEC EIAJ

b

1.73

1.30

0.068

0.051

b

1

0.53

0.38

0.021

0.015

b

cD E e M

2

0.36

1.25

0.23

0.85

0.014

0.049

0.009

0.033

REFERENCES

8

scale

(1) (1)

19.50

18.55

0.77

0.73

6.48

6.20

0.26

0.24

E

(1)

Z

L

e

1

M

3.60

8.25

3.05

7.80

0.14

0.32

0.12

0.31

EUROPEAN

PROJECTION

E

10.0

0.39

0.33

H

8.3

w

max.

0.2542.54 7.62

0.764.2 0.51 3.2

0.010.10 0.30

0.0300.17 0.020 0.13

ISSUE DATE

92-11-17
95-01-14

1998 Oct 16 12

Philips Semiconductors Product specification

Class-H high-output voltage level line
driver

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(order code 9398 652 90011).

DIP

S

OLDERING BY DIPPING OR BY WAVE

The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

R

EPAIRING SOLDERED JOINTS

Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.

SO

REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO

packages.

stg max

). If the

TDA8574

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

AVE SOLDERING

W
Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream end.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

R

EPAIRING SOLDERED JOINTS

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

1998 Oct 16 13

Philips Semiconductors Product specification

Class-H high-output voltage level line

TDA8574

driver

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1998 Oct 16 14

Philips Semiconductors Product specification

Class-H high-output voltage level line
driver

NOTES

TDA8574

1998 Oct 16 15

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South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. [phone], Fax. [phone]

South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone] Fax. [phone]

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1998 SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 545102/25/03/pp16 Date of release: 1998 Oct 16 Document order number: 9397 750 04393