CONTROLLED DRIVING OF THE POWER
TRANSISTOR DURING TURN ON AND OFF
PHASE FOR MINIMUM POWER DISSIPATION AND HIGH RELIAB I LITY
.
HIGH SOURCE AND SINK CURRENT CAPABILITY
.
DISCHARGE CURRENT DERIVED FROM
PEAK CHARGE CURRENT
.
CONTROLLED DIS CHARGE TIMING
.
DISABLE FUNCTION FOR SUPPLY UNDER
VOLTAGE AND NONSYNCHRONOUS OPERATION
.
PROTECTION FUNCTION WITH HYSTERESIS FOR OVERTEMPERATURE
.
OUTPUT DIODE CLAMPING
.
LIMITING OF THE COLLEC TOR PEAK CURRENT OF THE DEFLECTION POWER TRANSISTOR DURI NG TURN ON PERI O D
.
SPECIAL REMOTE FUNCTION WITH DELAY
TIME TO SWITCH THE OUTPUT ON
TDA8143
SIP9
(Plastic Package)
ORDER CODE : TDA8143
DESCRIPTION
The TDA8143 is a monolithic integrated circuit
designed to drive the horizontal deflection power
tran-sistor.
The current source characteristic of this device is
adapted to the non-linear current gain behaviour of
the power transistor providing a minimum power
dissipation. The TDA8143 is internally protected
against short circuits and thermal overload.
PIN CONNECTIONS
9
8
7
6
5
4
3
2
1
September 1993
PROTECTION AND REMOTE STANDBY INPUT
CONTROL INPUT
SPECIAL REMOTE STANDBY
C
GROUND
SENSE-IN
V+
OUTPUT
GROUND
4Sense InputInput voltage that determines output current.
5Sense GNDReference Ground for Input Voltage at SENSE INPUT.
6C
EXT
7Special Remote/StandbyLow level at this input sets the device after a delay time t
8Control InputHigh level at this input switches the BU508 off, low level switches the BU508 on.
9Protection and Remote
Standby Input
BLOCK DIAG RAM
Supply Voltage
Capacitor between this terminal and SENSE GROUND determines the current
slope dIO/dt during OFF phase.
in the standby mode
independent from CONTROL INPUT (2nd priority).
dr
A high level at this input switches the BU508 off independent from all other inputs
(1st priority).
8143-01.TBL
V
H
BU508
R
0.15
S
Ω
TDA8143
SPECIAL
REMOTE
STANDBY
7
8
CONTROL
IN
SYNC. DET.
THERMAL
PROTECTION
&
PROT ECTION AND
REMOTE ST AN BY INPUT
9
6
C
1nF
VCC+
100k
Ω
3
I
B1
V
S
2
OUT
4
SENSE
I
B2
V
C
1
IN
5
GND
27
220µF
4.7
22nF
Ω
10µH
Ω
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
CC
I
d
P
tot
, T
T
stg
T
oper
DC Supply Voltage18V
Output CurrentInternally Limited
Power DissipationInternally Limited
Storage and Junction Temperature– 40, + 150°C
Supply Voltage718V
Quiescent CurrentAll Inputs Open101525mA
Positive Output Current (source)1.5A
Negative Output Current (sink)2A
Positive quiescent output current forcing
the output to 6 V and the sense input to
Remote Input1
Remote Input0
120
50
150
80
200
100
ground output externally forced to 6 V.
G
ON
G
OFF
G
REMOTE
I
5
R
INS
I
INS
R
SYN
V
THS
V
SYN
V
THA
I
INA
V
THB
I
INB
t
dr
t
don
V
CC–VOUT
V
CC ON
V
CC OFF
V
S limit
Notes : 1. GON is measured with V4 varying from 150mV to 350mV (Pin 6 is grounded)
Transconductance ON Phase (1)See Figure 11.82.02.2A/V
Transconductance OFF Phase (2)See Figure 11.82.02.2 A/V
Transconductance Standby ModeRemote Input00.6750.750.825A/V
Current Source Pin 6V7 = 500 mV135165200µA
Sense Input ResistanceVS > 0
< 0
V
S
0.7
0.35
1
0.5
1.3
0.7
Sense Input Bias CurrentVS = 0
Remote Input = 1– 200– 300– 400µA
Synchronous Detection Input ResistanceV
Threshold Voltage of the Synchronous
V
SYN
SYN
< 7 V
> 7 V
30
7
60
10
150
15
11.82.8V
Detection Input
SYNC DETECT Input Voltage30V
Threshold Voltage of Control Input1.522.5V
Pull up Current of Control Input0 < VIN < V
VIN > V
THA
THA
+ 0.5 V
– 50
– 1
– 1000– 160
+ 1
Threshold Voltage Remote Input1.522.5V
Pull-up Current of the Remote Input 0 < VIN < V
VIN > V
THB
THB
+ 0.5 V
– 50
– 1
– 1000– 160
+ 1
Remote Delay Time (3)190250300µs
On Delay Time34.5µs
Output Voltage Drop for Ip0 = 1 A22.83V
Supply Voltage for Device "ON" I0 ≥ 05.86.47.0V
Supply Voltage for Device "OFF"
(output internally switched to ground)
5.6V
CC ON
– 0.2 V
6.8V
Sense Limit Voltage (4)0.80.91V
2. G
is measured with V6 varying from 150mV to 350mV (Pin 4 is grounded)
OFF
3. When the remote input goes from HIGH to LOW the BU508 is switched off and it remains in this condition for the time tdr.
4. The sense input voltage V
the storage time tS of the BU508 limiting of VS leads to a reduced base current of the BU508 and the output current I0 is going to
the positive quiescent current Io0.
is internally limited and results in a limited positive output current Ip0 = g. VS limit. Note that due to
S
mA
mA
kΩ
kΩ
kΩ
kΩ
µA
µA
µA
µA
8143-04.TBL
TRUTH TABLE
Logics Inputs
Control InputRemote/Standby
0
Floating or 1
Floating or 1
Floating or 1
X0I
X0I
Note :5. IO < 0 means that the sink current flows into the output to ground.
The conventional deflection system is shown in
Figure 3. The driving circuit consists of a bipolar
power transistor driven by a transformer and a
medium power element plus some passive components.
During the active deflection phase the collector
current of the power transistor is linearly rising and
the driving circuitr y must be adapted to the required
base current in order to ens ure the power transistor
saturation.
system.
The new approach, using the TDA8143, over-
comes these restrictions by means of a feedback
principle.
As shown in Figure 4, at each instant of time the
ideal base current of the power transistor results
from its collector current divided by such current
gain which ensure the saturation ; thus the r equired
base current I
back transconductance amplifier g
the deflection current across the resistor R
emitter of the power transistor and delivers :
According to the limited components number the
typical approach of the present TVs provides only
a rough approximation of this objective ; in Figure 4
we give a comparison between the typical real base
The transconductance must only fulfill the condition :
current and the ideal base current waveform and
the collector waveform.
The marked area represents a useless base current which gives an additional power dis sipation on
the power transistor.
Furthermore during the tur n-ON and turn-OFF transient phase of the chassis the power transistor is
extremely stressed when the convenctional network cannot guarantee the saturation ; for this
reason, generally, the driving circuit must be carefully designed and is different for each deflection
where β is the minimum curr ent gain of the transitor.
This method always ensures the correct base current and acts time independent on principle.
For the turn-OFF, the base of the power transistor
must be discharged by a quas i linear time decreasing current as given in Figure 5.
Conventional driver systems inherently result into
a stable condition with a constant peak current
magnitude.
Figure 3 : Conventional Horizontal Deflection System for TVs
can be easily generated by a feed-
b
which senses
m
at the
s
= RS • gm • I
I
b
1
1 +βmin
⋅
1
R
< gm <
S
e
1
R
S
VCC+
V
DRIVING CIRCUIT
ICI
D
I
B
IN
HORIZONTAL
TRANSFORMER
YOKE
DEFLECTION CIRCUIT
8143-05.EPS
5/9
Page 6
TDA8143
Figure 4 :Waveforms of Collector and
Base Current
I
C
Off PhaseOn PhaseOff Phase
Real Base Current
Ideal Base Current
I
BIAS
I
C
Base Bias Current
I
D
t
S
Figure 5
I
0
t
don
I
0
t
t
ON PHASE
This is due to the constant base charge in the
turn-ON phase independent from the collector current ; hence a high peak current results into a low
storage time of the transistor because the excess
base charge is a minimum and vice versa. In the
active deflection the required function, high peak
current-fast switch- OFF and low peak current-slow
switch-OFF, is obtained by a controlled base discharge current for the power transistor ; the negative slope of this ramp is proportional to the actual
sensed current.
As a result, the active driving system even improves the s harpness of vertical lines on the scr een
compared with the traditional solution due to the
increased stability factor of the loop represented as
the variation of the st orage time versus the collector
peak current.
8143-06.EPS
I
dI
S0
0
=
t
dt
I
p0
I
n0
S
I
S0
OFF PHASE
t
CONTROL
INPUT
CIRCUIT DESCRIPTION
Figure 6 shows the block diagram of the TDA8143,
the circuit consists of an input transconductance
amplifier composed by Q1, Q2, Q3 and Q4.
The symmetr ical out put c urrent is f ed into the load
resistor R1 and R2 ; the two amplifiers V1 and V2
realize a floating voltage to current converter which
can drive 1.2A sink current and 2A source current
for a wide common output range.
So, the overall transconductance results into :
g
m
R1 +R2
=
R3
1
⋅
R5
A current source I1 generates a drop of 70mV
across the resistor R4 which provides an output
bias current of 140mA ; the control input determines
the turn ON/OFF function.
In the ON phase, Q5 shorts the external capacitor
t
S
t
. Within the input volt age range 0 < Vin < 750mV
C
t
the element realizes the transconductance function ; lower voltages are clamped by the D1/Q6
configuration.
For input voltages higher than 750mV, Q 7 limits th e
maximum output current at 1.5A peak.
In the turn-OFF mode, C
controlled source I
will be charged by the
t
which is proportional to the
2
input voltage, by this way, the output current decreases quasi linearly and the system stability is
reached.
During the flyback phase, the IC is enabled v ia t he
sync. detector input ; this function with the limited
sink and source curre nt together with the undervoltage turn-OFF and a chip temperature sensor ensure a complete protection of the IC.
8143-07.EPS
6/9
Page 7
Figure 6 : Block Diagram of the Integrated Horizontal Driver
PROTECTION
AND REMOTE
STANDBY INPUT
CONTROL
SPECIAL
REMOTE
STANDBY
INPUT
9
VOLTAGE
CONTROL
V < 7V
OVE R TEMP .
PROT ECTI ON
T < 150˚C
j
8
7
Q9V1
C
&
&
TRANSCONDUCTANCE
I
1
Q8
AMPLIFIER
R6
R2R1
I
2
Q2
Q5
Q4Q3
R3
Q1
INPUT
TDA8143
+
3
V
CC
Q10
Q11
R5
I
B
2
OUTPUT
SENSE
4
INPUT
V
IN
V2
Q7Q6
D1
R4
D2
V = 750mV
REF
615
C
EXT
C
T
In Figure 7 is shown the application diagram of the
TDA8143, the few external component and the
automatic handling possibility ensures a lower application cost versus the conventional approach
shown in Figure 3.
In Figure 8 is shown the currents and voltage
waveforms of the driver circuit of Figur e 7 as t o be
seen, the driving charge I
⋅ ton has been reduced
b
at minimum.
POWER
GROUND
SENSE
GROUND
The power dissipation on this application co ndition
is about 1.3W.
The presence of thermal shut-down circuit means
that the heatsink can have a s maller factor of safety
compared with that of a conventional circuit.
If for any reason, the junction temperature increases up to 150oC, the thermal shut-down simply
switches off the device.
8143-08.EPS
7/9
Page 8
TDA8143
Figure 7 : Integrated Horizontal Driver
+V
CC
3
TDA8143
V
8
i
1
100µF
6
5
1nF
HORIZONTAL
R
I
CID
220µF
9
2
4
4.7Ω
47nF
2W
27
I
B
Ω
0.15Ω
TRANSFORMER
YOKE
DEFLECTION CIRCUIT
DRIVING CIRCUIT
Figure 8 : Signal Diagrams of the Driver Circuits
8143-09.EPS
8143-10.TIF
8143-11.TIF
8/9
Page 9
PACKAGE MECHANICAL DATA
9 PINS - PLASTIC SIP
TDA8143
C
c2
A
c1
Dimensions
L2
D
L1
19
a1
L
e3
N
M
b1
b3
e
B
L3
d1
MillimetersInches
Min.Typ.Max.Min.Typ.Max.
A7.10.280
a12.730.1060.118
B24.80.976
b10.50.020
b30.851.60.0330.0 63
C3.30.130
c10.430.017
c21.320.052
D21.20.835
d114.50.571
e2.540.100
e320.320.800
L3.10.122
L130.118
L217.60.693
L30.250.010
M3.20.126
N10.039
Information furnished i s believed to be accurate and rel iabl e. However, S GS-THOMSON Microel ectroni cs assumes no responsibil ity
for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result
from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics.
Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life
support devices or systems without express written approval of SGS-THOMSON Microelectronics.