The TDA8139 is a monolithic dual positiv e volt age
regulator designed to provide precision out put voltages of 5.1V and adjustable at currents up to
750mA.
An internal reset circuit generates a reset pulse
when the output 1 decrease below the regulated
voltage value.
Output 2 can be disabled by TTL input.
Short circuit and thermal protect ions are inclu ded.
DC Input Voltage Pin 1, 220V
Disable Input Voltage Pin 420V
Output Voltage at Pin 620V
Output CurrentsInternally Limited
Power DissipationInternally Limited
t
Storage Temperature– 65 to + 150°C
unction Temperature0 to + 150°C
Note 1 :The output short circuit currents are tested one channel at time.
During a short circuit a large consumption of power occurs, but the thermal protection circuit prevents any excessive temperature.
Safe permanent short-circuit is only guaranteed for input voltages up to 16V .
Figure 1
Saturation Volt. at Pin 6 in Reset ConditionI5 = 5mA0.4V
RL
Leakage Current at Pin 6 in Normal ConditionV5 = 10V10µA
RH
Output Volt. Thermal Drift
∆V
K
=
0
⋅ 10
o
∆T⋅ V
6
O
100ppm/°C
Tj = 0 to + 125°C
Short Circ. Ouput CurrentVIN = 7V1.6A
V
= 16V, (see note 1)1A
IN
Disable Volt. at Pin 4 High (out 2 active)2V
Disable Volt. at Pin 4 Low (out 2 disabled)0.8V
Disable Bias Current at Pin 40V < V
Pin 72.5V
ref
Junction Temp. for Thermal Shut Down145°C
jsd
< 7V-1002µA
DIS
10µA
b
-
+
OUT 1
REF
2.5V
9
a
+
50
3
RESET
6
8139-04.TBL
Figure 2
5.1V
4.9V
4.85V
RESET
REG
C
e
T
D
2.5V 0.6V
∆
T
D
8139-03.EPS
VOUT LOW
8139-04.EPS
3/5
Page 4
TDA8139
CIRCUIT DESCRIPTION
The TDA8139 is a dual voltage regulator with Reset
and Disable.
The two regulation parts are supplied from one
voltage reference circuit trimmed by zener zap
during EWS test. Since the supply voltage of this
last is connected at Pin 1 (V
not work if the Pin 1 is not supplied.
The outputs stages have been realized in darlington configuration with a drop typical of 1.2V.
The disable circuit, switch-off the output 2 if a
voltage lower than 0.8V is applied at pin 4.
TYPICAL APPL ICA T ION
), the regulator 2 will
IN1
RESET
63
The Reset circuit checks the voltage at the output
1. If this one goes below V
- 0.25V (4.85V T yp.),
OUT
the comparator "a" (see Figure 1) discharges rapidly the capacitor Ce and the reset output goes at
once low. When the voltage at the OUT 1 rises
above V
-0.2V (4.9V Typ.), the voltage V
OUT
increases linearly to 2.5V corresponding to a delay
2.5
t
following the low : td =
d
Ce ⋅
10µA
V
(see figure 2),
then the reset output goes high again. To avoid
glitches in the reset output, the second comparat or
"b" has a large hysteresis (1.9V).
R1 + R
2
R
1
Ce0.1µF
VO2 = V
REF
typ. val R1 = 2.2Ω
Ce
V
IN1
1
9
V
O1
TDA8139
V
IN2
C1C2C3
2
45
DISABLE
C1 to C4 = 10µF
7
8
C4
R1
V
O2
R2
8139-05.EPS
4/5
Page 5
PACKAGE MECHANICAL DATA
9 PINS - PLASTIC SIP
TDA8139
C
c2
A
c1
Dimensions
L2
D
L1
19
a1
L
e3
N
M
b1
b3
e
B
L3
d1
MillimetersInches
Min.Typ.Max.Min.Typ.Max.
A7.10.280
a12.730.1060.118
B24.80.976
b10.50.020
b30.851.60.0330.063
C3.30.130
c10.430.017
c21.320.052
D21.20.835
d114.50.571
e2.540.100
e320.320.800
L3.10.122
L130.118
L217.60.693
L30.250.010
M3.20.126
N10.039
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