
5.1V +8V REGULATOR WI TH DISABL E AND RESE T
.
OUTPUT CURRE NTS UP T O 0.75A
.
FIXED PRECISION OUTPUT 1 VOLTAGE
5.1V ± 2%
.
FIXED PRECISION OUTPUT 2 VOLTAGE
8V ± 2%
.
OUTPUT 1 WIT H RESET FACILITY
.
OUTPUT 2 WITH DISABLE BY TTL INPUT
.
SHORT CIRCUIT PROTECTION AT BOTH
OUTPUTS
.
THERMAL PROTECT IO N
.
LOW DROP OUTPUT VOLTAGE
DESCRIPTION
The TDA8133 is a monolithic dual positive v oltage
regulator designed to provide fixed precision output
voltages of 5.1V and 8V at currents up to 0.75A.
An internal reset circuit generates a reset pulse
when the output 1 decrease below the regulated
voltage value.
Output 2 can be disabled by TTL input.
Short circuit and thermal protections are included
in all the versions.
TDA8133
ADVANCE DATA
SIP9
(Plastic Package)
ORDER CODE : TDA8133
PIN CONNECTIONS
9
8
7
6
5
4
3
2
1
Tab. connected to Pin 5
March 1994
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
OUTPUT 1
OUTPUT 2
N.C.
RESET
GROUND
DISABLE
DEL. CAP.
INPUT 2
INPUT 1
8133-01.EPS
1/5

TDA8133
BLOCK DIAGRAM
IN 2IN 1
12
REFERENCE
PROTECTION
4
DISABLE
5
OUT 1
RESET
OUT 2
TDA8133
9
OUT 1
6
RESET
3
DELAY
CAPACITOR
8
OUT 2DISABLE
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
O1, 2
T
IN
DIS
RST
P
stg
T
DC Input Voltage Pin 1 20 V
Disable Input Voltage 20 V
Output Voltage at Pin 6 20 V
Output Currents Internally Limited
Power Dissipation Internally Limited
t
Storage Temperature -65 to +150
Junction Temperature 0 to +150
j
8133-02.EPS
o
C
o
C
8133-01.TBL
THERMAL D ATA
Symbol Parameter Value Unit
Maximum Thermal Resistance Junction-case 8
Maximum Thermal Resistance Junction-ambient 60
Maximum Recommended Junction Temperature 130
j
2/5
R
R
th (j-c)
th (j-a)
T
o
C/W
o
C/W
o
C
8133-02.TBL

TDA8133
ELECTRICAL CHRACTERI STICS (V
= 7V, V
IN1
= 10V, Tj = 25oC, unless otherwise specified)
IN2
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
V
V
V
V
V
O1,2LI
V
O1,2LO
V
O1RST
V
t
V
I
K
I
O1,2SC
V
V
I
T
Note : Safe permanent short-circuit is only guaranteed for input voltages up to 16V.
Output Voltage IO1 = 10mA 5 5.1 5.2 V
O1
Output Voltage IO2 = 10mA 7.84 8 8.16 V
O2
Output Voltage 7V < V
O1
Output Voltage 7.7 8.3 V
O2
Dropout Voltage I
IO1,2
10V < V
5mA < I
O1,2
Line Regulation 7V < V
10V < V
I
O1,2
IN1
IN2
O1,2
< 14V
< 14V
< 750mA
4.9 5.3 V
= 750mA 1.4 V
< 14V
IN1
< 14V
IN2
= 200mA
Load Regulation 5mA < IO1 < 0.6A
5mA < I
Quiescent Current IO1 = 10mA
I
Q
Output 2 Disabled
Reset Thrseshold Voltage K = V
Reset Thrseshold Hysteresis See circuit description 20 50 75 mV
RTH
Reset Pulse Delay Ce = 100nF
RD
Saturation Voltage in Reset Condition I5 = 5mA 0.4 V
RL
Leakage Current in Normal Condition at Pin 6 V5 = 10V 10 µA
RH
Output Voltage Thermal Drift Tj = 0 to 125oC
O1,2
Short Circuit Output Current V
Disable Voltage High (out 2 active) 2 V
DISH
Disable Voltage Low (out 2 disabled) 0.8 V
DISL
Disable Bias Current 0V < V
DIS
Junction Temperature for Thermal Shut Down 145
jsd
See circuit description
K
O
IN1
V
IN1,2
< 0.6A
O2
O1
K - 0.4 K -
0.25
25 ms
6
⋅ 10
∆V
O
=
∆T ⋅ V
O
= 7V, V
= 16V (see Note)
= 10V
IN2
< 7V -100 2 µA
DIS
100 ppm/oC
50
80
100
160
2mA
K - 0.1 V
1.6
1
mV
mV
mV
mV
A
A
o
C
8133-03.TBL
CIRCUIT DESCRIPT IO N
The TDA8133 is a dual voltage regulator with R eset
and Disable.
The two regulation parts are supplied from one
voltage reference circuit trimmed by zener zap
during EWS test.
Since the supply voltage of this last is connected at
Pin 1 (V
), the regulator 2 will not work if Pin 1 is
IN1
not supplied.
The outputs stage have been realized in darlington
configuration with a drop typical 1.2V.
The disable circuit, switch-off the output 2 if a
voltage lower than 0.8V is applied at Pin 4.
The Reset circuit checks the voltage at the output 1. If this one goes below V
- 0.25V (4.85V
OUT
typ.), the comparator "a" (see Figure 1) discharges
rapidly the capacitor C
and the reset output goes
e
at once Low. When the voltage at the out1 rises
above V
- 0.2V (4.9V typ.), the voltage V
OUT
Ce
increases linearly to 2.5V corresponding to a delay
td following the law : t
=
1
10
(see Figure 2),
µA
C
⋅ 2.5V
e
then the reset output goes high again. To avoid
gliches in the reset output, the second comparator
"b" has a large hy steresis (1.9V).
3/5

PACKAGE MECHANICAL DAT A
9 PINS - PLASTIC SIP
TDA8133
D
L3
C
c2
Dimensions
L1
L2
19
a1
L
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
N
M
b1
b3
e3
B
e
d1
A
c1
A 7.1 0.280
a1 2.7 3 0.106 0.118
B 24.8 0.976
b1 0.5 0.020
b3 0.85 1.6 0.033 0.063
C 3.3 0.130
c1 0.43 0.017
c2 1.32 0.052
D 21.2 0.835
d1 14.5 0.571
e 2.54 0.100
e3 20.32 0.800
L 3.1 0.122
L1 3 0.118
L2 17.6 0.693
L3 0.25 0.010
M 3.2 0.126
N 1 0.039
PM-SIP9.EPS
SIP9.TBL
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility
for the consequences of use of such information nor for any infri ngement of patents or other rights of third parties which may result
from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectroni cs.
Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously suppli ed. SGS-THOMSON Microel ectronics products are not authorized for use as critical components in life
support devices or systems without express written approval of SGS-THOMSON Microelectronics.
© 1994 SGS-THOMSON Microelectronics - All Rights Reserved
2
Purchase of I
2
C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to
I
C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips
2
C Standard Specifications as defined by Philips.
the I
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