HIGH PERFORMANCE SIGNAL PROCESSOR FOR CARRADIO SYSTEMS
DEVICE INCLUDES AUDIO PROCESSOR,
STEREO DECODER, NOISEBLANKER AND
MULTIPATHDETECTOR
NO EXTERNAL COMPONENTS REQUIRED
FULLY PROGRAMMABLEVIA I
LOW DISTORTION
LOW NOISE
2
C BUS
TDA7461N
SO28
DESCRIPTION
The TDA7461N is a high performance signal
processor specifically designed for car radio applications.
The device includes a complete audioprocessor
andastereodecoderwithnoiseblanker,
stereoblend and all signal processing functions
necessary for state-of-the-artas well as future car
radio systems.
Switched-capacitors design technique allows to
obtain all these features without external compo-
BLOCK DIAGRAM
CDL CDG CDR
765
CASS R
CASS L
PHONE
PH GND
10
AM
3
4
INPUT
MULTIPLEXER
+
9
AUTO ZERO
8
PHONE
MIXING
STAGE
BEEP
LOUDNESS
VOLUMEBASSTREBLE
ORDERING NUMBER: TDA7461ND
nents or adjustments. This means that higher
quality and reliability walks alongside an overall
cost saving.
2
The CSP is fully programmable by I
C bus interface allowing to customize key device parameters
and especiallyfilter characteristics.
The BICMOS process combined with the optimized signal processing assure low noise and
low distortionperformances.
C Data LineI/O
20GNDSupply GroundS
21VSSupply VoltageS
22OUTRRRight Rear Speaker OutputO
23OUTLRLeft Rear Speaker OutputO
24OUTRFRight Front Spaeaker OutputO
25OUTLFLeft Front Speaker OutputO
26CREFReference Capacitor PinS
27ACOUTRPre-speaker AC Output Right ChannelO
28ACOUTLPre-speaker AC Output LeftChannelO
1
)O
1
)O
(1) See databyte specification - speaker attenuators
Pin type legenda:
I = Input
O = Output
I/O = Input/Output
S = Supply
3/31
Page 4
TDA7461N
AUDIO PROCESSORPART
Input Multiplexer
Fully differential or quasi-differential CD and
cassettestereo input
AM mono or stereo input
Phonedifferential or single ended input
Bass Control
2nd order frequencyresponse
Center frequencyprogrammable in 4(5)steps
DC gain programmable
7 x2dB steps
Internalbeep with 2 frequencies(selectable)
Mixablephone and beep signals
Treble Control
2nd order frequencyresponse
Loudness
Secondorder frequencyresponse
Center frequencyprogrammable in 4 steps
7 x2dB steps
Program mablecenterfr equencyandqualityfactor
15 x 1dBsteps
Selectableflat-mode(constantattenuation)
2) See description of Audioprocessor Part - Bass & Treble filter characteristics programming
Output NoiseBW = 20 Hz to 20 KHz
315µV
output muted
BW = 20 Hz to 20 KHz
6.515µV
all gain = 0dB
=2V
O
RMS
bass treble at12dB; V
2.6V
RMS
=1V
IN
V
IN =1VRMS;Bass& Treble= 12dB0.050.1%
; all stages0dB0.0020.1%
RMS
O =
106dB
100dB
Total Tracking ErrorAV= 0 to -20dB-101dB
A
= -20 to -60dB-202dB
V
RMS
Ω
6/31
Page 7
TDA7461N
DESCRIPTIONOFTHE AUDIOPROCESSOR
PART
ProgrammableInput Matrix
The programmableinput matrix of the TDA7461N
offers several possibilities to adaptthe audioprocessor to the desired application. In to the standard applicationwe have:
CD quasi differential
Cassettestereo
Phonedifferential
AM mono
Stereodecoderinput.
The input matrix can be configuredby only 2 bits:
Figure 1. Input Configuration Tree
TDA7461
bits 3 and 4 of subaddress 0. Basically the bit of
subaddress 13 is fixed by the application and has
to be programmed only once at the startup of the
IC.
For many configurations the two bits are also
fixed during one application (e.g. the standardapplication) and a change of the input source can
be done by loading the first three bits of subaddress 0.
In other configurations for some sources a programming of bit 3 and 4 of subaddress0 is necessary in addition to the three source selection
bits. In every case only the subaddress 0 has to
be changed to switch from one source to another.
The followingpicture shows the input and source
programmingflow:
CD QDCD FD
APPL. 2APPL. 1APPL. 3APPL. 5APPL. 4APPL. 6
CD
QD
CASSETTE
FM STD
AM
MONO
PHONE (D)
Note: in AMSTD configuration theAM mono signal is lead throughthe FM stereodecoder part touse its additionalfiltersand high-cutfunction.
The best way to come to the desired configuration may be to go through the application tree
from the top to the bottom while making the specific decisions.
This way will lead to one of the six possibleapplications. Then take the number of the application
and go into the pinning table. Here you will find
the special pinout as well as the special programming codesfor selectingsources.
For example in Appl. 6 the TDA7461N has to be
configured while startup withthe databyte
0/xxxx0xxx.
To select the FM, AM or phone source the last
five significant bits of subaddress 0 have to be
changed, for any other source the last three bits
are sufficient(see data byte specification).
Input stages
Most of the input circuits are the same as in preceeding ST audioprocessors with exception of
the CD inputs(see figure 2).
In the meantime there are some CD players in
the market having a significant high source impedance which affects strongly the commonmode rejection of the normal differential input
stage. The additional buffer of the CD input
avoids this drawback and offers the full commonmoderejection even with those CD players.
The TDA7461N can be configured with an additional input; if the AC coupling before the speaker
stage is not used(bit 7 in subaddress5set to ”1”)
ACINL and ACINR pins can be used as an additional stereo input.
AutoZero
In order to reduce the number of pins there is no
AC coupling between the In-Gain and the following stage, so that any offset generated by or before the In-Gain stage would be transferred or
even amplified to the output.
To avoid that effect a special offset cancellation
stage calledAutoZerois implemented.
To avoid audible clicks the audioprocessor is
muted before the loudness stage during this time.
In some cases, for example if the µP is executing
a refresh cycle of the I
2
C bus programming, it is
not useful to start a new AutoZeroaction because
no new source is selectedand an undesiredmute
would appear at the outputs. For such applications the TDA7461N could be switched in the
”Auto Zero Remain” mode (Bit 6 of the subaddress byte). If this bit is set to high, the DATABYTE 0 could be loaded without invoking the
AutoZeroand the old adjustmentvalue remains.
8/31
Page 9
Figure 2. Input stages
TDA7461N
CD
100K
CDGND
PHONE
PH_GND
CASSETTE
100K
AM
100K
MPX
100K
15K15K
15K15K
15K15K
15K15K
STEREODECODER
Mixing Stage
This stage offers the possibilityto mix the internal
beep or the phone signal to any other source.
Due to the fact that the mixing stage is also located behind the In-Gain stage fine adjustments
of the main source level can be done in this way.
-
+
-
+
IN GAIN
D97AU633A
Figure 3. Loudness Attenuation @ fc = 400Hz
(secondorder)
0.0
-5.0
Loudness
There are four parameters programmable in the
loudnessstage (see fig.3, 4,5):
- Attenuation
- Center Frequency
- LoudnessQ
- Flat Mode: in this mode the loudnessstageworks
asa 0- 15dBattenuator.
Softmute
The digitally controlled softmute stage allows
muting/demuting the signal with a I
grammable slope. The mute process can either
be activated by the softmute pin or by the I
2
C bus pro-
2
bus. The slope is realized in a special S shaped
curve to mute slow in the critical regions (see figure 6).
For timing purposes the Bit 3 of the I
2
C bus output register is set to 1 from the start of muting until the end of demuting.
-10.0
-15.0
-20.0
10.0100.01.0K10.0K
Figure 4. Loudness Center frequency @ Attn.
= 15dB (second order)
0.0
-5.0
-10.0
C
-15.0
-20.0
10.0100 .01.0K10.0K
9/31
Page 10
TDA7461N
Figure 5. Loudness @ Attn.= 15dB,fc = 400Hz
(dB)
-5
-10
-15
-20
101001,000Hz
D98AU844
Softstep Volume
When volume level is changed often an audible
click appears at the output. The root cause of
those clicks could be either a DC offset before
the volume stage or the sudden change of the
envelope of the audio signal. With the Softstep
feature both kinds of clickscould be reduced to a
minimum and are no more audible (see figure 7).
Bass
There are three parameters programmable in the
bass stage(see figs 8, 9, 10, 11):
Figure 6. Softmute Timing
1
EXT.
MUTE
+SIGNAL
REF
-SIGNAL
1
2
I
C
BUS
OUT
D97AU634
Note: Please notice that a startedMute action is always terminated
and could not be interruptedby a change of the mute signal.
Time
Figure 7. Soft Step Timing
VOUT
2dB
1dB
- Attenuation
- Center Frequency (60,70, 80 and 100Hz)
- Quality Factors (1, 1.25, 1.5 and 2)
DC Mode
In this mode the DC gain is increased by 4.4dB.
In addition the programmedcenter frequencyand
quality factor is decreased by 25% which can be
used to reach alternative center frequencies or
quality factors.
Treble
There are two parameters programmable in the
treblestage (see figs 12, 13):
- Attenuation
- Center Frequency (10,12.5, 15 and 17.5kHz).
Speaker Attenuator
Due to practicalaspectsthe stepsin the speaker
attenuators are not linear over the full range. At
attenuations more than 24dB the steps increase
from 1.5dB to 10dB (please see data byte specification).
10ms
-1dB
-2dB
Note: For steps more than 1dB the softstep mode should be
deactivated because it could generate a 1dB error during the
blend-time
Time
D97AU635
10/31
Page 11
TDA7461N
Figure 8. Bass Control @ fc = 80Hz, Q = 1
15.0
10.0
5.0
0.0
-5.0
-10.0
-15.0
10.0100.01.0K10.0K
Figure 10. Bass Quality factors @ Gain =
14dB, fc = 80Hz
15.0
12.5
10.0
7.5
5.0
Figure 9. Bass Center@ Gain= 14dB, Q = 1
15.0
12.5
10.0
7.5
5.0
2.5
0.0
10.010 0.01.0K10.0K
Figure 11. Bass normal and DC Mode @ Gain
= 14dB, fc = 80Hz
15.0
12.5
10.0
7.5
5.0
2.5
2.5
0.0
10.0100.01.0K10.0K
Figure 12. Treble Control @ fc = 17.5KHz
15.0
10.0
5.0
0.0
-5. 0
-10.0
-15.0
10.0100.01.0K10.0K
0.0
10.0100.01.0K10.0K
Note: In general the center frequency, Q and DC-mode can be set
independently. The exceptionfromthis ruleisthemode(5/xx1111xx)
where the center frequency is setto 150Hz instead of 100Hz.
Figure 13. Treble Center Frequencies
@ Gain = 14dB
15.0
12.5
10.0
7.5
5.0
2.5
0.0
10.0100.01.0K10.0K
11/31
Page 12
TDA7461N
STEREODECODERPART
No external componentsnecessary
PLL with adjustmentfree fully integratedVCO
Automatic pilot dependent MONO/STEREO
switching
Very high suppression of intermodulation and
interference
ProgrammableRoll-Off compensation
ELECTRICAL CHARACTERISTICS
75KHz deviation, f = 1KHz. G
I = 6dB, Tamb =25°C; unless otherwise specified).
(V
S
= 9V; deemphasis time constant = 50µs, V
Dedicated RDS Softmute
Highcut and Stereoblend characterisctics pro-
grammablein a wide range
Internal Noiseblankerwith thresholdcontrols
Multipath detector with programmable inter-
nal/external influence
2
C bus controlof all necessary functions
I
MPX
= 500mV,
SymbolParameterTest ConditionMin.Typ.Max.Unit
INMPX Input LevelInputGain = 3.5dB0.51.25VRMS
V
R
in
minMinimum Input Gain1.53.54.5dB
G
G
max
G
STEP
SVRRSupply Voltage Ripple Rejection V
α
Input Resistance70100130K
Max Input Gain8.51112.5dB
Step Resolution1.752.53.25dB
= 100mv, f = 1khz55dB
ripple
Max Channel Separation3050dB
THDTotal Harmonic Distortion0.020.3%
S+N
Signal plus Noise to Noise Ratio S = 2V
rms
8091dB
N
MONO/STEREOSWITCH
V
PTHST1
V
PTHST0
V
PTHMO1
V
PTHMO0
Pilot Threshold VoltageforStereo, PTH = 1101525mV
Pilot Threshold VoltageforStereo, PTH = 0152535mV
Pilot Threshold VoltageforMono, PTH = 171217mV
Pilot Threshold VoltageforStereo, PTH = 0101925mV
Ω
PLL
∆f/fCapture Range0.5%
DEEMPHASISand HIGHCUT (5)
τHC50
τ
HC75
τ
HC50
τ
HC75
Deemphasis Time ConstantBit = 7, Subadr. 10 = 0
V
LEVEL >> VHCH
Deemphasis Time ConstantBit = 7, Subadr. 10 = 1
VLEVEL >> V
HCH
Highcut Time ConstantBit= 7, Subadr. 10 = 0
VLEVEL >> V
HCL
Highcut Time ConstantBit= 7, Subadr. 10 = 1
VLEVEL >> V
HCL
255075
5075100
100150200
150225300
STEREOBLENDand HIGHCUT-CONTROL
REF5VInternal Reference Voltage4.755.3V
TC
REF5V
L
Gmin
GmaxMax. LEVEL Gain81012dB
L
L
Gstep
VSBL
VSBL
VSBL
12/31
Temperature Coefficient3300ppm
Min. LEVEL Gain-10+1dB
The stereodecoder part of the TDA7461N (see
Fig. 17) contains all functions necessary to demodulate the MPX signal like pilot tone dependentMONO/STEREO switchingaswell as
”stereoblend”and ”highcut”functions.
Adaptations like programmable input gain, roll-off
compensation, selectable deemphasis time constant and a programmable fieldstrength input allow to use different IF devices.
StereodecoderMute
The TDA7461N has a fast and easy to control
RDS mute function which is a combinationof the
audioprocessor softmute and the high-ohmic
mute of the stereodecoder. If the stereodecoder
is selected and a softmute command is sent (or
activated through the SM pin) the stereodecoder
will be set automatically to the high-ohmic mute
condition after the audio signal has been softmuted.
Hence a checking of alternate frequencies could
be performed. To release the system from the
mute condition simply the unmute command must
be sent: the stereodecoder is unmuted immediately and the audioprocessor is softly unmuted.
Fig. 18 shows the output signal V
as well as the
O
internal stereodecoder mute signal. This influence of Softmute on the stereodecodermute can
be switched off by setting bit 3 of the Softmute
byte to ”0”. A stereodecodermute command (bit
0, stereodecoder byte set to ”1”) will set the
stereodecoder in any case independently to the
high-ohmicmute state.
If any other source than the stereodecoderis selected the decoder remains muted and the MPX
pin is connectedto Vref to avoidany discharge of
the coupling capacitor throughleakage currents.
Input Stages
The Ingain stage allows to adjust the MPX signal
to a magnitude of about 1Vrms internally which is
the recommended value. The 4.th order input filter has a corner frequency of 80kHz and is used
to attenuatespikes and noise and acts as an antialiasing filter for the following switch capacitor filters.
Figure 18. Signals during stereodecoder’s
softmute
SOFTMUTE
COMMAND
t
STD MUTE
t
V
O
D97AU638
t
lowpass behaviour of the tuner section. If the
tuner attenuation at 38kHz is in a range from
20.2% to 31% the TDA7461N needs no external
network before the MPX pin. Within this range an
adjustment to obtain at least 40dB channel separation is possible.
The bits for this adjustment are located together
with the fieldstrengthadjustment in one byte. This
gives the possibility to perform an optimization
step during the production of the carradio where
the channel separation and the fieldstrengthcontrol are trimmed.
Deemphasisand Highcut.
The lowpass filter for the deemphasis allows to
choose between a time constant of 50µs and
75µs (bit D7, Stereodecoderbyte).
The highcut control range will be in both cases
t
HC
=2⋅t
. Inside the highcut control range
Deemp
(between VHCH and VHCL) the LEVEL signal
is converted into a 5 bit word which controls the
lowpasstime constant betweent
Deemp
...3 ⋅ t
Deemp
There by the resolution will remain always 5 bits
independentlyof the absolute voltage range between the VHCH and VHCL values.
The highcut function can be switched off by I2C
bus (bit D7, Fieldstrengthbyte set to ”0”).
.
Demodulator
In the demodulator block the left and the right
channel are separated from the MPX signal. In
this stage also the 19 kHz pilot tone is cancelled.
For reaching a high channel separation the
TDA7461N offers an I2C bus programmable rolloff adjustment which is able to compensate the
PLL and Pilot ToneDetector
The PLL has the task to lock on the 19kHz pilotone during a stereo transmission to allow a correct demodulation.The included detector enables
the demodulation if the pilot tone reaches the selected pilottone threshold VPTHST. Two different
thresholdsare available. The detector output (signal STEREO, see block diagram) can be checked
17/31
Page 18
TDA7461N
by reading the status byte of the TDA7461N via
I2C bus.
FieldstrengthControl
The fieldstrength input is used to control the high
cut and the stereoblend function. In addition the
signal can be also used to control the noiseblanker thresholds.
LEVEL Input and Gain
To suppress undesired high frequency modulation on the highcut and stereoblend function the
LEVEL signal is lowpass filtered firstly. The filter
is a combination of a 1st order RC lowpass at
53kHz (working as anti-aliasing filter) and a 1storder switched capacitor lowpass at 2.2kHz. The
second stage is a programmable gain stage to
adapt the LEVEL signal internally to different IF.
The gain is widely programmable in 16 steps
from 0dB to 10dB (step = 0.67dB). These 4 bits
are located together with the Roll-Off bits in the
”Stereodecoder Adjustment” byte to simplify a
possible adaptation during the production of the
carradio.
StereoblendControl
The stereoblend control block converts the internal LEVEL voltage (LEVEL INTERN) into an demodulatorcompatible analog signal whichis used
to control the channel separation between 0dB
and the maximum separation. Internally this control range has a fixed upper limit which is the internal reference voltage REF5V. The lower limit
can be programmed to be 33%, 42%, 50% or
58% of REF5V(see fig. 20).
To adjust the external LEVEL voltage to the internal range two values must be defined: the LEVEL
Figure 19. Internal stereoblend characteristics
gain L
and VSBL. To adjust the voltage where
G
the full channel separation is reached (VST) the
LEVEL gain L
has to be defined. The following
G
equation can be usedto estimatethe gain:
=
L
G
Field strength voltage [STEREO]
REF5V
The gain can be programmed through 4 bits in
the ”Stereodecoder-Adjustment”byte.
The MONO voltage VMO (0dB channel separation) can be choosen selecting 33, 42, 50 or 58%
of REF5V.
All necessary internal reference voltages like
REF5V are derived from a bandgap circuit.
Therefore they have a temperature coefficient
near zero. This is useful if the fieldstrength signal
is also temperaturecompensated.
But mostIF devices apply a LEVEL voltage with a
TC of 3300ppm. The TDA7461N offers this TC
for the reference voltages, too. The TC is selectable with bit D7 of the ”stereodecoder adjustment” byte.
Figure 20. Relation between internal and external LEVEL voltage and setup of Stereoblend
INTERNAL
VOLTAGES
REF 5V
18/31
VSBL
SETUP OF VST
LEVEL INTERN
LEVEL
VSTVMO
t
FIELDSTRENGHT VOLTAGE
INTERNAL
VOLTAGES
REF 5V
VSBL
58%
50%
42%
33%
D97AU639
SETUP OF VMO
VMOFIELDSTRENGHT VOLTAGE
LEVEL INTERN
VST
t
Page 19
TDA7461N
Highcut Control
The highcut control setup is similar to the
stereoblend control setup : the starting point
VHCH can be set with 2 bits to be 42, 50, 58 or
66% of REF5V whereas the range can be set to
be 17 or 33% of VHCH(see fig. 21).
Figure 21. Highcut characteristics
LOWPASS
TIME CONSTANT
3•τ
Deemp
τ
Deemp
D97AU640
FIELDSTRENGHTVHCHVHCL
FUNCTIONAL DESCRIPTION OF THE NOISEBLANKER
In the automotive environment the MPX signal is
disturbed by spikes produced by the ignition and
for example the wiper motor. The aim of the
noiseblanker part is to cancel the audible influence of the spikes. Therefore the output of the
stereodecoder is held at the actual voltage for
40µs.
In a first stage the spikes must be detected but to
avoid a wrong triggering on high frequency
(white) noise a complex trigger control is implemented. Behind the triggerstage a pulse former
generates the ”blanking” pulse. To avoid any
crosstalk to the signalpath the noiseblanker is
suppliedby his own biasing circuit.
TriggerPath
The incoming MPX signal is highpass filtered,
amplified and rectified. This second order highpass-filter has a corner frequency of 140kHz. The
rectified signal, RECT, is lowpass filtered to generate a signal called PEAK. Also noise with a frequency 140kHz increases the PEAK voltage. The
PEAK voltage is fed to a threshold generator,
which adds to the PEAK voltage a DC dependent threshold VTH. Both signals, RECT and
PEAK+VTH are fed to a comparator which triggers a re-triggerable monoflop. The monoflop’s
output activates the sample-and-hold circuits in
the signalpathfor 40µs.
The block diagram of the noiseblankeris given in
fig.22.
There are mainly two independentpossibilities for
programmingthe trigger threshold:
a the low threshold in 8 steps(bitsD0 to D2 of
the noiseblankerbyte)
b the noise adjusted thresholdin 4 steps
(bits D3 and D4 of the noiseblankerbyte,
see fig. 14).
The low threshold is active in combination with a
good MPX signal without any noise; the PEAK
voltage is less than 1V. The sensitivity in this operation is high.
If the MPX signal is noisy the PEAK voltage increases due to the higher noise, which is also
rectified. With increasing of the PEAK voltage the
trigger threshold increases, too. This particular
gain is programmable in 4 steps(seefig. 14).
Figure 22. Block diagram of the noiseblanker
MPX
HIGH PASS
RECTIFIER
LOWPASS
D98AU861
RECT
+
-
VTH
+
PEAK
+
MONOFLOPHOLDN
THRESHOLD
GENERATOR
ADDITIONAL
THRESHOLD
CONTROL
19/31
Page 20
TDA7461N
Automatic Threshold Control
Besides the noise controlled threshold adjustment there is an additionalpossibility for influencing the trigger threshold. It is depending on the
stereoblendcontrol.
The point where the MPX signal starts to become
noisy is fixed by the RF part. Therefore also the
starting point of the normal noise-controlled trigger adjustment is fixed (fig. 16). In some cases
the behaviour of the noiseblanker can be improved by increasing the threshold even in a region of higher fieldstrength. Sometimes a wrong
triggering occures for the MPXsignal often shows
distortion in this range which can be avoided
even if using a low threshold.
Because of the overlap of this range and the
range of the stereo/monotransitionit can be controlled by stereoblend. This threshold increase is
programmable in 3 steps or switched off with bits
D0 and D1 of the fieldstrengthcontrol byte.
Over Deviation Detector
If the system is tuned to stations with a high deviation the noiseblanker can trigger on the higher
frequencies of the modulation. To avoid this
wrong behaviour, which causes noise in the output signal, the noiseblankeroffers a deviation dependent threshold adjustment.
By rectifying the MPX signal a further signal representing the actual deviation is obtained. It is
used to increase the PEAK voltage. Offset and
gain of this circuit are programmable in 3 steps
with the bits D6 and D7 of the stereodecoderbyte
(the first step turns off the detector,see fig. 15).
FUNCTIONAL DESCRIPTION OF THE MULTIPATH DETECTOR
Using the internal detector the audible effects of a
multipath condition can be minimized.A multipath
condition is detected by rectifying the 19kHz
spectrumin thefieldstrengthsignal.
Selecting the ”internal influence” in the configuration byte, the channel separation is automatically
reduced during a multipath condition according to
the voltage appearing at theMPOUTpin.
To obtain a optimal performance an adaptationis
necessary.Thereforethe gain of the 19kHz bandpass is programmablein four steps as well as the
rectifier gain. The attack and decay times can be
set by the external capacitorvalue.
TEST MODE
During the test mode which can be activated by
setting bit D0 of the testing byte and bit D5 of the
subaddress byte to ”1” several internal signals
are available at the CASSR pin.During this
mode the input resistance of 100kOhmis disconnected from the pin. The internal signals available
are shown in the software specification.
Figure 23. Block diagram of the Multipath Detector
LEVEL
VDD
DC=1µA
MPIN
BANDPASS
19KHz
GAIN
2 BITS
RECTIFIER
GAIN
2 BITS
-
MPOUT
220nF
to SB
int. INFLUENCE
D97AU880
20/31
Page 21
Figure 24. ApplicationExample 1
+V
CC
CASS R
CASS L
CDR
CDG
CDL
PHGND
PHONE
=
9V
Note: Bit D7 of ”Bass and Treble Filter characteristics” set to 1
100nF
100nF
100nF
22µF
100nF
220nF
220nF
100nF
PHONE_GND
SOUND
EFFECTS
ACOUTLACOUTRACINLACINR
V
S
OUTLF
CASS R
CASS L
CDR
CDG
CDL
TDA7461
PHONE
MPINMPOUT
UNWEIGHTED
LEVEL
MUXRMUXL
220nF
OUTRF
OUTLR
CREF
OUTLF
OUTRF
OUTLR
OUTRR
MPX
AM
SDA
SCL
SMUTE
LEVEL
GND
TDA7461N
10µF
OUTRR
220nF
MPX
220nF
AM
SDA
SCL
SMUTE
LEVEL
D97AU763A
Figure 25. ApplicationExample 2
+V
CC
CASS R
CASS L
CDR
CDG
CDL
PHGND
PHONE
=
9V
Note: Bit D7of ”Bass and Treble Filter characteristics” set to0
100nF
100nF
100nF
22µF
100nF
220nF
220nF
100nF
PHONE_GND
PRE-SPEAKER
OUTPUT
ACOUTLACOUTR
V
S
CASS R
CASS L
PHONE
CDR
CDG
CDL
MPINMPOUT
UNWEIGHTED
LEVEL
ADDITIONAL
INPUT
100nF100nF
ACINLACINR
TDA7461
MUXRMUXL
220nF
CREF
OUTLF
OUTRF
OUTLR
OUTRR
MPX
AM
SDA
SCL
SMUTE
LEVEL
GND
10µF
OUTLF
OUTRF
OUTLR
OUTRR
220nF
MPX
220nF
AM
SDA
SCL
SMUTE
LEVEL
D97AU764
21/31
Page 22
TDA7461N
I2C BUS INTERFACE DESCRIPTION
Interface Protocol
The interfaceprotocolcomprises:
-a start condition (S)
/ write transmission)
-a subaddressbyte
-a sequenceof data (N-bytes+ acknowledge)
-a stop condition (P)
-a chip address byte (the LSB bit determinesread
CHIP ADDRESS
MSBLSBMSBLSBMSBLSB
S1000110R/WACKACKACKP
D97AU627
S = Start
ACK = Acknowledge
AZ = AutoZero-Remain
SUBADDRESSDATA 1 to DATA n
XI
AZ TA3 A2 A1 A0DATA
Auto increment
If bit I in the subaddress byte is set to ”1”, the
autoincrementof the subaddressis enabled.
T = Testing
I = Autoincrement
P = Stop
MAX CLOCK SPEED500kbits/s
The transmitted data is automatically updated after each ACK.
Transmission can be repeated without new chip
TRANSMITTED DATA (sendmode)
MSBLSB
XXXXSTSMXX
SM = Soft mute activated
ST = Stereo
X = Not Used
address.
SUBADDRESS (receive mode)
MSBLSBFUNCTION
X AZ T I A3A2A1A0
Input selector
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
Loudness / Auto-Zero
1
Volume
0
Softmute / Beep
1
Bass / Treble Attenuator
0
Bass / Treble Configuration
1
Speaker attenuator LF
0
Speaker attenuator LR
1
Speaker attenuator RF
0
Speaker attenuator RR / Blanktime adjust
1
Stereodecoder
0
Noiseblanker
1
Fieldstrength Control
0
Configuration
1
Stereodecoder Adjustment
0
Testing
1
T = Testmode
I = Autoincrement
AZ = Auto Zero Remain
X = not used
22/31
Page 23
DATA BYTE SPECIFICATION
Input Selector
MSBLSBFUNCTION
D7D6D5D4D3D2D1D0
Source Selector
CD
0
0
0
0
1
1
1
1
0
1
1
0
0
1
0
0
:
1
1
For example to select the CD input in quasi-differential mode with gain of 8dB the Data Byte is: 0/01111000
0
0
:
1
1
0
1
:
0
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
0
0
0
Cassette
1
Phone
0
AM
1
Stereo Decoder
0
Input FM
1
Mute
0
AC inputs
1
CD Mode
CD Full-differential
CD Quasi-diff
AM/FM Mode
AM mono
1
AM stereo
1
AM through Stereodecoder
0
FM- Stereodecoder
0
In-Gain
14dB
12dB
:
2dB
0dB
TDA7461N
Loudness
MSBLSBLOUDNESS
D7D6D5D4D3D2D1D0
Attenuation
0dB
0
0
:
1
1
0
1
0
1
0
1
1must be ”1”
Note: The attenuation is specified at high frequencies. Around the center frequency the value is different depending on theprogrammed
attenuation(see Loudness frequency response).
0
0
:
1
1
0
0
:
1
1
0
-1dB
1
:
:
-14dB
0
-15dB
1
Filter
on
off (flat)
Center Frequency
200Hz
400Hz
LoudnessQ
low (1
normal (2
st
order)
nd
order)
23/31
Page 24
TDA7461N
Mute, Beep and Mixing
MSBLSBMUTE/BEEP/MIXING
D7D6D5D4D3D2D1D0
Mute
Enable Softmute
0
Disable Softmute
1
0
0
1
0
1
0
1
0
0
0
1
1
Note: for more information to the Stereodecoder-Softmute-Influence please refer to the stereodecoder description.
0
1
0
1
1
1
0
1
0
1
Mute time =0.48 ms
Mute time =0.96 ms
Mute time =40.4 ms
Mute time =324 ms
Stereo Decoder Softmute Influence = off
Stereo Decoder Softmute Influence = on
Beep
Beep Frequency = 600Hz
Beep Frequency = 1.2KHz
Mixing
Mix-Source = Beep
Mix-Source = Phone
Full Mix Signal
Source -12dB + Mix-Signal -2.5dB
Source -6dB + Mix-Signal -6dB
Full Source
Volume
MSBLSBATTENUATION
D7D6D5D4D3D2D1D0
Gain/Attenuation
+32dB
0
0
:
0
0
0
:
0
0
0
:
1
1
0
1
Note: It is not recommended to use a gain more than 20dB for system performance reason. In general, the max. gain should be limitedby
softwareto the maximum value,which is needed for the system.
0
0
:
0
0
0
:
0
1
1
:
1
1
0
0
:
0
0
0
:
1
0
0
:
0
0
0
0
:
1
1
1
:
1
0
0
:
1
1
0
0
:
1
1
1
:
1
0
0
:
1
1
0
0
:
0
0
1
:
1
0
0
:
1
1
0
+31dB
1
:
:
+20dB
0
+19dB
1
+18dB
0
:
:
+1dB
1
0dB
0
- 1dB
1
:
:
-78dB
0
-79dB
1
Softstep
Softstep Volume = off
Softstep Volume = on
24/31
Page 25
TDA7461N
Bass & Treble Attenuation
MSBLSBBASS & TREBLE ATTENUATION
D7D6D5D4D3D2D1D0
Treble Steps
-14dB
0
0
:
0
0
1
1
:
1
1
0
0
:
0
0
1
1
:
1
1
For example 12dB Trebleand -8dB Bass give the following DATA BYTE: 0 0 1 1 1 0 0 1.
0
0
:
1
1
1
1
:
0
0
0
0
:
1
1
1
1
:
0
0
0
1
:
0
1
1
0
:
1
0
0
0
:
1
1
1
1
:
0
0
0
0
:
1
1
1
1
:
0
0
0
1
:
0
1
1
0
:
1
0
-12dB
:
-2dB
0dB
0dB
+2dB
:
+12dB
+14dB
Bass Steps
-14dB
-12dB
:
-2dB
0dB
0dB
+2dB
:
+12dB
+14dB
Bass & Treble Filter Characteristics
MSBLSBBASS& TREBLEFILTER
D7D6D5D4D3D2D1D0
Treble
Center Frequency = 10 KHz
0
0
1
1
0
0
1
1
1
0
0
1
0
1
0
1
For example Treble center frequency = 15kHz, Bass center frequency = 100Hz, Bass Q = 1 and DC = 0dB give the following DATA BYTE: 1
0001110
(*) For deeper information see application examples fig. 24 and fig. 25.
1
1
0
1
0
1
1
0
1
0
1
1
0
Center Frequency = 12.5 KHz
1
Center Frequency = 15 KHz
0
Center Frequency = 17.5 KHz
1
Bass
Center Frequency = 60 Hz
Center Frequency = 70 Hz
Center Frequency = 80 Hz
Center Frequency = 100Hz
Center Frequency = 150Hz
Quality factor = 1
Quality factor = 1.25
Quality factor = 1.5
Quality factor = 2
DC-Gain = 0dB
DC-Gain =±4.4dB
AC Coupling (*)
For External Connection
Internally connected
25/31
Page 26
TDA7461N
Speaker Attenuation (LF, LR, RF, RR)
MSBLSB
D7D6D5D4D3D2D1D0
0
0
:
1
0
0
1
1
0
0
1
1
11
0
0
1
1
0
1
0
1
0
1
0
0
:
0
0
0
0
0
0
0
0
0
1
0
0
:
1
1
1
1
1
1
1
1
1
0
0
:
0
1
1
1
1
1
1
1
1
0
0
:
1
0
0
0
0
1
1
1
1
Attenuation
0dB
0
-1dB
1
:
:
-23dB
1
-24.5dB
0
-26dB
1
-28dB
0
-30
1
-32dB
0
-35dB
1
-40dB
0
-50dB
1
Speaker Mute
Must be ”1” (except RF, RR speaker; see below)
VHCCH
Level intern
Pilot magnitude
VCOCON; VCO ControlVoltage
Pilot threshold
HOLDN
NB threshold
F228
VHCCL
VSBL
not used
not used
PEAK
not used
REF5V
not used
VCO
OFF
ON
Audioprocessortest mode
only ifbit D5 of the subaddress
(test mode bit)is set to ”1”
OFF
29/31
Page 30
TDA7461N
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
A2.650.104
a10.10.30.0040.012
b0.350.490.0140.019
b10.230.320.0090.013
C0.50.020
c145° (typ.)
D17.718.10.6970.713
E1010.65 0.3940.419
e1.270.050
e316.510.65
F7.47.60.2910.299
L0.41.270.0160.050
S8°(max.)
mminch
OUTLINE AND
MECHANICAL DATA
SO28
30/31
Page 31
TDA7461N
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logois a registered trademark of STMicroelectronics
2000 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -
Singapore - Spain - Sweden - Switzerland- United Kingdom - U.S.A.
http://www.st.com
31/31
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