• Programmable reference divider ratio (512, 640 or
1024)
• Programmable charge pump current (60 or 280 µA)
• Programmable automatic charge pump current switch
• Varicap drive disable
• Mixer/oscillator function compatible with existing
TDA5732
• Balanced mixer with a common emitter input for VHF
(single input)
• Balanced mixer with a common base input for UHF
(balanced input)
• 2-pin common emitter oscillator for VHF
• 4-pin common emitter oscillator for UHF
• IF preamplifier with asymmetrical 75 Ω outputimpedance to drive a low-ohmic impedance (75 Ω)
• Low power
• Low radiation
• Small size
• TheTDA6402A andTDA6403Adifferfrom theTDA6402
and TDA6403 by the UHF port protocol in the I2C-bus
mode (see Tables 3 and 4).
APPLICATIONS
• Cable tuners for TV and VCR (switched concept for
VHF)
• Recommended RF bands for the USA:
55.25 to 133.25 MHz, 139.25 to 361.25 MHz and
367.25 to 801.25 MHz.
GENERAL DESCRIPTION
The TDA6402, TDA6402A, TDA6403 and TDA6403A are
programmable2-band mixers/oscillatorsand synthesizers
intended for VHF/UHF cable tuners (see Fig.1).
The devices include two double balanced mixers and two
oscillators for the VHF and UHF band respectively, an IF
amplifier and a PLL synthesizer. The VHF band can be
split-up into two sub-bands using a proper oscillator
application and a switchable inductor. Two pins are
available between the mixer output and the IF amplifier
input to enable IF filtering for improved signal handling.
Four PNP ports are provided. Band selection is provided
by using pin PUHF. When PUHF is ‘ON’, the UHF
mixer-oscillator is active andthe VHFband isswitched off.
When PUHF is ‘OFF’, the VHF mixer-oscillator is active
and the UHF band is ‘OFF’. PVHFL and PVHFH areused
to select the VHF sub-bands. FMST is a general purpose
port, that can be used to switch an FM sound trap. When
itis used,thesum ofthe collector currentshas tobelimited
to 30 mA.
The synthesizer consists of a divide-by-eight prescaler, a
15-bit programmable divider, a crystal oscillator and its
programmable reference divider and a phase/frequency
detector combined with a charge pump which drives the
tuning amplifier, including 33 V output (V33) at pin VT.
Depending on the reference divider ratio (512, 640 or
1024), the phase comparator operates at 7.8125 kHz,
6.25 kHz or 3.90625 kHz with a 4 MHz crystal.
TDA6402; TDA6402A;
TDA6403; TDA6403A
2000 Jan 242
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Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
The device can be controlled according to the I2C-bus
format or 3-wire bus format depending on the voltage
applied to pin SW (see Table 2). In the 3-wire bus mode
(SW = HIGH), pin LOCK/ADC is the LOCK output.
The LOCK output is LOW when the PLL loop is locked.
In the I2C-bus mode(SW = LOW), the lockdetector bit FL
is set tologic 1 when the loop is locked and is read on the
SDA line (Status Byte; SB) during a READ operation in
I2C-bus mode only. The Analog-to-Digital Converter
(ADC) input isavailable on pin LOCK/ADC for digitalAFC
control in the I2C-bus mode only. The ADC code is read
during a READ operation on the I2C-bus (see Table 11).
In test mode,pin LOCK/ADC isused as aTEST outputfor
f
and1⁄2f
REF
(see Table 7).
When the automatic charge pump current switch mode is
activated and when the loop is phase-locked, the charge
pumpcurrent valueisautomatically switchedto LOW.This
action is taken to improve the carrier-to-noise ratio.
The status of this feature can be read in the ACPS flag
during a READ operation on the I2C-bus (see Table 9).
,in bothI2C-busmode and3-wirebus mode
DIV
TDA6402; TDA6402A;
TDA6403; TDA6403A
2
C-bus mode (SW = GND)
I
Five serial bytes (including address byte) are required to
address the device, select the VCO frequency, program
the four ports, set the charge pump current and set the
reference divider ratio. The device has four independent
I2C-bus addresses which can be selected by applying a
specific voltage on input CE (see Table 6).
3-wire bus mode (SW = OPEN or VCC)
Data is transmitted to the devices during a HIGH-level on
inputCE (enableline). The deviceis compatiblewith 18-bit
and19-bit dataformats,as showninFigs 4 and 5. Thefirst
four bits are used to program the PNP ports and the
remaining bits control the programmable divider. A 27-bit
data format may also be used to set the charge pump
current, the reference divider ratio and for test purposes
(see Fig.6).
It is not allowed to address the devices with words whose
length is different from 18, 19 or 27 bits.
1. The selectionof the referencedivider is givenby an automaticidentification of thedata word length.When the 27-bit
format is used, the reference divider is controlled by RSA and RSB bits (see Table 8). More details are given in
Chapter “PLL functional description”, Section “3-wire bus mode (SW = OPEN or V
CC
)”.
FREQUENCY STEP
2000 Jan 243
Page 4
Philips SemiconductorsProduct specification
2
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
QUICK REFERENCE DATA
Measured over full voltage and temperature ranges; unless otherwise specified.
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
V
CC
I
CC
f
XTAL
I
o(PNP)
P
tot
T
stg
T
amb
f
RF
supply voltageoperating4.555.5V
supply currentall PNP ports are ‘OFF’−71−mA
crystal oscillator input frequency3.24.04.48MHz
PNP port output currentnote 1−−30mA
total power dissipationnote 2−−490mW
IC storage temperature−40−+150°C
ambient temperature−20−+85°C
RF frequencyVHF band55.25−361.25MHz
UHF band367.25−801.25MHz
G
V
voltage gainVHF band−19−dB
UHF band−29−dB
NFnoise figureVHF band−8.5−dB
UHF band−9−dB
V
o
output voltage causing 1% cross
modulation in channel
VHF band−108−dBµV
UHF band−108−dBµV
Notes
1. One buffer ‘ON’, Io= 25 mA; two buffers ‘ON’, maximum sum of Io= 30 mA.
2. The power dissipation is calculated as follows:
P
tot
V
CCICCIo
–()V
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAMEDESCRIPTIONVERSION
TDA6402M;
SSOP28plastic shrink small outline package; 28 leads; body width 5.3 mmSOT341-1
TDA6402AM
TDA6403M;
SSOP28plastic shrink small outline package; 28 leads; body width 5.3 mmSOT341-1
TDA6403AM
CE(sat PNP)Io
1
V33
-- -
2
+×+×=
----------------------22 kΩ
2000 Jan 244
Page 5
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
BLOCK DIAGRAM
handbook, full pagewidth
VHFIN
RFGND
UHFIN1
UHFIN2
3 (26)
4 (25)
1 (28)
2 (27)
BS
RF INPUT
VHF
TDA6402
TDA6402A
TDA6403
TDA6403A
RF INPUT
UHF
IFFIL1 IFFIL2
5 (24)
6 (23)
BS
BSBS
VHF
MIXER
UHF
MIXER
V
CC
19 (10)
TDA6402; TDA6402A;
TDA6403; TDA6403A
(5) 24
VHF
BS
BS
OSCILLATOR
IF
PREAMPLIFIER
UHF
OSCILLATOR
(7) 22
(6) 23
(9) 20
(1) 28
(2) 27
(3) 26
(4) 25
VHFOSCOC
VHFOSCIB
OSCGND
IFOUT
UHFOSCIB2
UHFOSCOC2
UHFOSCOC1
UHFOSCIB1
XTAL
CL
DA
SW
CE/AS
18 (11)
14 (15)
13 (16)
11 (18)
12 (17)
XTAL
OSCILLATOR
4 MHz
PRESCALER
DIVIDE BY 8
POWER-DOWN
DETECTOR
SCL
2
SDA
I
C / 3-WIRE BUS TRANSCEIVER
SW
CE/AS
3-BIT A/D
CONVERTER
PRESCALER
DIVIDE BY
512, 640, 1024
RSARSB
15-BIT
PROGRAMMABLE
DIVIDER
15-BIT
FREQUENCY
REGISTER
FL
f
REF
COMPARATOR
f
DIV
IN LOCK
DETECTOR
f
REF
1/2f
FL
GATE
15 (14)
LOCK/ADC
PHASE
FL
DIV
T0, T1, T2
CHARGE
PUMP
T0, T1, T2 CP
CP T2 T1 T0 RSA RSB OS
UHF VHFH VHFL FMST
BS
9 (20)
PUHF
CONTROL
REGISTER
PORT
REGISTER
8 (21)
PVHFH
OPAMP
OS
7 (22)
PVHFL
FMST
10 (19)
(13) 16
(12) 17
(8) 21
MGE692
CP
VT
GND
The pin numbers in parenthesis represent the TDA6403 and TDA6403A.
Fig.1 Block diagram.
2000 Jan 245
Page 6
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
PINNING
PIN
SYMBOL
UHFIN1128UHF RF input 1
UHFIN2227UHF RF input 2
VHFIN326VHF RF input
RFGND425RF ground
IFFIL1524IF filter output 1
IFFIL2623IF filter output 2
PVHFL722PNP port output, general purpose (e.g. VHF low sub-band)
PVHFH821PNP port output, general purpose (e.g. VHF high sub-band)
PUHF920PNP port output, UHF band
FMST1019PNP port output, general purpose (e.g. FM sound trap)
SW1118bus mode selection input (I
CE/AS1217Chip Enable/Address Selection input
DA1316serial data input/output
CL1415serial clock input
LOCK/ADC1514lock detector output (3-wire bus)/ADC input (I
CP1613charge pump output
VT1712tuning voltage output
XTAL1811crystal oscillator input
V
The device is controlled via the I2C-bus or the 3-wire bus,
depending on the voltage applied on the SW input.
A HIGH-level on the SW input enables the 3-wire bus;
and clock inputs respectively. A LOW-level on SW input
enables the I2C-bus; the CE/AS, DA and CL inputs are
used as address selection (AS), SDA and SCL input
respectively (see Table 2).
Fig.3Pin configurationfor TDA6403 and
TDA6403A.
CE/AS, DA and CL inputs are used as enable (CE), data
Table 2 Bus mode selection
PIN
SYMBOL
TDA6402;
TDA6402A
TDA6403;
TDA6403A
3-WIRE BUS MODEI2C-BUS MODE
SW1118HIGH-level or OPENLOW-level or GND
CE/AS1217enable inputaddress selection input
DA1316data inputserial data input
CL1415clock inputserial clock input
LOCK/ADC1514LOCK/TEST outputADC input/TEST output
2000 Jan 247
Page 8
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
I2C-bus mode (SW = GND)
WRITE MODE; R/W = 0 (see Tables 3 and 4)
Data bytes can be sent to the device after the address
transmission (first byte). Four data bytes are needed to
fully program the device. The bus transceiver has an
auto-increment facility which permits the programming of
the device within one single transmission
(address + 4 data bytes).
The device can also be partially programmed providing
that the first data byte following the address is divider
byte 1 (DB1) or control byte (CB). The bits in the data
bytes aredefined inTables 3 and 4. The firstbit ofthe first
data byte transmitted indicates whether frequency data
(first bit = 0) or control and band-switch data (first bit = 1)
will follow.Until an I2C-bus STOPcommand is sent by the
Table 3 I2C-bus data format, ‘write’ mode for the TDA6402 and TDA6403
controller,additional databytes canbe entered withoutthe
need to re-address the device. The frequency register is
loaded after the8th clock pulse of thesecond divider byte
(DB2), the control register is loaded after the 8th clock
pulse ofthe controlbyte (CB)and theband-switch register
is loaded after the 8th clock pulse of the band switch byte
(BB).
I2C-BUS ADDRESS SELECTION
The moduleaddress contains programmableaddress bits
(MA1 and MA0) which offer the possibility of having
several synthesizers(up to 4) inone system byapplying a
specific voltageon theCE input.The relationshipbetween
MA1 and MA0 and the input voltage applied to the CE
input is given in Table 6.
C-bus data format, ‘write’ mode for the TDA6402A and TDA6403A
NAMEBYTE
MSBLSB
BITS
ACK
Page 9
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
Table 5 Description of symbols used in Tables 3 and 4
SYMBOLDESCRIPTION
Aacknowledge
MA1, MA0programmable address bits (see Table 6)
N14 to N0programmable divider bits; N = N14 × 2
CPcharge pump current:
CP=0=60µA
CP = 1 = 280 µA (default)
T2, T1,T0test bits (see Table 7)
RSA, RSBreference divider ratio select bits (see Table 8)
OStuning amplifier control bit:
OS = 0; normal operation; tuning voltage is ‘ON’ (default)
OS = 1; tuning voltage is ‘OFF’ (high-impedance)
PVHFL, PVHFH, PUHF, FMSTPNP ports control bits:
bit = 0; buffer n is ‘OFF’ (default)
bit = 1; buffer n is ‘ON’
Xdon’t care
14
+ N13 × 213+ ... + N1 × 21+N0
TDA6402; TDA6402A;
TDA6403; TDA6403A
Table 6 Address selection (I
2
C-bus mode)
MA1MA0VOLTAGE APPLIED ON CE INPUT (SW = GND)
000Vto0.1×V
01open or 0.2 × VCCto 0.3 × V
100.4 × VCCto 0.6 × V
110.9 × VCCto 1.0 × V
CC
CC
CC
CC
Table 7 Test modes
T2T1T0TEST MODES
000automatic charge pump switched off
001automatic charge pump switched on (note 1)
01Xcharge pump is ‘OFF’
110charge pump is sinking current
111charge pump is sourcing current
100f
101
is available on pin LOCK/ADC (note 2)
REF
1
⁄
f
is available on pin LOCK/ADC (note 2)
2
DIV
Notes
1. This is the default mode at power-on reset.
2. The ADCinput cannot beused when these testmodes are active;see Section “Read mode;R/W = 1 (see Table 9)”
for more information.
2000 Jan 249
Page 10
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
Table 8 Reference divider ratio select bits
RSARSBREFERENCE DIVIDER RATIOFREQUENCY STEP (kHz)
(1)
X
0110243.90625
115127.8125
Note
1. X = don’t care.
READ MODE; R/W = 1 (see Table 9)
Data canbe read from the device by settingthe R/W bit to
logic 1. After the slave address has been recognized, the
device generates an acknowledge pulse and the first data
byte (status byte) is transferred on the SDA line (MSB
first). Data is valid on the SDA line during a HIGH-level of
theSCL clocksignal. Asecond databyte canbe readfrom
the device if the microcontroller generates an
acknowledge on the SDA line (master acknowledge).
End of transmission will occur if no master acknowledge
occurs. The device will then release the data line to allow
the microcontroller to generate a STOP condition.
The PORflag isset to logic 1at power-on.Theflag isreset
when an end-of-data is detected by the device (end of a
06406.25
TDA6402; TDA6402A;
TDA6403; TDA6403A
READ sequence). Control of the loop is made possible
with the in-lock flag FL which indicates when the loop is
locked (FL = 1).
The automatic charge pump switch flag (ACPS) is LOW
when theautomatic chargepump switchmode is ‘ON’ and
the loop is locked. In other conditions, ACPS = 1.
When ACPS = 0, thecharge pump currentis forced to the
LOW value.
A built-in ADC is available on LOCK/ADC pin (I2C-bus
mode only). This converter can be used to apply AFC
informationto themicrocontroller fromthe IFsection ofthe
television.The relationshipbetween thebitsA2, A1andA0
is given in Table 11.
Table 9 Read data format
NAMEBYTE
Address byteADB11000MA1MA0R/W=1A
Status byteSBPORFLACPS11A2A1A0−
Note
1. MSB is transmitted first.
Table 10 Description of symbols used in Table 9
SYMBOLDESCRIPTION
Aacknowledge
PORpower-on reset flag (POR = 1 at power-on)
FLin-lock flag (FL = 1 when the loop is locked)
ACPSautomatic charge pump switch flag:
ACPS = 0; active
ACPS = 1; not active
A2, A1, A0digital outputs of the 5-level ADC
MSB
(1)
BITS
ACK
LSB
2000 Jan 2410
Page 11
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
Table 11 A to D converter levels (note 1)
A2A1A0VOLTAGE APPLIED ON ADC INPUT
1000.60 × VCCto 1.00 × V
0110.45 × VCCto 0.60 × V
0100.30 × VCCto 0.45 × V
0010.15 × VCCto 0.30 × V
0000 to 0.15 × V
Note
1. Accuracy is ±0.03 × V
POWER-ON RESET
Table 12 Default bits at power-on reset
NAMEBYTE
Address byteADB11000MA1MA0X
Divider byte 1DB10XXXXXXX
Divider byte 2DB2XXXXXXXX
Control byteCB11001X11
Band switch byteBBXXXX0000
CC
.
MSBLSB
CC
BITS
TDA6402; TDA6402A;
TDA6403; TDA6403A
CC
CC
CC
CC
The power-on detection threshold voltage V
VCC= 2 V at room temperature. Below this threshold, the
device is reset to the power-on state.
At power-on state, the charge pump current is set to
280 µA, the tuning voltage outputis disabled, the test bits
T2, T1 and T0 are set to ‘001’ (automatic charge pump
switch ‘ON’) and RSB is set to logic 1.
PUHF is ‘OFF’, which means that the UHF oscillator and
the UHF mixer are switched off. Consequently, the VHF
oscillator andthe VHF mixer areswitched on. PVHFL and
PVHFH are ‘OFF’, which means that the VHF tank circuit
is working in the VHF I sub-band. The tuning amplifier is
switched off until the first transmission. In that case, the
tank circuit in VHF I is supplied with the maximum tuning
voltage. The oscillator is therefore working at the end of
the VHF I sub-band.
3-wire bus mode (SW = OPEN or VCC)
Duringa HIGH-levelon theCEinput (enableline), thedata
is clocked into the data register at the HIGH-to-LOW
transition of the clock. The first four bits control the PNP
ports and areloaded into the internal band switchregister
on the 5th rising edge of the clock pulse. The frequency
POR
is set to
bits are loaded into the frequency register at the
HIGH-to-LOW transition of the chip enable line when an
18-bit or 19-bit data word is transmitted(see Figs 4 and 5).
When a27-bit data word istransmitted, the frequency bits
are loaded into the frequency register on the 20th rising
edge of the clock pulse and the control bits at the
HIGH-to-LOWtransition ofthechip enableline (seeFig.6).
Inthis mode,the referencedivider isgiven bythe RSA and
RSB bits (see Table 8). The test bits T2, T1 and T0, the
charge pump bit CP, the ratio select bit RSB and the OS
bit can only be selected or changed with a 27-bit
transmission. They remain programmed if an 18-bit or
19-bit transmission occurs. Only RSA is controlled by the
transmission length when the 18-bit or 19-bit format is
used. When an 18-bit data word is transmitted, the most
significant bit of the divider N14 is internally set to logic 0
and the RSA bit is set to logic 1. When a 19-bit data word
is transmitted, the RSA bit is set to logic 0.
A data word of less than 18 bits will not affect the
frequency register of the device. The definition of the bits
is unchanged compared to I2C-bus mode.
It is not allowed to address the devices with words whose
length is different from 18, 19 or 27 bits.
2000 Jan 2411
Page 12
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
POWER-ON RESET
The power-on detection threshold voltage V
VCC= 2 V at room temperature. Below this threshold, the
device is reset to the power-on state.
At power-on state, the charge pump current is set to
280 µA, the tuning voltage outputis disabled, the test bits
T2, T1 and T0 are set to ‘001’ (automatic charge pump
switch ‘ON’) and RSB is set to logic 1.
PUHF is ‘OFF’, which means that the UHF oscillator and
the UHF mixer are switched off. Consequently, the VHF
oscillator andthe VHF mixer areswitched on. PVHFL and
handbook, full pagewidth
INVALID
DATA
DA
BAND SWITCH
DATA
FMST
PUHF
PVHFL
PVHFH
N13 N12 N11 N10 N9N8 N7N6N5 N4N3N2N1N0
POR
is set to
TDA6402; TDA6402A;
TDA6403; TDA6403A
PVHFH are ‘OFF’, which means that the VHF tank circuit
is working in the VHF I sub-band. The tuning amplifier is
switched off until the first transmission. In that case, the
tank circuit in VHF I is supplied with the maximum tuning
voltage. The oscillator is therefore working at the end of
the VHF I sub-band.
If the first sequence transmitted to the device
has 18 or 19 bits, the reference divider ratio is set to 512
or 1024, depending on the sequence length.
If the sequence has 27 bits, the reference divider ratio is
fixed by RSA and RSB bits (see Table 8).
FREQUENCY
DATA
INVALID
DATA
CL
CE
14518
LOAD BAND SWITCH
REGISTER
LOAD FREQUENCY
REGISTER
Fig.4 Normal mode; 18-bit data format (RSA = 1).
MGE693
2000 Jan 2412
Page 13
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
handbook, full pagewidth
INVALID
DATA
DA
CL
CE
BAND SWITCH
DATA
FMST
PVHFL
PUHF
PVHFH
14519
LOAD BAND SWITCH
REGISTER
N13N14N12 N11 N10 N9 N8 N7N6 N5N4 N3 N2 N1 N0
FREQUENCY
DATA
TDA6402; TDA6402A;
TDA6403; TDA6403A
INVALID
DATA
LOAD FREQUENCY
REGISTER
MGE694
handbook, full pagewidth
INVALID
DATA
DA
CL
CE
Fig.5 Normal mode; 19-bit data format (RSA = 0).
BAND SWITCH
DATA
FMST
PVHFL
PUHF
PVHFH
145272019
LOAD BAND SWITCH
REGISTER
FREQUENCY
DATA
N13N14N12N2N1 N0XCP T2T1T0 RSA RSB OS
LOAD FREQUENCY
REGISTER
TEST AND FEATURES
DATA
INVALID
DATA
LOAD CONTROL
REGISTER
MGE695
Fig.6 Test and features mode; 27-bit data format.
2000 Jan 2413
Page 14
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
DA
CL
CE
INVALID
DATA
MSBLSB
t
SU;ENCL
handbook, full pagewidth
t
SU;DA
t
HIGH
t
HD;DA
TDA6402; TDA6402A;
TDA6403; TDA6403A
INVALID
DATA
t
HD;ENDA
MGE696
Fig.7 Timing diagram for 3-wire bus; DA, CL and CE.
handbook, halfpage
CE
CL
t
EN
t
HD;ENCL
MGE697
Fig.8 Timing diagram for 3-wire bus; CE and CL.
2000 Jan 2414
Page 15
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134) (note 1).
PIN
SYMBOL
V
CC
V
BSn
I
BSn
V
CP
V
SW
V
VT
V
LOCK/ADC
V
CL
V
DA
I
DA
V
CE
V
XTAL
I
O
t
sc(max)
T
stg
T
amb
T
j
TDA6402;
TDA6402A
TDA6403;
TDA6403A
1910DC supply voltage−0.3+6V
operating supply voltage4.55.5V
OVS pulse is 1 second width and 1 A max.−8V
7 to 1019 to 22PNP port output voltage−0.3+6V
7 to 1019 to 22PNP port output current−1+30mA
−−maximum short-circuit time (all pins to VCC and all
pins to GND, OSCGND and RFGND)
−−IC storage temperature−40+150°C
−−ambient temperature−20+85°C
−−junction temperature−150°C
PARAMETERMIN.MAX.UNIT
TDA6402; TDA6402A;
TDA6403; TDA6403A
−10s
Note
1. Maximum ratings can not be exceeded, not even momentarily without causing irreversible IC damage.
Maximum ratings can not be accumulated.
THERMAL CHARACTERISTICS
SYMBOLPARAMETERCONDITIONSTYP.UNIT
)thermal resistance from junction to ambientin free air90K/W
R
th( j-a
2000 Jan 2415
Page 16
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
CHARACTERISTICS
T
=25°C
amb
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Supply
V
CC
I
CC
supply voltage4.55.05.5V
supply current at VCC= 5 Vall PNP ports are ‘OFF’−7178mA
one PNP port is ‘ON’; sourcing
−103113mA
25 mA
one PNP port is ‘ON’; sourcing
−111122mA
25 mA and a second one is ‘ON’;
sourcing 5 mA
PLL part (VCC= 4.5 to 5.5 V; T
F
UNCTIONAL RANGE
V
POR
power-on reset supply voltage below this supply voltage power-on
= −20 to +85 °C; unless otherwise specified)
amb
1.52.0−V
reset becomes active
Ndivider ratio15-bit frequency word256−32767
14-bit frequency word256−16383
f
XTAL
Z
XTAL
crystal oscillatorR
input impedance (absolute
=25to300Ω3.24.04.48MHz
XTAL
f
= 4 MHz6001200−Ω
XTAL
value)
PNP PORTS
I
BSn(off)
V
BSn(sat)
leakage currentVCC= 5.5 V; VPn=0V−10−−µA
output saturation voltageone buffer output is ‘ON’, sourcing
25 mA; V
Pn(sat)=VCC
− V
Pn
−0.250.4V
LOCK OUTPUT IN 3-WIRE BUS MODE (PNP COLLECTOR OUT)
I
UNLOCK
output currentwhen thePLL is
VCC= 5.5 V; V
= 5.5 V−−100µA
OUT
out-of-lock
V
UNLOCK
V
LOCK
output saturation voltage
when the PLL is out-of-lock
I
SOURCE
V
= 200 µA;
UNLOCK=VCC
− V
−0.40.8V
OUT
output voltagethe PLL is locked−0.010.40V
ADC INPUT IN I2C-BUS MODE
V
ADC
I
ADCH
I
ADCL
ADC input voltagesee Table 110−V
HIGH-level input currentV
LOW-level input currentV
ADC=VCC
=0V−10−−µA
ADC
−−10µA
CC
V
SW INPUT (BUS MODE SELECTION)
V
V
I
SWH
I
SWL
SWL
SWH
LOW-level input voltage0−1.5V
HIGH-level input voltage3−V
HIGH-level input currentVSW=V
CC
−−10µA
CC
V
LOW-level input currentVSW=0V−100−−µA
2000 Jan 2416
Page 17
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
CE/AS INPUT (CHIP ENABLE/ADDRESS SELECTION)
V
CE/ASL
V
CE/ASH
I
CE/ASH
I
CE/ASL
LOW-level input voltage0−1.5V
HIGH-level input voltage3−5.5V
HIGH-level input currentV
LOW-level input currentV
= 5.5 V−−10µA
CE/AS
=0V−10−−µA
CE/AS
CL AND DA INPUTS
V
CL/DAL
V
CL/DAH
I
CL/DAH
I
CL/DAL
LOW-level input voltage0−1.5V
HIGH-level input voltage3−5.5V
HIGH-level input currentV
LOW-level input currentV
= 5.5 V; VCC=0V−−10µA
BUS
V
= 5.5 V; VCC= 5.5 V−−10µA
BUS
= 1.5 V; VCC=0V−−10µA
BUS
V
=0V; VCC= 5.5 V−10−−µA
BUS
DA OUTPUT (I2C-BUS MODE)
I
DAH
V
DA
leakage currentVDA= 5.5 V−−10µA
output voltageIDA= 3 mA (sink current)−−0.4V
CLOCK FREQUENCY
f
clk
clock frequency−100 150kHz
CHARGE PUMP OUTPUT CP
I
CPH
HIGH-level input current
CP = 1−280−µA
(absolute value)
I
CPL
LOW-level input current
CP = 0−60−µA
(absolute value)
V
CP
I
CPleak
output voltagePLL is locked; T
=25°C−1.95−V
amb
off-state leakage currentT2 = 0; T1 = 1−15−0.5+15nA
TUNING VOLTAGE OUTPUT VT
I
VTOFF
leakage current when
OS = 1; tuning supply = 33 V−−10µA
switched off
V
VT
output voltage when the loop
is closed
OS = 0; T2 = 0; T1 = 0; T0 = 1;
R
=22kΩ; tuning supply = 33 V
LOAD
0.2−32.7V
3-WIRE BUS TIMING
t
HIGH
t
SU;DA
t
HD;DA
t
SU;ENCL
t
HD;ENDA
t
EN
clock HIGH timesee Fig.72−−µs
data set-up timesee Fig.72−−µs
data hold timesee Fig.72−−µs
enable to clock set-up timesee Fig.710−−µs
enable to data hold timesee Fig.72−−µs
enable time between two
see Fig.810−−µs
transmissions
t
HD;ENCL
enable to clock active edge
see Fig.86−−µs
hold time
2000 Jan 2417
Page 18
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Mixer/oscillator part (VCC=5V) (measured in circuit of Fig.19; unless otherwise specified)
MIXER (INCLUDING IF AMPLIFIER)
VHF
f
RF
G
v
NFnoise figuref
V
o
V
i
RF frequencynote 155.25−361.25 MHz
voltage gainfRF= 57.5 MHz; see Fig.1216.51921.5dB
f
= 357.5 MHz; see Fig.1216.51921.5dB
RF
= 50 MHz; see Figs 13 and 14−8.59.5dB
RF
f
= 150 MHz; see Figs 13 and 14−8.510.5dB
RF
f
= 300 MHz; see Fig.14−9.512.5dB
RF
output voltage causing 1%
cross modulation in channel
inputvoltage causingpulling in
fRF= 55.25 MHz; see Fig.15105108−dBµV
f
= 361.25 MHz; see Fig.15105108−dBµV
RF
fRF= 361.25 MHz; note 2−83−dBµV
channel (750 Hz)
g
os
g
i
C
i
optimum source conductance
for noise figure
fRF=50MHz−0.7−mS
f
= 150 MHz−0.9−mS
RF
f
= 300 MHz−1.5−mS
RF
input conductancefRF= 55.25 MHz; see Fig.9−0.25−mS
f
= 361.25 MHz; see Fig.9−0.5−mS
RF
input capacitancefRF= 57.5 to 357.5 MHz; see Fig.9−1.3−pF
VHF OSCILLATOR; see Fig.19
f
OSC
∆f
∆f
OSC(V)
OSC(T)
oscillator frequencynote 3101−407MHz
oscillator frequency shift∆VCC= 5%; note 4−20120kHz
∆V
= 10%; note 4−110−kHz
CC
oscillator frequency drift∆T=25°C; with compensation;
−16002700kHz
note 5
∆f
OSC(t)
Φ
OSC
RSCripple susceptibility of V
oscillator frequency drift5 s to 15 min after switch on; note 6−6001100kHz
phase noise, carrier to noise
sideband
CC
(peak-to-peak value)
±100 kHz frequency offset; worst
case in the frequency range
VCC= 5 V; worst case in the
frequency range; ripple frequency
−100−dBc/Hz
1520−mV
500 kHz; note 7
UHF MIXER (INCLUDING IF AMPLIFIER)
f
RF
G
v
NFnoise figure (not corrected for
V
o
V
i
RF frequencynote 1367.25 −801.25 MHz
voltage gainfRF= 369.5 MHz; see Fig.16262932dB
f
= 803.5 MHz; see Fig.16262932dB
RF
f
= 369.5 MHz; see Fig.17−911dB
RF
image)
output voltage causing 1%
cross modulation in channel
inputvoltage causingpulling in
f
= 803.5 MHz; see Fig.17−1012dB
RF
fRF= 367.25 MHz; see Fig.18105108−dBµV
f
= 801.25 MHz; see Fig.18105108−dBµV
RF
fRF= 801.25 MHz; note 2−82−dBµV
channel (750 Hz)
2000 Jan 2418
Page 19
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Z
i
input impedance (RS+jωLS)RS at fRF= 367.25 MHz; see Fig.10−30−Ω
R
at fRF= 801.25 MHz; see Fig.10−38−Ω
S
L
at fRF= 367.25 MHz; see Fig.10−9−nH
S
L
at fRF= 801.25 MHz; see Fig.10−6−nH
S
UHF OSCILLATOR
f
OSC
∆f
∆f
OSC(V)
OSC(T)
oscillator frequencynote 3413−847MHz
oscillator frequency shift∆VCC= 5%; note 4−1080kHz
= 10%; note 4−300−kHz
∆V
CC
oscillator frequency drift∆T=25°C; with compensation;
−20002700kHz
note 5
∆f
OSC(t)
oscillator frequency drift5 s to 15 min after switching on;
−3001300kHz
note 6
Φ
OSC
RSCripple susceptibility of V
phase noise, carrier to noise
sideband
CC
(peak-to-peak value)
±100 kHz frequency offset; worst
case in the frequency range
VCC= 5 V (worst case in the
frequency range); ripple frequency
−100−dBc/Hz
1528−mV
500 kHz; note 7
IF AMPLIFIER
S
22
output reflection coefficientmagnitude; see Fig.11−−13.1−dB
phase; see Fig.11−2.9−deg
Z
o
output impedance (RS+jωLS)RS at 43.5 MHz; see Fig.11−75−Ω
L
at 43.5 MHz; see Fig.11−6.6−nH
S
REJECTION AT THE IF OUTPUT
INT
DIF
levelof divider interferences in
note 8; worst case: channel C−17−dBµV
the IF signal
INTR
INTRF
crystal oscillator interferences
XTAL
rejection
reference frequency rejectionVIF= 100 dBµV; worst case in the
REF
VIF= 100 dBµV; worst case in the
frequency range; note 9
frequency range; f
REF
60−−dBc
50−−dBc
= 7.8125 kHz;
note 10
INT
INT
CH6
CHA-5
channel 6 beatV
channel A-5 beatV
RFpix=VRFsnd
=80dBµV; note 1260−−dBc
RFpix
=80dBµV; note 1157−−dBc
Notes
1. The RF frequency range is defined by the oscillator frequency range and the intermediate frequency (IF).
2. This is the level of the RF signal (100% amplitude modulated with 11.89 kHz) that causes a 750 Hz frequency
deviation on the oscillator signal; it produces sidebands 30 dB below the level of the oscillator signal.
3. Limits are related to the tank circuits used in Fig.19; frequency bands may be adjusted by the choice of external
components.
4. The frequency shift is defined as a change in oscillator frequency when the supply voltage varies from
VCC= 5 to 4.75 V (4.5 V) or from VCC= 5 to 5.25 V (5.5 V). The oscillator is free running during this measurement.
2000 Jan 2419
Page 20
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
5. The frequency drift is defined as a change in oscillator frequency when the ambient temperature varies from
T
=25to50°C or from T
amb
=25to0°C. The oscillator is free running during this measurement. The VHF drift
amb
value canbe improved byadding a 10kΩ resistor betweenthe VHFOSCOC pinand the VCC. Inthat case thetypical
VHF drift value can be reduced to 900 kHz.
6. Switch-on driftis definedas thechange in oscillatorfrequency between5 s and15 min after switchon. Theoscillator
is free running during this measurement.
7. The ripple susceptibility is measured for a 500 kHz ripple at the IF output using the measurement circuit of Fig.19;
the levelof theripple signal is increased untila differenceof 53.5 dB occursbetween theIF carrier fixed at 100 dBµV
and the sideband components.
8. This is the level of divider interferences close to the IF frequency. For example channel C: f
1
⁄4f
= 44.75 MHz. Divider interference is measured with the Philips 37185 demonstration board in accordance
OSC
= 179 MHz,
OSC
with Fig.19.All ground pins areconnected to asingle ground plane under the IC. TheVHFIN input must be left open
(i.e. not connected to any load or cable); The UHFIN1 and UHFIN2 inputs are connected to a hybrid.
The measured levels of divider interference are influenced by layout, grounding and port decoupling.
The measurement results could vary by as much as 10 dB with respect to the specification.
9. Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection has to be
greater than 60 dB for an IF output signal of 100 dBµV.
10. The reference frequency rejection is the level of reference frequency sidebands related to the sound sub-carrier.
The rejection has to be greater than 50 dB for an IF output signal of 100 dBµV.
11. Channel 6 beat is the interfering product of f
RFpix+fRFsnd
12. Channel A-5 beat is the interfering product of f
mechanisms are: f
− 2 × fIF or 2 × f
OSC
RFpix
− f
RFpix, fIF
. For the measurement VRF=80dBµV.
OSC
− f
and f
of channel 6 at 42 MHz.
OSC
of channel A-4; f
OSC
= 45.5 MHz. The possible
BEAT
handbook, full pagewidth
1
2
5
10
∞
10
5
2
1
0.5
0.20.512510
400 MHz
0.5
40 MHz
MGE722
0.2
– j
0
+ j
0.2
Fig.9 Input admittance (S11) of the VHF mixer input (40 to 400 MHz); Y0= 20 mS.
2000 Jan 2420
Page 21
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
handbook, full pagewidth
0.5
0.2
350 MHz
+ j
0
– j
0.2
0.5
0.510.21052
1
860 MHz
TDA6402; TDA6402A;
TDA6403; TDA6403A
2
5
10
∞
10
5
2
handbook, full pagewidth
1
MGE723
Fig.10 Input impedance (S11) of the UHF mixer input (350 to 860 MHz); Z0=50Ω.
1
0.5
0.2
+ j
0
– j
0.2
0.510.21052
20 MHz
100 MHz
2
5
10
∞
10
5
0.5
1
Fig.11 Output impedance (S22) of the IF amplifier (20 to 60 MHz); Z0=50Ω.
2000 Jan 2421
2
MGE724
Page 22
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TEST AND APPLICATION INFORMATION
handbook, full pagewidth
Zi>> 50 Ω⇒Vi=2×V
Vi=V
V
G
=V’
o
= 20 log
v
meas
meas
+6dB=80dBµV.
50 22+
×
-------------------
V
o
-----V
i
e
=80dBµV.
meas
50
50 Ω
signal
source
V
meas
V
RMS
voltmeter
50 Ω
VHFIN
V
i
D.U.T.
IFOUT
TDA6402; TDA6402A;
TDA6403; TDA6403A
22 Ω
V
V'
o
meas
spectrum
analyzer
50 Ω
MGE698
Fig.12 Gain measurement in VHF band.
handbook, full pagewidth
C1
BNCBNC
L1C2
(a) For fRF= 50 MHz:
mixer A frequency response measured = 57 MHz, loss = 0 dB
image suppression = 16 dB
C1 = 9 pF
C2 = 15 pF
L1 = 7 turns (∅ 5.5 mm, wire ∅ = 0.5 mm)
l1 = semi rigid cable (RIM): 5 cm long
mixer A frequency response measured = 150.3 MHz, loss = 1.3 dB
image suppression = 13 dB
C3 = 5 pF
C4=25pF
l2 = semi rigid cable (RIM): 30 cm long
l3 = semi rigid cable (RIM): 5 cm long
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
Table 18 Crystal
COMPONENTVALUE
X14 MHz
Table 19 Transistors
COMPONENTVALUE
TR1BC847B
TR2BC847B
Tuning amplifier
The tuning amplifier is capable of driving the varicap
voltage without an external transistor. The tuning voltage
output must be connected to an external load of 27 kΩ
which is connected to the tuning voltage supply rail.
The loop filter design depends on the oscillator
characteristics and the selected reference frequency.
Crystal oscillator
TDA6402; TDA6402A;
TDA6403; TDA6403A
= 4 MHz
2
C-bus sequences (SW = VCC) for
Examples of I
TDA6402 and TDA6403
Tables 20 to 24 show the various sequences where:
f
= 100 MHz
OSC
PVHFL = ‘ON’ to switch on VHF I
FMST is ‘ON’ to switch on an FM sound trap
ICP= 280 µA
N = 512
f
XTAL
S = START
A = acknowledge
P = STOP.
For the complete sequence see Table 20 (sequence 1)or
Table 21 (sequence 2).
The crystal oscillator uses a 4 MHz crystal connected in
series with an 18 pF capacitor thereby operating in the
series resonance mode. Connecting the oscillator to the
supply voltageis preferred,but itcan also be connected to
ground.
Table 23 Control and band switch bytes only sequence
SC2ACEA09A P
Table 24 Control byte only sequence
BAND SWITCH
BYTE
Table 25 Status byte acquisition
SC3AXX
Notes
1. XX = Read status byte.
2. X = No acknowledge from the master means end of
sequence.
DIVIDER BYTE 1 DIVIDER BYTE 2STOP
BAND SWITCH
BYTE
(1)
(2)
X
STOP
P
SC2ACEA P
2000 Jan 2428
Page 29
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
Table 26 Two status bytes acquisition
SC3AXX
Notes
1. XX = Read status byte.
2. X = No acknowledge from the master means end of sequence.
2
Other I
Examples of 3-wire bus sequences (SW = OPEN)
Table 27 18-bit sequence (f
Thereference divideris automaticallyset to512 assumingthat RSBhas been setto logic 1at power-on.If RSBhas been
setto logic 0,in aprevious 27-bitsequence, thereference dividerwill stillbe setat 640.In thatevent, the18-bit sequence
has to be adapted to the 640 divider ratio.
Table 28 19-bit sequence (f
C-bus addresses may be selected by applying an appropriate voltage to the CE input.
100011001000000000
1000010100010100000
(1)
OSC
OSC
AXX
= 800 MHz; PUHF = ON)
= 650 MHz; PUHF = ON)
(1)X(2)
P
TDA6402; TDA6402A;
TDA6403; TDA6403A
Thereference divideris automaticallyset to512 assumingthat RSBhas been setto logic 1at power-on.If RSBhas been
set tologic 0 ina previous 27-bit sequence, thereference dividerwill still beset at640. Inthat event, the19-bit sequence
has to be adapted to the 640 divider ratio.
Table 29 27-bit sequence (f
100001110101001100010001000
Table 30 19-bit sequence
1000010111011100000
This sequence will program f
Table 31 18-bit sequence
100010111011100000
This sequence will program f
= 750 MHz; PUHF = ON; N = 640; ICP=60µA; no test function)
OSC
to 600 MHz in 50 kHz steps; ICP remains at 60 µA.
OSC
to 600 MHz in 50 kHz steps; ICP remains at 60 µA.
OSC
2000 Jan 2429
Page 30
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
INTERNAL PIN CONFIGURATION
AVERAGE DC VOLTAGE (V)
(measured in Fig.19)
VHFUHF
SYMBOL
TDA6402;
TDA6402A
PIN
TDA6403;
TDA6403A
DESCRIPTION
(1)
UHFIN1128note 21.0
UHFIN2227note 21.0
1
(28)
2
(27)
MGE704
VHFIN3261.8note 2
3
(26)
MGE705
RFGND4250.00.0
4
(25)
MGE706
IFFIL15243.63.6
65(23)(24)
IFFIL26233.63.6
MGD617
PVHFL7220.0 or (V
PVHFH821(V
PUHF9200.0(V
FMST10190.0 or (V
7
(22)
8
(21)
CC
− VCE)0.0
CC
− VCE) or 0.00.0
− VCE)0.0
CC
CC
− VCE)
9
(20)
2000 Jan 2430
10
(19)
MGE708
Page 31
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
PIN
SYMBOL
TDA6402;
TDA6402A
TDA6403;
TDA6403A
DESCRIPTION
(1)
TDA6402; TDA6402A;
TDA6403; TDA6403A
AVERAGE DC VOLTAGE (V)
(measured in Fig.19)
VHFUHF
SW11185.05.0
11
(18)
MGE709
CE/AS12171.251.25
12
(17)
MGE710
DA1316note 2note 2
13
(16)
MGE711
CL1415note 2note 2
14
(15)
MGE712
LOCK/ADC15144.64.6
15
(14)
MGE713
2000 Jan 2431
Page 32
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
PIN
SYMBOL
TDA6402;
TDA6402A
TDA6403;
TDA6403A
DESCRIPTION
(1)
TDA6402; TDA6402A;
TDA6403; TDA6403A
AVERAGE DC VOLTAGE (V)
(measured in Fig.19)
VHFUHF
CP16131.91.9
16
(13)
MGE714
VT1712V
17
(12)
MGE715
VT
V
VT
XTAL18113.43.4
18
(11)
MGE716
V
CC
1910supply voltage5.05.0
IFOUT2092.12.1
20
(9)
MGE717
GND2180.00.0
21
(8)
MGE718
OSCGND2360.00.0
23
(6)
MGE719
2000 Jan 2432
Page 33
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
1. The pin numbers in parenthesis represent the TDA6403 and TDA6403A.
2. Not applicable.
2000 Jan 2433
Page 34
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
PACKAGE OUTLINE
SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm
D
c
y
Z
2815
TDA6402; TDA6402A;
TDA6403; TDA6403A
SOT341-1
E
H
E
A
X
v M
A
pin 1 index
114
w M
b
e
DIMENSIONS (mm are the original dimensions)
mm
A
max.
2.0
0.21
0.05
1.80
1.65
0.25
0.38
0.25
p
cD
0.20
0.09
UNITA1A2A3b
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
p
02.55 mm
scale
(1)E(1)(1)
10.4
10.0
eHELLpQZywv θ
5.4
0.651.25
5.2
7.9
7.6
Q
A
2
A
1
detail X
1.03
0.9
0.63
0.7
(A )
L
p
L
0.130.10.2
A
3
θ
1.1
0.7
o
8
o
0
OUTLINE
VERSION
SOT341-1 MO-150
IEC JEDEC EIAJ
REFERENCES
2000 Jan 2434
EUROPEAN
PROJECTION
ISSUE DATE
95-02-04
99-12-27
Page 35
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
SOLDERING
Introduction to soldering surface mount packages
Thistext givesavery briefinsight to acomplex technology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering isnot alwayssuitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuitboard byscreen printing, stencillingor
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times(preheating, solderingand cooling)vary
between 100 and 200 seconds depending on heating
method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
TDA6402; TDA6402A;
TDA6403; TDA6403A
• Use a double-wave soldering method comprising a
turbulent wavewith high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
be placedat a 45° angleto the transport directionof the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and beforesoldering, thepackage must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Wave soldering
Conventional single wave soldering is not recommended
forsurface mountdevices(SMDs) orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering isused the following conditions must be
observed for optimal results:
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2000 Jan 2435
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Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
Suitability of surface mount IC packages for wave and reflow soldering methods
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
2. These packages arenot suitable for wave soldering as a solder joint between theprinted-circuit board and heatsink
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
4. Wave soldering is onlysuitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or largerthan 0.8 mm;
5. Wave solderingis only suitable for SSOPand TSSOP packageswith a pitch(e) equal to or largerthan 0.65 mm; it is
, SO, SOJsuitablesuitable
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
The package footprint must incorporate solder thieves downstream and at the side corners.
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in suchapplications do so at theirown risk and agree tofully indemnify Philips for anydamages resulting from such
improper use or sale.
TDA6402; TDA6402A;
TDA6403; TDA6403A
PURCHASE OF PHILIPS I
Purchase of Philips I
components inthe I2C systemprovided the systemconforms to the I2C specificationdefined by
Philips. This specification can be ordered using the code 9398 393 40011.
2
C COMPONENTS
2
C components conveys a license under the Philips’ I2C patent to use the
2000 Jan 2437
Page 38
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
NOTES
TDA6402; TDA6402A;
TDA6403; TDA6403A
2000 Jan 2438
Page 39
Philips SemiconductorsProduct specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
NOTES
TDA6402; TDA6402A;
TDA6403; TDA6403A
2000 Jan 2439
Page 40
Philips Semiconductors – a w orldwide compan y
Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in thisdocument does not form partof any quotation or contract,is believed to be accurateand reliable and may bechanged
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
2000
Internet: http://www.semiconductors.philips.com
69
Printed in The Netherlands545004/05/pp40 Date of release: 2000 Jan 24Document order number: 9397 750 06728
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