Preliminary specification
File under Integrated Circuits, IC01
1997 Apr 07
Page 2
Philips SemiconductorsPreliminary specification
Digital Servo Driver 3 (DSD-3)SZA1010
FEATURES
Servo functions
• 1-bit class-D focus actuator driver (4 Ω)
• 1-bit class-D radial actuator driver (4 Ω)
• 1-bit class-D sledge motor driver (2 Ω).
Other features
• Supply voltage 5 V only
• Small package (SOT163-1)
• Higher efficiency, compared with conventional drivers,
due to the class-D principle
• Built-in digital notch filters for higher efficiency
• Enable input for focus and radial driver
• Enable input for sledge driver
• 3-state input for radial driver
• Doubled clock frequency
• Differential outputs for all drivers
• Separate power supply pins for all drivers.
QUICK REFERENCE DATA
GENERAL DESCRIPTION
The SZA1010 or Digital Servo Driver 3 (DSD-3) consists of
1-bit class-D power drivers, which are specially designed
for digital servo applications. Three such amplifiers are
integrated in one chip, to drive the focus and radial
actuators and the sledge motor of a compact disc optical
system.
The main benefits of using this principle are its higher
efficiency grade compared to conventional analog power
amplifiers, its higher integration level, its differential output
and the fact that only a few external components are
needed. When using these digital power drivers in a digital
servo application, the statement ‘complete digital servo
loop’ becomes more realistic.
SYMBOLPARAMETERMIN.TYP.MAX.UNIT
V
DDD
V
DDA(F)
V
DDA(R)
V
DDA(S)
I
DDDq
I
DDA(F)
I
DDA(R)
I
DDA(S)
f
i(clk)
P
tot
T
amb
digital supply voltage4.5−5.5V
analog supply voltage focus actuator4.5−5.5V
analog supply voltage radial actuator4.5−5.5V
analog supply voltage sledge actuator4.5−5.5V
quiescent digital supply current−−10µA
analog supply current focus actuator−126250mA
analog supply current radial actuator−20250mA
analog supply current sledge actuator−150560mA
input clock frequency−8.467210MHz
total power dissipation−tbf−mW
operating ambient temperature−40−+85°C
ORDERING INFORMATION
TYPE
NUMBER
NAMEDESCRIPTIONVERSION
PACKAGE
SZA1010TSO20plastic small outline package; 20 leads; body width 7.5 mmSOT163-1
1997 Apr 072
Page 3
Philips SemiconductorsPreliminary specification
Digital Servo Driver 3 (DSD-3)SZA1010
BLOCK DIAGRAM
book, full pagewidth
RAC
FOC
SLC
CLI
EN1
EN2
4
3
2
7
8
9
SZA1010
CONTROL
V
V
V
DDA(R)
DDD
613141
DIGITAL
NOTCH FILTER
DIGITAL
NOTCH FILTER
DIGITAL
NOTCH FILTER
5101718
V
SSA(R)
SSD
V
3-STATE
DDA(F)
V
DDA(S)
END STAGE
H−BRIDGE
END STAGE
H−BRIDGE
END STAGE
H−BRIDGE
V
SSA(S)/VSSA(F)
11
RA+
12
RA−
15
FO+
16
FO−
19
SL+
20
SL−
MBK013
Fig.1 Block diagram.
1997 Apr 073
Page 4
Philips SemiconductorsPreliminary specification
Digital Servo Driver 3 (DSD-3)SZA1010
PINNING
SYMBOLPINDESCRIPTION
V
DDA(S)
SLC2PDM input for sledge driver
FOC3PDM input for focus driver
RAC4PDM input for radial driver
V
SSD
V
DDD
CLI7clock input
EN18enable input 1
EN29enable input 2
V
SSA(R)
RA+11radial driver (positive output)
RA−12radial driver (negative output)
V
FUNCTIONAL DESCRIPTION
Principle of a class-D digital power driver
Figure 3 shows the block diagram of one of the digital
drivers integrated in the DSD-3. It consists of a timing
block and four CMOS switches. The input signal is a 1-bit
Pulse Density Modulated (PDM) signal, the output of the
digital servo ICs.
The maximum operating clock frequency of the device is
10 MHz. In combination with most frequently used Philips
digital servo ICs, the operating frequency of the digital
drivers is 8.4672 MHz (192 × 44.1 kHz). The sampling
frequency of the 1-bit code however is 2.1168 MHz, so
internally in the DSD-3 the clock speed of the switches will
be 2.1168 MHz.
The higher input clock frequency is used to make
non-overlapping pulses to prevent short-circuits between
the supply voltages. For the control of the switches, two
states can be distinguished. If the 1-bit code contains a
logic 1, switches A and D are closed and current will flow
in the direction as shown in Fig.4.
If the 1-bit code contains a logic 0, switches B and C are
closed and current will flow in the opposite direction, as
shown in Fig.5.
This indicates that the difference between the mean
number of ones and zeros in the PDM signal determines
the direction in which the actuator or motor will rotate.
If the mean number of ones and zeros is equal (Idle mode)
the current through the motor or actuator is alternated
between the positive and negative direction at a speed of
half the sample frequency of 2.1168 MHz. This results in a
high dissipation and the motor does not move.
The amplitude transfer as a function of frequency is given
in Fig.7.
Figure 7 shows that the filter has a zero on
filtering out the Idle pattern (101010). The output of this
filter is a three-level code (1.5-bit). For the control of the
switches three states (1.5-bit) can be distinguished: the
two states as described earlier and a third one. This state
is used when an idling pattern is supplied.
Switches C and D are closed (see Fig.8). In this Idle mode,
no current will flow and thus the efficiency will be improved.
This mode is also used to short-circuit the inductive
actuator/motor. In this way, high induction voltages are
prevented because the current can commutate via the
filter and the short-circuit in the switches. All three drivers
(radial, focus and sledge) contain a digital notch filter as
described (see Fig.6). Each driver has its own power
supply pins to reduce crosstalk due to of the relative high
current flowing through the pins.
Compared to the DSD-2, the DSD-3 has a 3-state mode
for the radial output, which is useful when active damping
of the radial actuator is needed. When fast access times
are required, the sledge has to move with high
accelerations. To prevent the radial actuator from moving
too far from its centre position due to the acceleration,
active damping is applied. In order to measure the
displacement of the radial actuator, the voltage induced by
the actuator itself is measured, which is proportional to its
speed. The damping consists of a sequence of controlling,
waiting, measuring and controlling etc. To be able to
measure the induced voltage properly, the influence of the
DSD-3 is eliminated by switching it into 3-state mode.
1
⁄2fs, thereby
To improve the efficiency, a digital notch filter is added at
the input of the digital drivers. This filters the Idle mode
pattern (1010101010 etc.) see Fig.6.
1997 Apr 075
Page 6
Philips SemiconductorsPreliminary specification
Digital Servo Driver 3 (DSD-3)SZA1010
1-bit
code
TIMING
clock
MBG786
(1) Sledge motor; focus/radial motor.
Fig.3 One of the digital drivers.
V
DD
1-bit
code
(1)
M
V
SS
'1'
TIMING
clock
MBG787
(1) Sledge motor; focus/radial motor.
V
DD
I
pos
AB
(1)
M
CD
V
SS
Fig.4 1-bit code is logic 1.
V
DD
I
neg
1-bit
code
'0'
TIMING
clock
MBG788
(1) Sledge motor; focus/radial motor.
AB
(1)
M
CD
V
SS
Fig.5 1-bit code is logic 0.
1997 Apr 076
1-bit1.5-bit
The filter consists of a simple delay element (flip-flop) and an adder.
The transfer from input-to-output is: H(z) =1 + z
1/Z
MBG789
−1
.
Fig.6 Notch filter at input of digital drivers.
Page 7
Philips SemiconductorsPreliminary specification
Digital Servo Driver 3 (DSD-3)SZA1010
|H|
MBG790
1/2f
s
Fig.7 Amplitude transfer.
Switches
The digital part of the power drivers consists of standard
cells. The power switches are specifically designed for CD
applications. The most important feature is their
on-resistance. In the applications, they have to drive very
low-ohmic actuators and/or motors. The switches are
designed to have an on-resistance of 2 Ω for the actuator
drivers and 1 Ω for the sledge motor driver. In any mode,
there are always two switches in series with the
actuator/motor. The total loss due to the switches is 4 Ω for
the actuators and 2 Ω for the sledge motor.
3-state input
When the 3-STATE input (pin 17) is made HIGH, the four
CMOS switches of the radial driver are opened.
Consequently, the radial output pins RA+ (pin 11) and RA−
(pin 12) switch into a high impedance state.
To set the circuit into 3-state mode, the clock signal (CLI)
is not required; the 3-STATE input is a direct,
asynchronous input. It has an internal pull-down resistor.
V
DD
1-bit
code
'idle'
TIMING
clock
MBG791
(1) Sledge motor; focus/radial motor.
AB
(1)
M
CD
I
idle
V
SS
Fig.8 Idling pattern.
Timing of input and output signals
All internal timing signals are derived from the externally
supplied CLI signal.
Sampling of the data inputs (SLC, FOC and RAC) occurs
at a frequency of1⁄4CL. For each channel, the clocking-in
occurs at a different positive edge of CLI. Because there
are only 3 channels, and the clock frequency CLI is
divided-by-4, only 3 out of 4 positive edges are effective for
sampling one of the inputs.
The switching of the outputs occurs in a similar way,
except that in this event the negative edge of CLI is used.
In this way, the input signals are immune to the noise
radiated by the switching of the outputs. It is possible that
an output transition will have a noticeable effect on the
power supply voltage or the ground voltage. To avoid
simultaneous transitions of all outputs, the outputs of each
bridge are also clocked at a different phase of CLI.
Consequently there are only 3 out of 4 negative edges
effective.
To reset the circuit, both the reset condition and the clock
should be present, because all flip-flops are reset
synchronously. The clock signal is also required to obtain
one of the possible modes of operation indicated in
Table 1.
The timing diagram as shown in Fig.9 gives the relationship between the different clocks.
The negative edge of the signals called ncl0 to ncl2 is used to process the incoming data (see Table 2).
The negative edge of all signals called cl0s to cl2s is used to trigger the outputs (see Table 2).
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERMIN.MAX.UNIT
V
DDD
V
DDA(x)
− V
V
SSD
P
tot
T
stg
T
amb
SSA(x)
digital supply voltage−0.5+6.5V
analog supply voltage−0.5+6.5V
ground supply voltage difference−5+5mV
total power dissipation−tbfmW
storage temperature−55+150°C
operating ambient temperature−40+85°C
THERMAL CHARACTERISTICS
SYMBOLPARAMETERVALUEUNIT
R
th j-a
thermal resistance from junction to ambient in free air75K/W
1997 Apr 078
Page 9
Philips SemiconductorsPreliminary specification
Digital Servo Driver 3 (DSD-3)SZA1010
CHARACTERISTICS
V
DDD=VDDA(x)
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
General
V
DDD
V
DDA(x)
I
DDDq
I
DDA(F)(max)
I
DDA(R)(max)
I
DDA(S)(max)
f
i(clk)
P
tot
T
amb
Digital inputs; SLC, FOC, RAC, CLI, 3-STATE, EN1 and EN2
V
IL
V
IH
I
LI
Clock input; CLI
f
clk
Analog outputs; FO+ and FO−
I
O
R
O
Analog outputs; RA+ and RA−
I
O
R
O
Analog outputs; SL+ and SL−
I
O
R
O
=5V; V
SSD=VSSA(x)
=0V; T
=25°C; unless otherwise specified.
amb
digital supply voltage4.5−5.5V
analog supply voltage4.5−5.5V
quiescent digital supply current−−tbfµA
maximum analog supply current
note 1−126250mA
focus actuator
maximum analog supply current
note 1−20250mA
radial actuator
maximum analog supply current
note 1−150560mA
sledge actuator
input clock frequency−8.467210MHz
total power dissipation−tbf−mW
operating ambient temperature−40−+85°C
LOW level input voltageT
HIGH level input voltageT
1. Maximum supply current depends on the value of R
:
I
L
max
DDA(x)(max)
=
-----------------------------RORL+()
2. Output resistance is defined as the series resistance of the complete bridge.
1997 Apr 079
Page 10
Philips SemiconductorsPreliminary specification
Digital Servo Driver 3 (DSD-3)SZA1010
Timing diagram
RA−
RA+
FO−
FO+
SL−
SL+
cI2s
cI1s
cI0s
ncI2
ncI1
ncI0
RAC
FOC
SLC
CLI
MBG792
full pagewidth
inputs
outputs
Fig.9 Timing diagram.
Sampling of the incoming data is marked by a ‘∗’.
1997 Apr 0710
Page 11
Philips SemiconductorsPreliminary specification
Digital Servo Driver 3 (DSD-3)SZA1010
APPLICATION INFORMATION
Figure 10 shows an application example.
An LC filter is connected to each output of the SZA1010 in
order to remove the PDM square wave signal at the clock
frequency. This is done to prevent the relatively long wires
to the actuators and motor from radiating and thereby
disturbing other circuitry. Therefore it is recommended to
place the coils as close as possible to the IC. The LC filter
bandwidth has been chosen as high as 20 kHz to ensure
that the filter’s poles are far enough outside the relevant
loop bandwidth, which in this application is approximately
1 kHz. In this way their influence on the closed loop
performance is kept to a minimum. Furthermore, the
corner frequency has not been chosen higher in order to
filter out noise and spurious products as much as possible,
because they enlarge the dissipation.
The various power supply and ground pins are all
connected together in the schematic, but if desired, the
focus, radial and sledge power pins can be connected to a
separate power supply.
The three ground pins are internally connected and
therefore should not be separated.
1997 Apr 0711
Page 12
Philips SemiconductorsPreliminary specification
Digital Servo Driver 3 (DSD-3)SZA1010
MBK014
SERVO
(OQ8868)
CONTROLLER
33
32
SL
FO
31
RA
28
CLKO
(1)
5 V
+
100 nF
DDD
V
DDA(S)
V
DDA(R)
V
DDA(F)
V
SLC
2
FOC
3
RAC
4
3-STATE
CLI
17
EN1
EN2
7
8
9
from microcontroller
SSD
V
SSA(R)
V
SZA1010
18105
141316
19
20
SL−
SL+
15
16
FO−
FO+
11
RA−
RA+
SSA(F)
12
/V
SSA(S)
V
handbook, full pagewidth
Fig.10 Application diagram.
100 µH
100 µH
100 µH
100 µH
100 µH
100 µH
(2×)
1 µF
M
sledge motor
M
focus actuator
radial actuator
1997 Apr 0712
(2×)
1 µF
(2×)
2.2 µF
M
(1) See Table 1.
Page 13
Philips SemiconductorsPreliminary specification
Digital Servo Driver 3 (DSD-3)SZA1010
PACKAGE OUTLINE
SO20: plastic small outline package; 20 leads; body width 7.5 mm
D
c
y
Z
20
pin 1 index
1
e
11
A
2
10
w M
b
p
SOT163-1
E
H
E
Q
A
1
L
p
L
detail X
(A )
A
X
v M
A
A
3
θ
0510 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
OUTLINE
VERSION
SOT163-1
A
max.
2.65
0.10
A
1
0.30
0.10
0.012
0.004
A2A
2.45
2.25
0.096
0.089
IEC JEDEC EIAJ
075E04 MS-013AC
0.25
0.01
b
3
p
0.49
0.32
0.36
0.23
0.019
0.013
0.014
0.009
UNIT
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
(1)E(1)(1)
cD
13.0
7.6
7.4
0.30
0.29
1.27
0.050
12.6
0.51
0.49
REFERENCES
1997 Apr 0713
eHELLpQ
10.65
10.00
0.42
0.39
1.4
0.055
1.1
0.4
0.043
0.016
1.1
1.0
0.043
0.039
PROJECTION
0.25
0.250.1
0.01
0.01
EUROPEAN
ywvθ
Z
0.9
0.4
0.035
0.004
0.016
ISSUE DATE
92-11-17
95-01-24
o
8
o
0
Page 14
Philips SemiconductorsPreliminary specification
Digital Servo Driver 3 (DSD-3)SZA1010
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“IC Package Databook”
Reflow soldering
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
(order code 9398 652 90011).
Wave soldering
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
1997 Apr 0714
Page 15
Philips SemiconductorsPreliminary specification
Digital Servo Driver 3 (DSD-3)SZA1010
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Apr 0715
Page 16
Philips Semiconductors – a worldwide company
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
Printed in The Netherlands547027/00/01/pp16 Date of release: 1997 Apr 07Document order number: 9397 750 01953
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