Page 1
N-channel 600 V - 0.047 Ω - 51 A TO-247
FDmesh™ II Power MOSFET (with fast diode)
Features
V
Typ e
STW55NM60ND 650 V < 0.060 Ω 51 A
DSS
(@TJmax)
R
DS(on)
(max)
STW55NM60ND
I
D
■ The worldwide best R
amongst the fast
DS(on)
recovery diode devices in TO-247
■ 100% avalanche tested
■ Low input capacitance and gate charge
■ Low gate input resistance
■ High dv/dt and avalanche capabilities
Application
■ Switching applications
Description
The FDmesh™ II series belongs to the second
generation of MDmesh™ technology. This
revolutionary Power MOSFET associates a new
vertical structure to the company's strip layout
and associates all advantages of reduced onresistance and fast switching with an intrinsic fastrecovery body diode.It is therefore strongly
recommended for bridge topologies, in particular
ZVS phase-shift converters.
3
2
1
TO-247
Figure 1. Internal schematic diagram
Table 1. Device summary
Order code Marking Package Packaging
STW55NM60ND 55NM60ND TO-247 Tube
April 2008 Rev 2 1/12
www.st.com
12
Page 2
Contents STW55NM60ND
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12
Page 3
STW55NM60ND Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
DS
V
GS
I
D
I
D
I
DM
P
TOT
dv/dt
T
stg
T
1. Pulse width limited by safe operating area
2. ISD ≤ 51 A, di/dt ≤ 600 A/µs, VDD = 80% V
Drain-source voltage (VGS = 0) 600 V
Gate- source voltage ±25 V
Drain current (continuous) at TC = 25 °C 51 A
Drain current (continuous) at TC = 100 °C 32 A
(1)
Drain current (pulsed) 204 A
Total dissipation at TC = 25 °C 350 W
(2)
Peak diode recovery voltage slope 40 V/ns
Storage temperature –55 to 150 °C
Max. operating junction temperature 150 °C
j
(BR)DSS
Table 3. Thermal data
Symbol Parameter Val ue Unit
R
thj-case
R
thj-amb
T
Thermal resistance junction-case max 0.36 °C/W
Thermal resistance junction-ambient max 50 °C/W
Maximum lead temperature for soldering
l
purpose
300 °C
Table 4. Avalanche characteristics
Symbol Parameter Max value Unit
I
AS
E
Avalanche current, repetitive or notrepetitive (pulse width limited by Tj max)
Single pulse avalanche energy
AS
(starting T
= 25 °C, ID = IAS, VDD = 50 V)
j
15 A
850 mJ
3/12
Page 4
Electrical characteristics STW55NM60ND
2 Electrical characteristics
(T
=25°C unless otherwise specified)
CASE
Table 5. On/off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
dv/dt
I
DSS
I
GSS
V
GS(th)
R
DS(on)
1. Characteristic value at turn off on inductive load
Drain-source
breakdown voltage
(1)
Drain source voltage slope
Zero gate voltage
drain current (VGS = 0)
Gate-body leakage
current (VDS = 0)
ID = 1 mA, VGS = 0 600 V
VDD=480 V, ID= 51 A,
VGS =10 V
30 V/ns
VDS = Max rating
VDS = Max rating @125 °C
VGS = ± 20 V 100 nA
Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V
Static drain-source on
resistance
= 10 V, ID = 25.5 A 0.047 0.060 Ω
V
GS
1
100µAµA
Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
(1)
g
fs
C
C
C
Forward transconductance VDS = 15 V, ID = 25.5 A 45 S
Input capacitance
iss
Output capacitance
oss
Reverse transfer
rss
capacitance
= 50 V, f = 1 MHz,
V
DS
VGS = 0
5800
300
30
pF
pF
pF
C
oss eq.
t
d(on)
t
d(off)
Q
Q
Q
(2)
capacitance
Turn-on delay time
t
Rise time
r
Turn-off delay time
t
Fall time
f
Total gate charge
g
Gate-source charge
gs
Gate-drain charge
gd
V
V
R
(see Figure 19),
(see Figure 14)
VDD = 480 V, ID = 51 A,
VGS = 10 V,
(see Figure 15)
Equivalent output
f=1 MHz Gate DC Bias = 0
R
Gate input resistance
g
Test signal level = 20 mV
Open drain
1. Pulsed: pulse duration= 300 µs, duty cycle 1.5%
2. C
. is defined as a constant equivalent capacitance giving the same charging time as C
oss eq
increases from 0 to 80% V
DSS
4/12
= 0, VDS = 0 to 480 V 900 pF
GS
= 300 V, ID = 25.5 A
DD
=4.7 Ω, VGS = 10 V
G
33
68
188
96
190
30
90
2.5 Ω
when VDS
oss
ns
ns
ns
ns
nC
nC
nC
Page 5
STW55NM60ND Electrical characteristics
Table 7. Source drain diode
Symbol Parameter T es t co nditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
t
Q
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%.
Source-drain current
(1)
Source-drain current (pulsed)
(2)
Forward on voltage ISD = 51 A, VGS = 0 1.3 V
Reverse recovery time
rr
Reverse recovery charge
rr
Reverse recovery current
Reverse recovery time
rr
Reverse recovery charge
rr
Reverse recovery current
= 51 A, VDD = 60 V
I
SD
di/dt = 100 A/µs
(see Figure 16)
= 51 A,VDD = 60 V
I
SD
di/dt = 100 A/µs,
= 150 °C
T
j
(see Figure 16)
200
1.8
18
280
3.4
24
51
204AA
ns
µC
A
ns
µC
A
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Page 6
Electrical characteristics STW55NM60ND
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Transconductance Figure 7. Static drain-source on resistance
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STW55NM60ND Electrical characteristics
Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage
vs temperature
Figure 12. Source-drain diode forward
characteristics
Figure 11. Normalized on resistance vs
temperature
Figure 13. Normalized B
vs temperature
VDSS
7/12
Page 8
Test circuits STW55NM60ND
3 Test circuits
Figure 14. Switching times test circuit for
resistive load
Figure 16. Test circuit for inductive load
switching and diode recovery times
Figure 15. Gate charge test circuit
Figure 17. Unclamped Inductive load test
circuit
Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform
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STW55NM60ND Package mechanical data
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
9/12
Page 10
Package mechanical data STW55NM60ND
TO-247 Mechanical data
Dim.
Min. Typ Max.
A4.855.15
A1 2.20 2.60
b 1.0 1.40
b1 2.0 2.40
b2 3.0 3.40
c0.40 0.80
D19.85 20.15
E 15.45 15.75
e5.45
L 14.20 14.80
L1 3.70 4.30
L2 18.50
øP 3.55 3.65
øR 4.50 5.50
S 5.50
mm.
10/12
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STW55NM60ND Revision history
5 Revision history
Table 8. Document revision history
Date Revision Changes
16-Nov-2007 1 First release.
22-Apr-2008 2 Document status promoted from preliminary data to datasheet.
11/12
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STW55NM60ND
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