STMicroelectronis unique "Single Feature Size™"
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance, rugged avalanche characteristics and
less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
■ DC MOTOR DRIVE
■ DC-DC CONVERTERS
■ BATTERY MANAGEMENT IN NOMADIC
EQUIPMENT
■ POWER MANAGEMENT IN
PORTABLE/DESKTOP PCs
■ CELLULAR
SOT23-6L
INTERNAL SCHEMATIC DIAGRAM
MARKING
■ STA3
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
DS
V
DGR
V
GS
I
D
I
D
(
I
DM
P
tot
(
Pulse width limited by safe operating area.Note: P-CHANNEL MOSFET actual polarity of voltages and current
•)
.
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
30V
30V
Gate- source Voltage± 16V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
•)
Drain Current (pulsed)10A
Total Dissipation at TC = 25°C
has to be reversed
2.4A
1.5A
1.6W
1/8September 2002
Page 2
STT3PF30L
THERMAL DATA
Rthj-amb
Rthj-amb
T
T
stg
(*) Mounted on a 1 inch pad of 2 oz. Cu in FR-4 board
(**) Mounted on a minimu m pad of 2 oz. Cu in FR- 4 board
(*)Thermal Resistance Junction-ambient
(**)Thermal Resistance Junction-ambient
Max. Operating Junction Temperature
j
Storage Temperature
Max
Max
78
156
-55 to 150
-55 to 150
°C/W
°C/W
°C
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C unless otherwise specified)
case
OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
V
(BR)DSS
Drain-source
= 250 µA, VGS = 0
D
30
Breakdown Voltage
V
= Max Rating
DS
V
= Max Rating TC = 125°C
DS
V
= ± 16 V
GS
1
10
±100nA
ON
(*)
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
Resistance
= VGS ID = 250 µA
DS
= 10 VID = 1.5 A
V
GS
V
= 4.5 VID = 1.5 A
GS
11.62.5V
0.14
0.16
0.165
0.2
DYNAMIC
SymbolParameterTest ConditionsMin.Typ.Max.Unit
(*)
g
fs
C
iss
C
oss
C
rss
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
=25 V ID= 1.5 A
DS
= 25V f = 1 MHz, VGS = 0
V
DS
4S
420
95
30
V
µA
µA
Ω
Ω
pF
pF
pF
2/8
Page 3
STT3PF30L
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
SymbolParameterTest ConditionsMin.Typ.Max.Unit
= 15 V ID = 1.5 A
t
d(on)
Turn-on Delay Time
t
r
Rise Time
V
DD
R
= 4.7 Ω VGS = 4.5 V
G
(Resistive Load, Figure 1)
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
= 24V ID= 3A VGS=4.5V
V
DD
(see test circuit, Figure 2)
SWITCHING OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
= 15 V ID = 1.5 A
t
d(off)
Turn-off Delay Time
t
f
Fall Time
V
DD
R
= 4.7Ω, V
G
GS
= 4.5 V
(Resistive Load, Figure 1)
SOURCE DRAIN DIODE
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulsed: P ul se duration = 300 µs, duty cycle 1.5 %.
(
•)Pulse width limited by s afe operating area.
Source-drain Current
(•)
Source-drain Current (pulsed)
(*)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
= 3 A VGS = 0
SD
= 3 Adi/dt = 100A/µs
I
SD
V
= 15 VTj = 150°C
DD
(see test circuit, Figure 3)
14.5
37
4.8
1.7
2
90
23
35
25
1.5
7nC
3
12
1.2V
ns
ns
nC
nC
ns
ns
A
A
ns
nC
A
Safe Operating AreaThermal Impedance
3/8
Page 4
STT3PF30L
Output Characteristics Transfer Characteristics
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
4/8
Page 5
STT3PF30L
Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/8
Page 6
STT3PF30L
Fig. 1: Switching Times Test Circuits For Resistive
Load
Fig. 3: Test Circuit For Diode Recovery Behaviour
Fig. 2: Gate Charge test Circuit
6/8
Page 7
SOT23-6L MECHANICAL DATA
STT3PF30L
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
A0.901.450.0350.057
A10.000.150.0000.006
A20.901.300.0350.051
b0.250.500.0100.020
C0.090.200.0040.008
D2.803.100.1100.122
E2.603.000.1020.118
E11.501.750.0590.069
L0.350.550.0140.022
e0.950.037
e11.900.075
mmmils
AA2
A1
b
e
c
L
E
e1
D
E1
7/8
Page 8
STT3PF30L
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise under any patent or patent r i ght s of STMi croelectr oni cs. Spec i fications mentione d i n this publicatio n are subj ect
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics product s are not
authorized for use as cri tical comp onents in lif e support devi ces or systems without express written approva l of STMicroe l ectronics.
The ST logo is registered trademark of STMicroelectronics
2002 STMi croelectronics - All Ri ghts Rese rved
All other na m es are the property of their respective owners.
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Singap ore - Spain - Sw eden - Switzerland - Uni ted Kingdom - United St at es.
STMicroelectronics GROUP OF COMPANIES
http:// www.st.com
8/8
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