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sts9nh3ll
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Datasheet sts9nh3ll Datasheet

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Page 1
low gate charge STripFET™ III Power MOSFET
Obsolete Product(s) - Obsolete Product(s)
Features
R
Type V
STS9NH3LL 30 V 0.022 Ω 9 A
DSS
DS(on)
max
STS9NH3LL
N-channel 30 V - 0.018 Ω - 9 A - SO-8
I
D
■ Optimal R
■ Conduction losses reduced
■ Switching losses reduced
DS(on)
Application
■ Switching applications
Description
This application specific Power MOSFET is the third generation of STMicroelectronics unique “single feature size” strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance.
SO-8

Figure 1. Internal schematic diagram

Table 1. Device summary

Order code Marking Package Packaging
STS9NH3LL S9NH3LL SO-8 Tape & reel
December 2007 Rev 3 1/13
www.st.com
13
Page 2
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Contents STS9NH3LL
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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STS9NH3LL Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit
V
DS
V
GS
I
D
I
D
I
DM
P
TOT
E
AS
T
T
stg
1. Pulse width limited by safe operating area
2. Starting TJ = 25 °C, ID = 6 A.
Drain-source voltage (VGS = 0) 30 V
Gate-source voltage ±16 V
Drain current (continuous) at TC = 25 °C 9 A
Drain current (continuous) at TC= 100 °C 6 A
(1)
Drain current (pulsed) 36 A
Total dissipation at TC = 25 °C 2.5 W
(2)
Single pulse avalanche energy 100 mJ
Operating junction temperature
J
Storage temperature
-55 to 150 °C

Table 3. Thermal data

Symbol Parameter Value Unit
(1)
R
thj-amb
1. When mounted on 1 inch² FR-4 board, 2oz Cu (t < 10 sec.)
Thermal resistance junction-ambient max 50 °C/W
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Electrical characteristics STS9NH3LL

2 Electrical characteristics

(T
=25°C unless otherwise specified)
CASE

Table 4. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source breakdown voltage
Zero gate voltage drain current (VGS = 0)
Gate body leakage current
= 0)
(V
DS
Gate threshold voltage
Static drain-source on resistance
= 250 µA, VGS= 0
I
D
V
= Max rating
DS
V
= Max rating @ 125 °C
DS
= ±16 V
V
GS
= VGS, ID = 250 µA
V
DS
= 10 V, ID= 4.5 A
V
GS
= 4.5 V, ID= 4.5 A
V
GS
30 V
1
10µAµA
±100 nA
1V
0.018
0.020
0.022
0.025ΩΩ

Table 5. Dynamic

Symbol Parameter T est conditions Min. Typ. Max. Unit
(1)
g
fs
C
C
C
Forward transconductance
Input capacitance
iss
Output capacitance
oss
Reverse transfer
rss
capacitance
=10 V, ID = 4.5 A
V
DS
V
= 25 V, f=1 MHz, VGS=0
DS
8.5 S
857 147
20
pF pF pF
Q
g
Total gate charge
Q
Q
1. Pulsed: pulse duration=300 µs, duty cycle 1.5%
Gate-source charge
gs
Gate-drain charge
gd
VDD= 15 V, ID = 9 A
= 4.5 V,
V
GS
(see Figure 16)
7.0
2.5
2.3
10 nC
nC nC
4/13
Page 5
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STS9NH3LL Electrical characteristics

Table 6. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit
=15 V, ID= 4.5 A,
V
t
d(on)
t
t
d(off)
t
Turn-on delay time Rise time
r
Turn-off delay time Fall time
f
DD
= 4.7 Ω, VGS= 4.5 V
R
G
(see Figure 15)
V
=15 V, ID= 4.5 A,
DD
= 4.7 Ω, VGS= 4.5 V
R
G
(see Figure 15)
12
14.5
23
8
ns ns
ns ns

Table 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit
I
I
SDM
V
SD
Q
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300 µs, duty cycle 1.5%
Source-drain current
SD
Source-drain current
(1)
(pulsed)
(2)
Forward on voltage
t
rr
Reverse recovery time Reverse recovery charge
rr
Reverse recovery current
I
SD
I
SD
V
DD
(see Figure 17)
= 4.5 A, VGS=0
= 9 A, di/dt = 100 A/µs,
= 15 V, Tj=150 °C
15
5.7
0.76
9
36
1.5 V
ns
nC
A A
A
5/13
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Electrical characteristics STS9NH3LL

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Transconductance Figure 7. Static drain-source on resistance
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Page 7
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STS9NH3LL Electrical characteristics
Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage
vs temperature
Figure 12. Source-drain diode forward
characteristics
Figure 11. Normalized on resistance vs
temperature
Figure 13. Normalized breakdown voltage vs
temperature
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Electrical characteristics STS9NH3LL
Figure 14. Normalized on resistance vs
temperature (V
GS
= 4.5V)
8/13
Page 9
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STS9NH3LL Test circuit

3 Test circuit

Figure 15. Switching times test circuit for
Figure 17. Test circuit for inductive load
resistive load
switching and diode recovery times

Figure 16. Gate charge test circuit

Figure 18. Unclamped inductive load test
circuit

Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform

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Package mechanical data STS9NH3LL

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
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STS9NH3LL Package mechanical data
SO-8 MECHANICAL DATA
DIM.
A 1.75 0.068
a1 0.1 0.25 0.003 0.009
a2 1.65 0.064
a3 0.65 0.85 0.025 0.033
b 0.35 0.48 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.019
c1 45 (typ.)
D 4.8 5.0 0.188 0.196
E 5.8 6.2 0.228 0.244
e
e3 3.81 0.150
F 3.8 4.0 0.14 0.157
L 0.4 1.27 0.015 0.050
M 0.6 0.023
S 8 (max.)
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
1.27
0.050
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Page 12
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Revision history STS9NH3LL

5 Revision history

Table 8. Document revision history

Date Revision Changes
24-Jul-2006 1 Initial release.
15-May-2007 2 Update on Ta b le 2 .
12-Dec-2007 3
– Inserted Figure 14: Normalized on resistance vs temperature (V
= 4.5V)
– Inserted new E
value on Table 2.
AS
GS
12/13
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STS9NH3LL
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