Datasheet sts8dn3llh5 Datasheet

Dual N-channel 30 V, 0.0155 Ω, 10 A, SO-8

Features

R

Type V

DSS

STS8DN3LLH5 30 V < 0.019 Ω 10 A

1. The value is rated according R

■ R

■ Extremely low on-resistance R

■

Very low switching gate charge

■ High avalanche ruggedness

■ Low gate drive power losses

* Qg industry benchmark

DS(on)

Application

DS(on)

max

thj-pcb

DS(on)

STS8DN3LLH5

STripFET™ V Power MOSFET

I

D

(1)

SO-8

■ Switching applications

Description

This STripFET™V Power MOSFET technology is
among the latest improvements, which have been
especially tailored to achieve very low on-state
resistance providing also one of the best-in-class
FOM.

Table 1. Device summary

Order code Marking Package Packaging

STS8DN3LLH5 8DN3LL SO-8 Tape and reel

Figure 1. Internal schematic diagram

January 2010 Doc ID 16967 Rev 1 1/12

www.st.com

12

Contents STS8DN3LLH5

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2/12 Doc ID 16967 Rev 1

STS8DN3LLH5 Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

P

V

V

I

I

D

I

DM

TOT

DS

GS

(1)

D

Drain-source voltage (VGS = 0) 30 V

Gate-source voltage ± 22 V

Drain current (continuous) at TC = 25 °C 10 A

(1)

Drain current (continuous) at TC=100 °C 9 A

(2)

Drain current (pulsed) 40 A

(2)

Total dissipation at TC = 25 °C 2.7 W

Derating factor 0.02 W/°C

T

T

stg

1. The value is rated according R

2. Pulse width limited by safe operating area

Operating junction temperature

J

Storage temperature

-55 to 150 °C

thj-pcb

Table 3. Thermal resistance

Symbol Parameter Value Unit

thj-pcb

(1)

Thermal resistance junction-ambient 47 °C/W

R

1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10sec

Doc ID 16967 Rev 1 3/12

Electrical characteristics STS8DN3LLH5

2 Electrical characteristics

(T

=25°C unless otherwise specified)

CASE

Table 4. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on)

Drain-source breakdown
voltage

Zero gate voltage drain
current (VGS = 0)

Gate body leakage current

= 0)

(V

DS

= 250 µA, VGS= 0 30 V

I

D

= max rating,

V

DS

=max rating @125 °C

V

DS

V

= ±22 V ±100 nA

GS

1

10

Gate threshold voltage VDS= VGS, ID = 250 µA 1 V

Static drain-source on
resistance

= 10 V, ID= 5 A

V

GS

= 4.5 V, ID= 5 A

V

GS

0.0155

0.020

0.019

0.022ΩΩ

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

C

C

C

Input capacitance

iss

Output capacitance

oss

Reverse transfer

rss

capacitance

V

= 25 V, f=1 MHz,

DS

=0

V

GS

724

-

132

21

µA
µA

pF
pF
pF

Q

Q

Q

Total gate charge

g

Gate-source charge

gs

Gate-drain charge

gd

VDD=15 V, ID = 10 A
VGS= 4.5 V

Figure 14

5.4

-

2

2.1

nC
nC
nC

f=1 MHz gate dc bias=0

R

Intrinsic gate resistance

G

test signal level = 20 mV

-3.3Ω

open drain

4/12 Doc ID 16967 Rev 1

STS8DN3LLH5 Electrical characteristics

Table 6. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

d(on)

t

d(off)

Turn-on delay time

t

Rise time

r

Turn-off delay time

t

Fall time

f

=15 V, ID= 5 A,

V

DD

=4.7 Ω, V

R

G

Figure 13

GS

=10 V

-

4

4.2

21.1

3.5

-

Table 7. Source drain diode

Symbol Parameter Test conditions Min Typ. Max Unit

I

SD

I

SDM

V

SD

t

Q

I

RRM

1. Pulse width limited by safe operating area

2. Pulsed: pulse duration=300µs, duty cycle 1.5%

Source-drain current - 10 A

(1)

Source-drain current (pulsed) - 40 A

(2)

Forward on voltage I

Reverse recovery time

rr

Reverse recovery charge

rr

Reverse recovery current

= 10 A, VGS=0 - 1.1 V

SD

= 10 A,

I

SD

di/dt = 100 A/µs,

= 25 V, Tj=150 °C

V

DD

20.8

-

10.5
1

ns
ns
ns
ns

ns

nC

A

Doc ID 16967 Rev 1 5/12

Electrical characteristics STS8DN3LLH5

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance

I

D

(A)

Tj=150°C
Tc=25°C

100

Operation in this area is

10

Limited by max R

DS(on)

Single
pulse

AM04963v1

1

100ms

1s

0.1

0.01

10ms

0.1

Figure 4. Output characteristics Figure 5. Transfer characteristics

I

D

1

(A)

10

VGS=10V

100

80

60

V

5V

DS

(V)

AM04954v1

I

(A)

100

80

60

D

VDS=4V

4V

40

20

40

20

3V

0

1

0

2

3

4

V

DS

(V)

0

2

0

4

8

6

10

V

GS

AM04955v1

(V)

Figure 6. Normalized B

BV

DSS

vs temperature Figure 7. Static drain-source on resistance

VDSS

AM04956v1

(norm)

I

D

=1mA

1.10

1.05

1.00

0.95

0.90

-50

0

50

100

150

T

J

(°C)

6/12 Doc ID 16967 Rev 1

R

DS(on)

(Ohm)

25

20

15

10

AM04957v1_a

ID=5A

GS

=10V

V

5

0

4

2

6

8

10

I

D

(A)

STS8DN3LLH5 Electrical characteristics

Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations

V

GS

(V)

12

VDD=15V

D

=11A

I

10

8

6

4

2

0

0

4

2

8

6

10

AM04958v1

Q

g

(nC)

(pF)

1000

800

600

400

200

C

T

J

=25°C

AM04959v1

f=1MHz

Ciss

Coss

Crss

0

0

10

20

V

DS

(V)

Figure 10. Normalized gate threshold voltage

V
(norm)

vs temperature

GS(th)

1.2

1.1

1.0

0.9

0.8

0.7

0.6

0.5

0.4

-50

AM04960v1

I

D

=250µA

T

J

0

50

100

150

(°C)

Figure 12. Source-drain diode forward

characteristics

V

SD

(V)

0.9

J

=-50°C

T

AM04961v1

Figure 11. Normalized on resistance vs

temperature

R

DS(on)

(norm)

1.8

1.6

1.4

1.2

1.0

0.8

0.6

-50

D

=5.5A

I

GS

=10V

V

0

50

100

150

AM04961v1

T

J

(°C)

0.8

J

T

=25°C

0.7

0.6

J

=175°C

T

0.5

0.4
0

2

6

4

8

10

I

SD

(A)

Doc ID 16967 Rev 1 7/12

Test circuits STS8DN3LLH5

3 Test circuits

Figure 13. Switching times test circuit for

PW

resistive load

VD

VGS

RG

RL

D.U.T.

2200

µF

3.3
µF

AM01468v1

V

DD

Figure 15. Test circuit for inductive load

G

25

Ω

switching and diode recovery times

A

D

D.U. T.

S

B

G

R

A

FAST
DIODE

B

A

L=100µH

B

D

G

S

3.3

µF

1000

µF

V

DD

Figure 14. Gate charge test circuit

V

i=20V=VGMAX

PW

2200
µF

1kΩ

12V

IG=CONST

2.7kΩ

47kΩ

47kΩ

100Ω

100nF

D.U.T.

AM01469v1

Figure 16. Unclamped inductive load test

circuit

L

VD

ID

Vi

D.U. T.

2200

µF

3.3
µF

1kΩ

VDD

V

VDD

G

Pw

AM01470v1

Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform

V(BR)DSS

VD

IDM

ID

VDD

VDD

AM01472v1

0

0

10%

tdon

ton

90%

tr

10%

V

GS

8/12 Doc ID 16967 Rev 1

VDS

90%

tdoff

AM01471v1

toff

tf

90%

10%

AM01473v1

STS8DN3LLH5 Package mechanical data

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.

Doc ID 16967 Rev 1 9/12

Package mechanical data STS8DN3LLH5

SO-8 MECHANICAL DATA

DIM.

MIN. TYP MAX. MIN. TYP. MAX.

mm. inch

A 1.75 0.068

a1 0.1 0.25 0.003 0.009

a2 1.65 0.064

a3 0.65 0.85 0.025 0.033

b 0.35 0.48 0.013 0.018

b1 0.19 0.25 0.007 0.010

C 0.25 0.5 0.010 0.019

c1 45 (typ.)

D 4.8 5.0 0.188 0.196

E 5.8 6.2 0.228 0.244

e

1.27

0.050

e3 3.81 0.150

F 3.8 4.0 0.14 0.157

L 0.4 1.27 0.015 0.050

M 0.6 0.023

S 8 (max.)

10/12 Doc ID 16967 Rev 1

STS8DN3LLH5 Revision history

5 Revision history

Table 8. Document revision history

Date Revision Changes

12-Jan-2010 1 First release

Doc ID 16967 Rev 1 11/12

STS8DN3LLH5

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12/12 Doc ID 16967 Rev 1