Datasheet sts5n15f4 Datasheet

STripFET™ DeepGATE™ Power MOSFET

Features

R

Type V

DSS

STS5N15F4 150 V < 0.063 Ω 5 A

■ N-channel enhancement mode

■ 100% avalanched rated

■ Low gate charge

■ Very low on-resistance

Application

■ Switching applications

Description

DS(on)

max

STS5N15F4

N-channel 150 V, 0.057Ω, 5 A, SO-8

I

D

SO-8

Figure 1. Internal schematic diagram

This STripFET™ DeepGATE™ Power MOSFET
technology is among the latest improvements,
which have been especially tailored to minimize
on-state resistance, with a new gate structure,
providing superior switching performances.

Table 1. Device summary

Order code Marking Package Packaging

STS5N15F4 5U15- SO-8 Tape and reel

August 2009 Doc ID 16083 Rev 2 1/11

www.st.com

11

Electrical ratings STS5N15F4

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

I

V

V

DM

P

T

DS

GS

I

D

I

D

TOT

stg

T

Drain-source voltage (VGS = 0) 150 V

Gate-source voltage ± 20 V

Drain current (continuous) at TC = 25 °C 5 A

Drain current (continuous) at TC=100 °C 3 A

(1)

Drain current (pulsed) 20 A

Total dissipation at TC = 25 °C 2.5 W

Storage temperature

-55 to 150 °C

Operating junction temperature

j

1. Pulse width limited by safe operating area

Table 3. Thermal data

Symbol Parameter Value Unit

(1)

R

thj-pcb

1. When mounted on FR-4 board of 1 inch², 2 oz Cu, t < 10 sec

Thermal resistance junction-pcb max 50 °C/W

Table 4. Avalanche characteristics

Symbol Parameter Max value Unit

I

AS

E

AS

Avalanche current, repetitive or not-repetitive
(pulse width limited by T

max)

j

Single pulse avalanche energy
(starting T

= 25 °C, ID = IAS, VDD = 140 V)

j

2/11 Doc ID 16083 Rev 2

5A

125 mJ

STS5N15F4 Electrical characteristics

2 Electrical characteristics

(TJ = 25 °C unless otherwise specified)

Table 5. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on)

Drain-source breakdown
voltage

Zero gate voltage drain
current (VGS = 0)

Gate body leakage current

= 0)

(V

DS

= 1 mA, VGS= 0 150 V

I

D

= 150 V,

V

DS

= 150 V, @125 °C

V

DS

V

= ±20 V ±100 nA

GS

1

10

Gate threshold voltage VDS= VGS, ID = 250 µA 2 4 V

Static drain-source on
resistance

V

= 10 V, ID= 2.5 A 0.057 0.063 Ω

GS

Table 6. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

C

C

C

Q
Q
Q

Input capacitance

iss

Output capacitance

oss

Reverse transfer

rss

capacitance

Total gate charge

g

Gate-source charge

gs

Gate-drain charge

gd

=25 V, f = 1 MHz,

V

DS

V

= 0

GS

= 75 V, ID = 5 A

V

DD

=10 V

V

GS

Figure 14 on page 7

f=1 MHz Gate DC Bias=0

R

Gate input resistance

g

Test signal level=20 mV
open drain

2710

-

180

-

69.5

48

-

10.8

-

13.7

-1.9- Ω

µA
µA

pF
pF
pF

nC
nC
nC

Doc ID 16083 Rev 2 3/11

Electrical characteristics STS5N15F4

Table 7. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

d(on)

t

d(off)

Turn-on delay time

t

Rise time

r

Turn-off delay time

t

Fall time

f

= 75 V, ID= 3 A,

V

DD

=4.7 Ω, VGS=10 V

R

G

Figure 13 on page 7

13.5

5.1

-

39.7

-

11.4

Table 8. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max Unit

I

I

SDM

V

SD

Q

I

RRM

1. Pulse width limited by safe operating area

2. Pulsed: pulse duration=300µs, duty cycle 1.5%

Source-drain current - 5 A

SD

(1)

Source-drain current (pulsed) - 20 A

(2)

Forward on voltage I

t

Reverse recovery time

rr

Reverse recovery charge

rr

Reverse recovery current

I

SD

SD

= 6 A, V

= 6 A,

= 0 - 1.3 V

GS

di/dt = 100 A/µs,

= 120 V, TJ = 150 °C

V

R

Figure 15 on page 7

85.2

-

277.6

8.2

ns
ns
ns
ns

ns

nC

A

4/11 Doc ID 16083 Rev 2

STS5N15F4 Electrical characteristics

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance

I

D

(A)

Tj=150°C

100

10

DS(on)

Operation in this area is

Limited by max R

Tc=25°C

Sinlge
pulse

1

0.1

AM04995v1

10ms

100ms

1s

0.01

0.1

Figure 4. Output characteristics Figure 5. Transfer characteristics

I

D

1

(A)

70

10

VGS=10V

100

DS

(V)

V

AM04986v1

ID

(A)

70

VDS=10V

60

50

6V

40

30

5V

20

10

0

0

Figure 6. Normalized B

BV

DSS

5

10

vs temperature Figure 7. Static drain-source on resistance

VDSS

15

4V

V

DS

(V)

AM04989v1

(norm)

R

60

50

40

30

20

10

0

DS(on)

(Ω)

0

4

2

8

6

140

1.10

1.05

I

D

= 1 mA

120

100

VGS=10V

80

1.00

60

10

AM04987v1

V

GS(V)

AM04988v1

0.95

0.90

-50

-25

20

25

0

50

75

100

125 150

T

J

(°C)

0

0

2

1

4

3

5

I

D

(A)

Doc ID 16083 Rev 2 5/11

40

Electrical characteristics STS5N15F4

Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations

V

GS

(V)

12

VDD=75V

D

=5A

I

10

AM04990v1

C

2500

2000

(pF)

AM04991v1

TJ=25°C

f=1MHz

Ciss

8

6

4

2

0

0

10

20

30

40

50

Q

g

(nC)

Figure 10. Normalized gate threshold voltage

V
(norm)

vs temperature

GS(th)

1.10

1.00

0.90

0.80

0.70

0.60

D

= 250 µA

I

AM04992v1

2000

1500

1000

Crss

500

0

0

20

40

60

80

100 120

140

Figure 11. Normalized on resistance vs

temperature

R

DS(on)

(norm)

2.5

2.0

1.5

1.0

0.5

V

GS

D

= 2.5 A

I

= 10 V

Coss

V

DS

(V)

AM04993v1

0.50

-50

-25

25

0

50

75

100

125

150

T

J

(°C)

Figure 12. Source-drain diode forward

6/11 Doc ID 16083 Rev 2

characteristics

V

SD

(V)

0.9

0.8

0.7

0.6

0.5

0.4
0

10

20

30

TJ=-55°C

TJ=25°C

T

40

J

=175°C

50

AM04994v1

I

SD

(A)

0

-50

-25

25

0

50

75

100

125 150

T

J

(°C)

STS5N15F4 Test circuits

3 Test circuits

Figure 13. Switching times test circuit for

PW

resistive load

VGS

VD

RG

RL

D.U.T.

2200

µF

3.3
µF

AM01468v1

V

DD

Figure 15. Test circuit for inductive load

G

25

Ω

switching and diode recovery times

A

D

D.U. T.

S

B

R

FAST
DIODE

G

A

A

L=100µH

B

B

D

G

S

3.3

µF

1000

µF

V

DD

Figure 14. Gate charge test circuit

V

i=20V=VGMAX

PW

2200
µF

1kΩ

12V

IG=CONST

2.7kΩ

47kΩ

47kΩ

100Ω

100nF

D.U.T.

AM01469v1

Figure 16. Unclamped inductive load test

circuit

L

VD

ID

Vi

D.U. T.

2200

µF

3.3
µF

1kΩ

VDD

V

VDD

G

Pw

AM01470v1

Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform

V(BR)DSS

VD

IDM

ID

VDD

VDD

AM01472v1

0

0

10%

tdon

ton

90%

tr

10%

V

GS

Doc ID 16083 Rev 2 7/11

VDS

tdoff

90%

AM01471v1

toff

tf

90%

10%

AM01473v1

Package mechanical data STS5N15F4

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.

8/11 Doc ID 16083 Rev 2

STS5N15F4 Package mechanical data

DIM.

mm. inch

MIN. TYP MAX. MIN. TYP. MAX.

A 1.75 0.068

a1 0.1 0.25 0.003 0.009

a2 1.65 0.064

a3 0.65 0.85 0.025 0.033

b 0.35 0.48 0.013 0.018

b1 0.19 0.25 0.007 0.010

C 0.25 0.5 0.010 0.019

c1 45 (typ.)

D 4.8 5.0 0.188 0.196

E 5.8 6.2 0.228 0.244

e

1.27

0.050

e3 3.81 0.150

F 3.8 4.0 0.14 0.157

L 0.4 1.27 0.015 0.050

M 0.6 0.023

S 8 (max.)

SO-8 MECHANICAL DATA

Doc ID 16083 Rev 2 9/11

Revision history STS5N15F4

5 Revision history

Table 9. Document revision history

Date Revision Changes

23-Jul-2009 1 First release

03-Aug-2009 2 Updated figures 6, 7, 10 and 11

10/11 Doc ID 16083 Rev 2

STS5N15F4

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Doc ID 16083 Rev 2 11/11