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Features
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Typ e V
STS4DNF60 60V <0.090Ω 4A
■ Standard outline for easy automated surface
mount assembly
■ Low threshold drive
DSS
R
DS(on)
I
D
Description
This Power MOSFET is the latest development of
STMicroelectronics unique “single feature size”
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance, rugged avalanche characteristics and
less critical alignment steps therefore a
remarkable manufacturing reproducibility.
STS4DNF60
N-channel 60V - 0.070Ω - 4A - SO-8
STripFET™ Power MOSFET
SO-8
Figure 1. Internal schematic diagram
Application
■ Switching applications
Table 1. Device summary
Order code Marking Package Packaging
STS4DNF60 4DF60 SO-8 Tape & reel
August 2007 Rev 2 1/12
www.st.com
12
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Contents STS4DNF60
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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STS4DNF60 Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
V
I
DM
P
TOT
T
1. Pulse width limited by safe operating area
2. P
Drain-source voltage (VGS = 0) 60 V
DS
Gate- source voltage ± 20 V
GS
Drain current (continuous) at TC = 25°C 4 A
I
D
I
Drain current (continuous) at TC = 100°C 2.5 A
D
(1)
Drain current (pulsed) 16 A
(2)
Total dissipation at TC = 25°C 2 W
T
Operating junction temperature
j
Storage temperature
stg
=1.6W for single operation
TOT
-55 to 150 °C
Table 3. Thermal data
Symbol Parameter Value Unit
Rthj-pcb Thermal resistance junction-pcb D.O.
1. When mounted on inch² FR-4 board, 2 Oz Cu, t < 10sec, dual operation
(1)
62.5 °C/W
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Electrical characteristics STS4DNF60
2 Electrical characteristics
(Tcase =25°C unless otherwise specified)
Table 4. On /off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source
breakdown voltage
Zero gate voltage
drain current (V
GS
Gate-body leakage
current (V
DS
= 0)
= 0)
= 250µA, VGS = 0 60 V
I
D
V
= Max rating
DS
= Max rating, TC=125°C
V
DS
1
10µAµA
VGS = ± 20V ± 100 nA
Gate threshold voltage VDS = VGS, ID = 250µA 2 4 V
Static drain-source on
resistance
V
= 10V, ID = 2A 0.070 0.090 Ω
GS
Table 5. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
g
C
C
C
Q
Q
Q
Forward
fs
transconductance
Input capacitance
iss
Output capacitance
oss
Reverse transfer
rss
capacitance
Total gate charge
g
Gate-source charge
gs
Gate-drain charge
gd
=25V, ID= 2A 25 S
V
DS
315
= 25 V, f = 1 MHz, VGS = 0
V
DS
70
30
= 48V, ID = 4A,
V
DD
= 10V
V
GS
(see Figure 13)
10
3.5
3.5
pF
pF
pF
nC
nC
nC
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STS4DNF60 Electrical characteristics
Table 6. Switching times
Symbol Parameter Test conditions Min. Typ. Max Unit
t
d(on)
t
t
d(off)
t
Turn-on delay time
Rise time
r
Turn-off delay time
Fall ti me
f
VDD = 30V, ID = 2A,
= 4.7Ω, V
R
G
GS
= 10V
(see Figure 12)
VDD = 30V, ID = 2A,
RG = 4.7Ω, V
GS
= 10V
(see Figure 12)
7
18
17
6
Table 7. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
I
SDM
VSD
Q
I
RRM
Q
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Source-drain current
SD
(1)
Source-drain current (pulsed)
(2)
Forward on voltage ISD = 4A, VGS = 0 1.2 V
Reverse recovery time
t
rr
Reverse recovery charge
rr
Reverse recovery current
t
Reverse recovery time
rr
Reverse recovery charge
rr
Reverse recovery current
ISD = 4A, di/dt = 100A/µs
V
DD
(see Figure 17)
ISD = 4A, di/dt = 100A/µs
VDD = 20V, Tj = 150°C
(see Figure 17)
= 20V, Tj = 25°C
45
68
50
88
3.5
4
16AA
3
ns
ns
ns
ns
ns
nC
A
ns
nC
A
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Electrical characteristics STS4DNF60
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Source-drain diode forward
characteristics
Figure 7. Static drain-source on resistance
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STS4DNF60 Electrical characteristics
Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage
vs temperature
Figure 11. Normalized on resistance vs
temperature
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Test circuits STS4DNF60
3 Test circuits
Figure 12. Switching times test circuit for
Figure 14. Test circuit for inductive load
resistive load
switching and diode recovery times
Figure 13. Gate charge test circuit
Figure 15. Unclamped Inductive load test
circuit
Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform
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STS4DNF60 Package mechanical data
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
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Package mechanical data STS4DNF60
SO-8 MECHANICAL DATA
DIM.
A 1.75 0.068
a1 0.1 0.25 0.003 0.009
a2 1.65 0.064
a3 0.65 0.85 0.025 0.033
b 0.35 0.48 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.019
c1 45 (typ.)
D 4.8 5.0 0.188 0.196
E 5.8 6.2 0.228 0.244
e
e3 3.81 0.150
F 3.8 4.0 0.14 0.157
L 0.4 1.27 0.015 0.050
M 0.6 0.023
S 8 (max.)
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
1.27
0.050
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STS4DNF60 Revision history
5 Revision history
Table 8. Revision history
Date Revision Changes
17-May-2007 1 First release
02-Aug-2007 2 Marking has been updated
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STS4DNF60
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