Page 1
General features
STS15N4LLF3
N-channel 40V - 0.0042Ω - 15A - SO-8
STripFET™ Power MOSFET
Typ e V
STS15N4LLF3 40V <0.005Ω 15A
■ Optimal R
■ Conduction losses reduced
■ Switching losses reduced
DS(on)
DSS
x Qg trade-off @ 4.5V
R
DS(on)
I
D
Description
This N-channel enhancement mode Power
MOSFET is the latest refinement of
STMicroelectronic unique “Single Feature Size™“
strip-based process with less critical aligment
steps and therefore a remarkable manufacturing
reproducibility. The resulting transistor shows
extremely high packing density for low onresistance, rugged avalanche characteristics and
low gate charge.
Applications
■ Switching application
SO-8
Internal schematic diagram
Order codes
Part number Marking Package Packaging
STS15N4LLF3 15N4LL- SO-8 Tape & reel
November 2006 Rev 2 1/12
www.st.com
12
Page 2
Contents STS15N4LLF3
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12
Page 3
STS15N4LLF3 Electrical ratings
1 Electrical ratings
Table 1. Absolute maximim ratings
Symbol Parameter Value Unit
V
V
V
GS
I
I
I
DM
P
TOT
E
AS
1. Guaranteed for test time < 15ms
2. Pulse width limited by Tjmax
3. Starting Tj =25°C, ID =7.5A, VDD =25V
Drain-source voltage (VGS = 0) 40 V
DS
Gate-source voltage ± 16 V
GS
(1)
Gate- source voltage ±18 V
Drain current (continuous) at TC = 25°C 15 A
D
Drain current (continuous) at TC = 100°C 9.3 A
D
(2)
Drain current (pulsed) 60 A
Total dissipation at TC = 25°C 2.7 W
(3)
Single pulse avalanche energy 2 J
Table 2. Thermal resistance
Symbol Parameter Value Unit
(1)
R
-pcb
thj
T
T
stg
1. When mounted of FR-4 board with 1 inch
Thermal resistance junction-pcb max 47 °C/W
Maximum lead temperature for soldering -55 to 150 °C
l
Storage temperature -55 to 150 °C
2
pad, 2oz of Cu and t< 10sec
3/12
Page 4
Electrical characteristics STS15N4LLF3
2 Electrical characteristics
(TJ = 25 °C unless otherwise specified)
Table 3. On/off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source breakdown
voltage
Zero gate voltage drain
current (V
GS
= 0)
Gate body leakage
Current (VDS = 0)
Gate threshold voltage VDS= VGS, ID = 250µA 1 V
Static drain-source on
resistance
I
= 250µA, VGS= 0 40 V
D
= max rating,
V
DS
V
=max rating @125°C
DS
= ±16V ±200 nA
V
GS
= 10V, ID= 7.5A
V
GS
= 4.5V, ID= 7.5A
V
GS
0.0042
0.005
10
100µAµA
0.005
0.007ΩΩ
Table 4. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
C
iss
C
oss
C
rss
Q
Q
Q
Input capacitance
Output capacitance
Reverse transfer
capacitance
Total gate charge
g
Gate-source charge
gs
Gate-drain charge
gd
= 25V, f=1 MHz,
V
DS
= 0
V
GS
V
= 20V, ID = 15A
DD
= 4.5V
V
GS
(see Figure 13)
f=1 MHz Gate DC Bias = 0
R
Gate input resistance
G
Test signal level = 20mV
open drain
2530
574
29
21.5
28 nC
6.9
8.2
135Ω
pF
pF
pF
nC
nC
Table 5. Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
t
t
Turn-on delay time
Rise time
r
Turn-off delay time
Fall time
f
4/12
V
R
(see Figure 15)
V
R
(see Figure 15)
= 20V, ID = 7.5A,
DD
= 4.7Ω, VGS = 10V
G
= 20V, ID = 7.5A,
DD
= 4.7Ω, VGS = 10V
G
17
25
62
ns
ns
ns
9
ns
Page 5
STS15N4LLF3 Electrical characteristics
Table 6. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
rr
Q
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300µs, duty cycle 1.5%
Source-drain current
(1)
Source-drain current (pulsed)
(2)
Forward on voltage I
Reverse recovery time
Reverse recovery charge
rr
Reverse recovery current
I
SD
SD
= 15A, V
= 15A, V
= 0 1.2 V
GS
= 30V,
DD
di/dt = 100A/µs,
Tj = 150°C (see Figure 14)
43
64
15
60
A
A
ns
nC
3
A
5/12
Page 6
Electrical characteristics STS15N4LLF3
2.1 Electrical characteristics (curves)
Figure 1. Safe operating area Figure 2. Thermal impedance
Figure 3. Output characterisics Figure 4. Transfer characteristics
Figure 5. Normalized B
vs temperature Figure 6. Static drain-source on resistance
VDSS
6/12
Page 7
STS15N4LLF3 Electrical characteristics
Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage
vs temperature
Figure 11. Source-drain diode forward
characteristics
Figure 10. Normalized on resistance vs
temperature
7/12
Page 8
Test circuit STS15N4LLF3
3 Test circuit
Figure 12. Switching times test circuit for
resistive load
Figure 14. Test circuit for inductive load
switching and diode recovery times
Figure 13. Gate charge test circuit
Figure 15. Unclamped Inductive load test
circuit
Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform
8/12
Page 9
STS15N4LLF3 Package mechanical data
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: twww.st.com
9/12
Page 10
Package mechanical data STS15N4LLF3
SO-8 MECHANICAL DATA
DIM.
A 1.75 0.068
a1 0.1 0.25 0.003 0.009
a2 1.65 0.064
a3 0.65 0.85 0.025 0.033
b 0.35 0.48 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.019
c1 45 (typ.)
D 4.8 5.0 0.188 0.196
E 5.8 6.2 0.228 0.244
e
e3 3.81 0.150
F 3.8 4.0 0.14 0.157
L 0.4 1.27 0.015 0.050
M 0.6 0.023
S 8 (max.)
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
1.27
0.050
10/12
Page 11
STS15N4LLF3 Revision history
5 Revision history
Table 7. Revision history
Date Revision Changes
09-Jun-2006 1 First release
22-Nov-2006 2 Corrected part number
11/12
Page 12
STS15N4LLF3
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