This STPIC6C595 is a monolithic, mediumvoltage, low current power 8-bit shift register
designed for use in systems that require relatively
moderate load power such as LEDs. The device
contains a built-in voltage clamp on the outputs
for inductive transient protection. Power driver
applications include relays, solenoids, and other
low-current or medium-voltage loads.
The device contains an 8-bit serial-in, parallel-out
shift register that feeds an 8-bit D-type storage
register. Data transfers through both the shift and
storage register clock (SRCK) and the register
clock (RCK
data out the serial output (SER OUT) port on the
rising edge of SRCK. The storage register
transfers data to the output buffer when shift
register clear (CLR) is high. When CLR
input shift register is cleared. When output enable
(G
) is held high, all data in the output buffer is
held low and all drain output are off. When G is
held low, data from the storage register is
transparent to the output buffer.
), respectively. The device transfers
is low, the
SO-16TSSOP16
When data in the output buffers is low, the DMOS
transistor outputs are off. When data is high, the
DMOS transistor outputs have sink-current
capability. The SER OUT allows for cascading of
the data from the shift register to additional
devices.
Output are low-side, open-drain DMOS
transistors with output ratings of 33 V and 100 mA
continuous sink-current capability. Each output
provides a 250 mA maximum current limit at
T
= 25 °C. The current limit decreases as the
C
junction temperature increases for additional
device protection. The device also provides up to
1.5 kV of ESD protection when tested using the
human-body model and 150 V machine model.
The STPIC6C595 is characterized for operation
over the operating case temperature range of
-40 °C to 125 °C.
Table 1. Device summary
Order codesPackagePackaging
STPIC6C595MTRSO-16 (Tape and reel)2500 parts per reel
STPIC6C595TTRTSSOP16 (Tape and reel)2500 parts per reel
Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
2.1 Absolute maximum ratings
Table 2. Absolute maximum ratings
SymbolParameterValueUnit
V
V
I
I
Logic supply voltage (See Note 1)7V
CC
V
Logic input voltage range-0.3 to 7V
I
Power DMOS drain to source voltage (See Note 2)33V
DS
Continuous source to drain diode anode current 250mA
DS
Pulsed source to drain diode anode current
DS
(See Note 3)
Pulsed drain current, each output, all output ON
I
D
I
D
I
D
= 25 °C)
(T
C
Continuous current, each output, all output ON
= 25 °C)
(T
C
Peak drain current single output
(TC = 25 °C) (See Note 3)
500mA
250mA
100mA
250mA
E
I
T
Single pulse avalanche energy
AS
(See Figure 11 and Figure 12)
Avalanche current (See Note 4 and Figure 17)200mA
AS
P
Continuous total dissipation (TC ≤ 25 °C)
d
P
Continuous total dissipation (TC = 125 °C)
d
T
Operating virtual junction temperature range-40 to +150°C
J
T
Operating case temperature range-40 to +125°C
C
Storage temperature range-65 to +150°C
stg
Lead temperature 1.6 mm (1/16 inch) from case for 10
T
L
seconds
4/22
30mJ
1087mW
217mW
260°C
Page 5
STPIC6C595Maximum rating
2.2 Thermal data
Table 3. Thermal data
SymbolParameterValueUnit
R
th(JA)
Thermal resistance junction-ambient115°C/W
2.3 Recommended operating conditions
Table 4. Recommended operating conditions
SymbolParameterMinTypMaxUnit
V
CC
V
V
I
DP
t
su
t
hL
Logic supply voltage4.55.5V
High level input voltage
IH
Low level input voltage0
IL
0.85V
CC
Pulse drain output current
(TC = 25 °C, V
= 5 V, all outputs ON)
CC
(see Note 3, Note 5 and Figure 15)
Set-up time, SER IN high before SRCK ↑
(see Figure 4 and Figure 8)
Hold time, SER IN high before G ↑
(see Figure 4, Figure 7, Figure 8)
1.63.05.7ns
2.84.09.6ns
V
CC
0.15V
CC
250mA
V
V
t
W
T
Pulse duration (see Figure 8)40ns
Operating case temperature-40125°C
C
5/22
Page 6
Electrical characteristicsSTPIC6C595
3 Electrical characteristics
3.1 DC characteristics
Table 5. DC characteristics (V
SymbolParameterTest conditionsMinTypMaxUnit
V
(BR)DSX
V
V
V
I
I
I
CC
I
CC(FRQ)
I
I
DSX
R
DS(on)
Drain-to-source
breakdown voltage
Source-to-drain diode
SD
forward voltage
High level output
OH
voltage SER OUT
Low level output
OL
voltage SER OUT
High level input current
IH
Low level input current
IL
Logic supply current
Logic supply current at
frequency
Nominal current
N
Off-state drain current
Static drain source on
state resistance
(See Note 5, Note 6
and Figure 14,
Figure 16)
= 5 V, TC = 25 °C, unless otherwise specified.)
CC
ID = 1 mA
IF = 100 mA
= -20 μA, VCC = 4.5 V
I
OH
I
= -4 mA, VCC = 4.5 V
OH
IOH = 20 μA, VCC = 4.5 V
I
= 4 mA, VCC = 4.5 V
OH
= 5.5 V, VI = V
V
CC
= 5.5 V, VI = 0
V
CC
CC
VCC = 5.5 V, all outputs OFF or
ON
= 5 MHz, CL = 30 pF
f
SRCK
All outputs OFF
(See Figure 6, Figure 18 and
3337V
0.851.2V
4.44.49V
44.2V
0.0050.1V
0.30.5V
20200μA
0.22mA
Figure 19)
V
= 0.5 VIN = I
DS(on)
TC = 85 °C
D
90mA
(See Note 5, Note 6, Note 7)
= 30 V, VCC = 5.5 V
V
DS
V
= 30 V, VCC =5.5 V or 0 V
DS
= 125 °C
T
C
= 50 mA, VCC = 4.5 V
I
D
I
= 50 mA, VCC = 4.5 V
D
= 125 °C
T
C
I
= 100 mA, VCC = 4.5 V
D
0.35μA
0.68μA
4.56Ω
6.59Ω
4.56Ω
1μA
-1μA
6/22
Page 7
STPIC6C595Electrical characteristics
3.2 Switching characteristics
Table 6. Switching characteristics (V
SymbolParameterTest conditionsMinTypMaxUnit
Propagation delay
t
time, high to low level
PHL
output from G
= 5 V, TC = 25 °C, unless otherwise specified.)
CC
80ns
t
PLH
t
Propagation delay
time, low to high level
output from G
t
Rise time, drain output60ns
r
t
Fall time, drain output50ns
f
propagation delay time20ns
pd
Reverse recovery
t
a
current rise time
t
Reverse recovery time115ns
rr
CL = 30 pF, ID = 75 mA
(See Figure 4, Figure 5,
Figure 6, Figure 7, Figure 20)
= 100 mA, di/dt = 10 A/μs
I
F
(See Figure 5, Figure 6, and
Figure 9, Figure 10 )
Note:1All voltage value are with respect to GND
2Each power DMOS source is internally connected to GND
3Pulse duration
≤
100 μsand duty cycle≤ 2 %
4Drain supply voltage = 15 V, starting junction temperature (T
I
= 200 mA (see Fig. 11 and 12)
AS
5Technique should limit T
- TC to 10 °C maximum
J
6These parameters are measured with voltage sensing contacts separate from the current-
carrying contacts.
7Nominal current is defined for a consistent comparison between devices from different
sources. It is the current that produces a voltage drop of 0.5 V at T
130ns
39ns
) = 25 °C. L = 1.5 H and
JS
= 85 °C.
C
7/22
Page 8
Logic diagramSTPIC6C595
4 Logic diagram
Figure 3.Logic diagram
8/22
Page 9
STPIC6C595Typical operating circuit
5 Typical operating circuit
Figure 4.Typical operation mode test circuits
Figure 5.Typical operation mode waveforms
Note:1A) The word generator has the following characteristics: t
pulse repetition rate (PRR) = 5 kHz, Z
2B) CL includes probe and jig capacitance.
= 50
O
Ω
9/22
≤ 10 ns, tf ≤ 10 ns, tW = 300 ns,
r
Page 10
Typical operating circuitSTPIC6C595
Figure 6.Typical operation mode test circuits
Figure 7.Switching time waveform
Figure 8.Input setup and hold waveform
Note:1A) The word generator has the following characteristics: t
pulse repetition rate (PRR) = 5 kHz, Z
= 50
O
Ω
2B) CL includes probe and jig capacitance.
10/22
≤ 10 ns, tf ≤ 10 ns, tW = 300 ns,
r
Page 11
STPIC6C595Typical operating circuit
Figure 9.Reverse recovery current test circuits
Figure 10. Source drain diode waveform
Note:1A) The V
used to set I
2B) The drain terminal under test is connected to the TPK test point. All other terminals are
connected together and connected to the TPA test point.
3C) I
= maximum recovery current.
RM
amplitude and RG are adjusted for di/dt = 10 A/μs. A VGG double-pulse train is
GG
= 0.1 A. where t1 = 10 μs, t2 = 7 μs and t3 = 3 μs
F
11/22
Page 12
Typical operating circuitSTPIC6C595
Figure 11. Single pulse avalanche energy test circuits
Figure 12. Single pulse avalanche energy waveform
Note:1A) The word generator has the following characteristics: t
2B) Input pulse duration, tW is increased until peak current IAS = 200 mA. Energy test level is
defined as E
12/22
= (IAS x V
AS
(BR)DSX
x tAV)/2 = 30 mJ.
≤ 10 ns, tf ≤ 10 ns, ZO = 50
r
Ω
Page 13
STPIC6C595Typical performance and characteristics
6 Typical performance and characteristics
(unless otherwise specified TJ = 25 °C)
Figure 13. Max continuous drain current
vs number of outputs
conducting simultaneously
Figure 15. Maximum peak drain current
vs number of outputs
conducting simultaneously
Figure 14. Static drain-source on-state
resistance vs drain current
Figure 16. Static drain-source on-state
resistance vs logic supply
voltage
13/22
Page 14
Typical performance and characteristicsSTPIC6C595
Figure 17. Peak avalanche current vs
time duration of avalanche
Figure 19. Supply current vs
supply voltage
Figure 18. Supply current vs frequency
Figure 20. Switching time vs
case temperature
14/22
Page 15
STPIC6C595Typical performance and characteristics
Figure 21. Normalized junction to
ambient thermal resistance
15/22
Page 16
Package mechanical dataSTPIC6C595
7 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
21-May-20084Update: tsu and ThL values in Ta bl e 4 , ESD value on cover page
16-Mar-20095Updated Table 5 on page 6
21/22
Page 22
STPIC6C595
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