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STB85NF55L
STP85NF55L
N-CHANNEL 55V - 0.0060 Ω - 80A D2PAK/TO-220
STripFET™ II POWER MOSFET
TYPE
STP85NF55L
STB85NF55L
■ TYPICAL R
■ LOW THRESHOLD DRIVE
■ LOGIC LEVEL DEVICE
V
DSS
55 V
55 V
(on) = 0.0060 Ω
DS
R
DS(on)
<0.008
<0.008
I
D
80 A
Ω
80 A
Ω
DESCRIPTION
This Power MOSFET is the latest dev elo pment of
STMicroelectronis unique "Single Feature Size™"
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance, rugged avalanche characteristics and
less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
■ SOLENOID AND RELAY DRIVERS
■ MOTOR CONTROL, AUDIO AMPLIFIERS
■ DC-DC CONVERTERS
■ AUTOMOTIVE ENVIRONMENT
Ordering Information
STP85NF55L
STB85NF55L
STB85NF55LT4
SALES TYPE MARKING PACKAGE PACKAGING
P85NF55L
B85NF55L
B85NF55L
3
1
D2PAK
TO-263
(Suffix “T4”)
TO-220
2
1
ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL
INTERNAL SCHEMATIC DIAGRAM
TO-220
2
D
PAK
2
D
PAK
TUBE
TUBE
T APE & REEL
3
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
(
I
•)
D
I
D
(
I
DM
P
tot
dv/dt
E
AS
T
stg
T
j
(
Current Limited by Package.
•)
(
Pulse wi dth limited by safe operating area.
••)
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
55 V
55 V
Gate- source Voltage ± 15 V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
••)
Drain Current (pulsed) 320 A
Total Dissipation at TC = 25°C
80 A
80 A
300 W
Derating Factor 2.0 W/°C
(1)
Peak Diode Recovery voltage slope 10 V/ns
(2)
Single Pulse Avalanche Energy 980 mJ
Storage Temperature
Max. Operating Junction Temperature
1) I
≤80A, di/dt ≤300A/µs, VDD ≤ V
SD
(2) Starting Tj = 25 oC, ID = 40A, VDD = 30V
-55 to 175 °C
(BR)DSS
, Tj ≤ T
JMAX
1/10September 2002
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STB85NF55L STP85NF55L
THERMA L D ATA
Rthj-case
Rthj-amb
T
l
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Maximum Lead Temperature For Soldering Purpose
Max
Max
0.5
62.5
300
°C/W
°C/W
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C unless otherwise specified)
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
= 250 µA, VGS = 0
V
(BR)DSS
Drain-source
I
D
55 V
Breakdown Voltage
= Max Rating
V
DS
= Max Rating TC = 125°C
V
DS
= ± 15 V
V
GS
1
10
±100 nA
ON
(*)
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
Resistance
= V
DS
GS
= 10 V ID = 40 A
V
GS
= 5 V ID = 40 A
V
GS
ID = 250 µA
1 1.6 2.5 V
0.0060
0.008
0.008
0.01
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(*)
g
fs
C
iss
C
oss
C
rss
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
= 15V I
DS
= 25V f = 1 MHz VGS = 0
V
DS
D
= 40 A
130 S
4050
860
300
µA
µA
Ω
Ω
pF
pF
pF
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STB85NF55L STP85NF55L
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
= 27.5 V ID = 40 A
t
d(on)
Q
Q
Q
t
r
g
gs
gd
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
t
f
Turn-off Delay Time
Fall Time
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulsed: P ul se duration = 300 µs, duty cycle 1.5 %.
(
•)Pulse width limited by s afe operating area.
Source-drain Current
(•)
Source-drain Current (pulsed)
(*)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
V
DD
= 4.7
R
Ω
G
VGS = 5 V
(Resistive Load, Figure 3)
=27.5V ID=80A VGS=5V
V
DD
(see test circuit, Figure 4)
= 27.5 V ID = 40 A
V
DD
= 4.7Ω, V
R
G
GS
= 5 V
(Resistive Load, Figure 3)
I
= 80 A VGS = 0
SD
I
= 80 A di/dt = 100A/µs
SD
= 20 V Tj = 150°C
V
DD
(see test circuit, Figure 5)
35
165
80
20
45
70
55
80
240
6
110 nC
80
320
1.5 V
ns
ns
nC
nC
ns
ns
A
A
ns
nC
A
Safe Operating Area
Thermal Impedance
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STB85NF55L STP85NF55L
Transfer CharacteristicsOutput Characteristics
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
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STB85NF55L STP85NF55L
Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature
Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature.
. .
. .
5/10
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STB85NF55L STP85NF55L
Fig. 1: Unclamped Inductive Load Test CircuitFig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
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D2PAK MECHANICAL DATA
STB85NF55L STP85NF55L
DIM.
A 4.4 4.6 0.173 0.181
A1 2.49 2.69 0.098
A2 0.03 0.23 0.001 0.009
B 0.7 0.93 0.028 0.037
B2 1.14 1.7 0.045 0.067
C 0.45 0.6 0.018 0.024
C2 1.21 1.36 0.048 0.054
D 8.95 9.35 0.352 0.368
D1 7.6 8 8.4 0.299 0.315 0.330
E 10 10.4 0.394 0.409
E1 8.1 8.5 8.9 0.318 0.334 0.350
G 4.88 5.28 0.192 0.208
L 15 15.85 0.591 0.624
L2 1.27 1.4 0.050 0.055
L3 1.4 1.75 0.055 0.069
M 2.4 3.2 0.094 0.126
R 0.3 0.4 0.5 0.012 0.016 0.019
V2 0° 8° 0° 8°
MIN. TYP. MAX. MIN. TYP. TYP.
mm. inch.
0.106
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STB85NF55L STP85NF55L
TO-220 MECHANICAL DATA
DIM.
A 4.4 4.6 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.40 2.70 0.094 0.106
H2 10 10.40 0.393 0.409
L2 16.10 16.40 16.73 0.633 0.645 0.658
L4 13 14 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.20 6.60 0.244 0.260
L9 3.50 3.93 0.137 0.154
DIA 3.75 3.85 0.147 0.151
MIN. TYP. MAX. MIN. TYP. TYP.
mm. inch.
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STB85NF55L STP85NF55L
D2PAK FOOTPRINT
TAPE AND REEL SHIPMENT (suffix ”T4”)*
TUBE SHIPMENT (no suffix)*
REEL MECHANICAL DATA
DIM.
A 330 12.992
B 1.5 0.059
C 12.8 13.2 0.504 0.520
D 20.2 0.795
G 24.4 26.4 0.960 1.039
N 100 3.937
T 30.4 1.197
mm inch
MIN. MAX. MIN. MAX.
TAPE MECHANICAL DATA
DIM.
A0 10.5 10.7 0.413 0.421
B0 15.7 15.9 0.618 0.626
D 1.5 1.6 0.059 0.063
D1 1.59 1.61 0.062 0.063
E 1.65 1.85 0.065 0.073
F 11.4 11.6 0.449 0.456
K0 4.8 5.0 0.189 0.197
P0 3.9 4.1 0.153 0.161
P1 11.9 12.1 0.468 0.476
P2 1.9 2.1 0075 0.082
R50 1.574
T0.25 0.35 .0.0098 0.0137
W 23.7 24.3 0.933 0.956
mm inch
MIN. MAX. MIN. MAX.
* on sales type
BASE QTY BULK QTY
1000 1000
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STB85NF55L STP85NF55L
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise under any patent or patent r i ght s of STMi croelectr oni cs. Spec i fications mentione d i n this publicatio n are subj ect
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics product s are not
authorized for use as cri tical comp onents in lif e support devi ces or systems without express written approva l of STMicroe l ectronics.
The ST logo is registered trademark of STMicroelectronics
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All other na m es are the property of their respective owners.
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