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STP80NF10
STP80NF10FP
N-CHANNEL 100V - 0.012Ω - 80A TO-220/TO-220FP
LOW GATE CHARGE STripFET™II POWER MOSFET
(1) ISD ≤80A, di/dt ≤300A/µs, VDD ≤ V
(BR)DSS
, Tj ≤ T
JMAX.
(2) Starting Tj = 25°C, ID = 80A, VDD = 50V
■ TYPICAL R
DS
(on) = 0.012Ω
■ EXCEPTIONA L dv/d t CAPABILITY
■ 100% AVALANCHE TESTED
■ APPLICATION ORIENTED
CHARACTERIZATION
DESCRIPTION
This Power MOSFET series realized with STM icroelectronics unique STripFET process has specifically been designed to minimize input capacitance and
gate charge. It is therefore suitable as primary
switch in advanced high-efficiency isolated D C-DC
converters for T el ecom and Computer application. It
is also intended for any application with low gate
charge drive requirements.
APPLICATIONS
■ HIGH-EFFICIENCY DC-DC CONVERTERS
■ UPS AND MOTOR CONTROL
ABSOLUTE MAXIMUM RATINGS
(●) Pulse width limited by safe operating area
(*) Limited by Package
TYPE V
DSS
R
DS(on)
I
D
STP80NF10
STP80NF10FP
100 V
100 V
< 0.015 Ω
< 0.015 Ω
80 A
38 A
Symbol Parameter Value Unit
STP80NF10 STP80NF10FP
V
DS
Drain-source Voltage (VGS = 0)
100 V
V
DGR
Drain-gate Voltage (RGS = 20 kΩ)
100 V
V
GS
Gate- source Voltage ±20 V
I
D
(*) Drain Current (continuous) at TC = 25°C
80 38 A
I
D
Drain Current (continuous) at TC = 100°C
66 27 A
I
DM
(l)
Drain Current (pulsed) 320 152 A
P
TOT
Total Dissipation at TC = 25°C
300 45 W
Derating Factor 2 0.3 W/°C
dv/dt (1) Peak Diode Recovery voltage slope 9 V/ns
E
AS
(2)
Single Pulse Avalanche Energy 360 mJ
V
ISO
Insulation Withstand Voltage (DC) - 2500 V
T
stg
Storage Temperature
– 55 to 175 °C
T
j
Max. Operating Junction Temperature
TO-220
1
2
3
1
2
3
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
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STP80NF10/STP80NF10FP
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THERMA L D ATA
ELECTRICAL CHARACTERISTICS (T
CASE
= 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
ON
(1)
DYNAMIC
TO-220 TO-220FP
Rthj-case Thermal Resistance Junction-case Max 0.5 3.33 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
T
l
Maximum Lead Temperature For Soldering Purpose 300 °C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0 100 V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
1µA
V
DS
= Max Rating, TC = 125 °C
10 µA
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= ±20V ±100 nA
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
Gate Threshold Voltage
V
DS
= VGS, ID = 250µA
234V
R
DS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 40 A
0.012 0.015 Ω
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
fs
(1) Forward Transconductance VDS =25V , ID=40 A 80 S
C
iss
Input Capacitance
V
DS
= 25V, f = 1 MHz, VGS = 0
4300 pF
C
oss
Output Capacitance 600 pF
C
rss
Reverse Transfer
Capacitance
230 pF
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STP80NF10/STP80NF10FP
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pul se duration = 300 µs, duty cy cle 1.5 %.
2. Pulse width l i m i t ed by safe ope rating area.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Turn-on Delay Time
V
DD
= 50V, ID = 40A
R
G
= 4.7Ω VGS = 10V
(see test circuit, Figure 3)
40 ns
t
r
Rise Time 145 ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 80V, ID = 80A,
VGS = 10V
140
23
51
189
nC
nC
nC
Symbol Param eter Test Conditions Mi n. Typ. Max. Unit
t
d(off)
t
f
Turn-off-Delay Time
Fall Time
VDD = 50V, ID = 40A,
RG= 4.7Ω, V
GS
= 10V
(see test circuit, Figure 3)
134
115
ns
ns
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
Source-drain Current 80 A
I
SDM
(2)
Source-drain Current (pulsed) 320 A
VSD (1)
Forward On Voltage
ISD = 80A, VGS = 0
1.3 V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charg e
Reverse Recovery Curren t
I
SD
= 80A, di/dt = 100A/µs,
V
DD
= 50V, Tj = 150°C
(see test circuit, Figure 5)
155
0.85
11
ns
µC
A
Safe Operating Area for TO-220FPSafe Operating Area for TO-220
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STP80NF10/STP80NF10FP
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Thermal Impedence for TO-220FPThermal Impedence for TO-220
Static Drain-source On Resistance
Output Characteristics
Transconductance
Transfer Characteristics
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STP80NF10/STP80NF10FP
Normalized On Resistance vs Temperature
Capacitance Variations
Normalized Gate Thereshold Voltage vs Temp.
Source-drain Diode Forward Characteristics
Gate Charge vs Gate-source Voltage
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STP80NF10/STP80NF10FP
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Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
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STP80NF10/STP80NF10FP
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
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L2
A
B
D
E
H
G
L6
F
L3
G1
123
F2
F1
L7
L4
L5
DIM.
mm. inch
MIN. TYP M AX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.45 0.7 0.017 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 .0385 0.417
L5 2.9 3.6 0.114 0.141
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
TO-220FP MECHANICAL DATA
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STP80NF10/STP80NF10FP
Information furnished is believed to be accurat e and reliable. However, STMicroelectronics assumes no responsibility f or t he
consequences of use of su ch in formation nor for any in fringement of paten ts or o ther rights of third parties w hich may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersed es and replaces all information
previously suppli ed. STMi croelect ronics pr oducts are not author ized for use as c ritical component s in li fe suppo rt devi ces or
systems without express written approval of STMicroelectr onics.
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