Page 1
STP7NB30
N - CHANNEL300V - 0.75Ω - 7A - TO-220/TO-220FP
TYPE V
STP7NB30
STP7NB30FP
■ TYPICALR
■ EXTREMELYHIGH dv/dt CAPABILITY
■ 100%AVALANCHETESTED
■ VERYLOW INTRINSIC CAPACITANCES
■ GATECHARGE MINIMIZED
DS(on)
DSS
300 V
300 V
= 0.75
DESCRIPTION
Using the latest high voltage MESH OVERLAY
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
R
DS(on)
<0.90Ω
<0.90
Ω
Ω
I
D
7A
4A
STP7NB30FP
PowerMESH MOSFET
3
2
1
TO-220 TO-220FP
INTERNAL SCHEMATIC DIAGRAM
3
2
1
APPLICATIONS
■ HIGHCURRENT, HIGHSPEED SWITCHING
■ SWITCHMODE POWER SUPPLIES (SMPS)
■ DC-AC CONVERTERS FOR WELDING
EQUIPMENTANDUNINTERRUPTIBLE
POWERSUPPLIESAND MOTORDRIVE
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
ST P7NB3 0 ST P7NB 30FP
V
V
V
I
DM
P
dv/dt(
V
T
(• ) Pulse width limited by safeoperating area (1 )ISD≤ 7A, di/dt ≤ 200 A/µ s,VDD≤ V
August 1999
Dra in- sour c e Vol t age (VGS= 0) 300 V
DS
Dra in- gate Volt age (RGS=20kΩ)
DGR
Gat e-source Voltage ± 30 V
GS
Dra in Current (c ont in uous ) at Tc=25oC7 4 A
I
D
Dra in Current (c ont in uous ) at Tc=100oC4 . 4 2 . 5 A
I
D
300 V
(• ) Dra in Current (p ulsed ) 28 28 A
Tot al Dissipation at Tc=25oC8 5 3 0 W
tot
Der ati ng Factor 0.68 0.24 W/
) P eak Di ode Recov er y v olt age slope 5.5 5.5 V/ns
1
Insulation W ithstand Voltage (DC) 2000 V
ISO
St orage Temperatur e -65 t o 150
stg
Max. O perating J unction T emperat ure 150
T
j
,Tj≤ T
(BR)DSS
JMAX
o
C
o
C
o
C
1/9
Page 2
STP7NB30/STP7NB30FP
THERMAL DATA
TO-220 TO-220F P
R
thj-case
R
thj-amb
R
thc-sink
T
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
Ther mal Res istance Junct ion-case Ma x 1.47 4.17
Ther mal Res istance Junct ion-ambient Max
Ther mal Res istance C as e -s ink Ty p
Maximum Lead Te m pe ra t ure For S o lder ing Purp os e
l
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
Single P ul s e Avalan c he Energy
AS
(starting T
=25oC, ID=IAR,VDD=50V)
j
max)
j
62.5
0.5
300
7A
150 mJ
o
C/W
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
=25oC unless otherwisespecified)
(T
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
=250µAV GS=0
I
D
300 V
Break dow n Volt age
I
DSS
I
GSS
Zero Gate Voltage
Drain Cur rent (V
GS
Gat e- bod y L eak ag e
Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRating Tc=125oC
V
DS
=± 30 V
V
GS
1
10
± 100 nA
ON(∗ )
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Sta t ic Drain -s ource On
V
DS=VGSID
= 250µA
VGS=10V ID= 3.5 A 0.75 0.9 Ω
345V
Resistance
I
D(on)
On State Drain Current VDS>I
D(on)xRDS(on)max
7A
VGS=10V
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
(∗)F o r w a r d
fs
Tr ansc on duc tance
C
C
C
Input Capac i t ance
iss
Out put Capacitanc e
oss
Reverse Tr ansfer
rss
Capacit a nc e
VDS>I
D(on)xRDS(on)maxID
=3.5A 1.5 S
VDS=25V f=1MHz VGS= 0 500
100
15
µ
µA
pF
pF
pF
A
2/9
Page 3
STP7NB30/STP7NB30FP
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHINGON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Turn-on Time
t
r
Rise Ti m e
VDD=150V ID= 3.5 A
=4.7 Ω V GS=10V
R
G
13
8
(see test circuit, figure 3)
Q
Q
Q
Tot al Gat e Charge
g
Gat e- Source Charge
gs
Gate-Drain Charge
gd
VDD= 240 V ID=7.0A VGS=10V 17
7.5
6.5
25 nC
SWITCHINGOFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
r(Voff)
t
t
Off-voltage Rise Tim e
Fall T ime
f
Cross-over T ime
c
VDD=240V ID= 7.0 A
=4.7 Ω V GS=10V
R
G
(see test circuit, figure 5)
8
15
7
SOURCEDRAINDIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed: Pulse duration = 300 µ s, duty cycle 1.5 %
(• ) Pulse width limited by safe operatingarea
Source-drain Current
(•)
Source-drain Current
7.0
28
(pulsed)
(∗)F o r w a r dO nV o l t a g e I SD=7.0A VGS=0 1.6 V
Reverse Recovery
rr
Time
Reverse Recovery
rr
= 7.0 A di/dt = 100 A/µs
I
SD
= 100 V Tj=150oC
V
DD
(see test circuit, figure 5)
190
1.1
Charge
Reverse Recovery
11.5
Current
ns
ns
nC
nC
ns
ns
ns
A
A
ns
µ
A
C
SafeOperating Area for TO-220 SafeOperating Area for TO-220FP
3/9
Page 4
STP7NB30/STP7NB30FP
ThermalImpedancefor TO-220
OutputCharacteristics
ThermalImpedanceforTO-220FP
TransferCharacteristics
Transconductance
4/9
Static Drain-sourceOn Resistance
Page 5
STP7NB30/STP7NB30FP
Gate Charge vs Gate-sourceVoltage
NormalizedGate Threshold Voltage vs
Temperature
CapacitanceVariations
NormalizedOn Resistancevs Temperature
Source-drainDiode Forward Characteristics
5/9
Page 6
STP7NB30/STP7NB30FP
Fig. 1:
UnclampedInductiveLoad Test Circuit
Fig. 3: SwitchingTimes Test Circuits For
ResistiveLoad
Fig. 2:
UnclampedInductive Waveform
Fig. 4: GateChargetest Circuit
Fig. 5:
Test CircuitFor InductiveLoad Switching
And Diode Recovery Times
6/9
Page 7
TO-220 MECHANICAL DATA
STP7NB30/STP7NB30FP
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
mm inch
E
A
L4
D
F2
F1
G1
H2
G
F
P011C
C
D1
L2
Dia.
L5
L7
L6
L9
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Page 8
STP7NB30/STP7NB30FP
TO-220FP MECHANICAL DATA
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.45 0.7 0.017 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 0.385 0.417
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
mm inch
E
A
D
B
L3
L6
L7
¯
F1
F
G1
H
G
F2
123
L2
L4
8/9
Page 9
STP7NB30/STP7NB30FP
Information furnishedis believed tobeaccurateand reliable.However, STMicroelectronics assumes no responsibilityforthe consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificationmentioned in this publication are
subjecttochange without notice. This publicationsupersedesandreplaces all information previouslysupplied. STMicroelectronicsproducts
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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