This PowerMOSFET is the latest developmentof
STMicroelectronicsunique”SingleFeature
Size” strip-based process. The resulting transi-
stor showsextremelyhigh packing densityfor low
on-resistance, rugged avalanche characteristics
and less critical alignment steps therefore a remarkablemanufacturingreproducibility.
APPLICATIONS
■ HIGHCURRENT, HIGH SPEED SWITCHING
■ SOLENOIDAND RELAYDRIVERS
■ DC-DC& DC-ACCONVERTERS
■ AUTOMOTIVEENVIRONMENT
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
I
DM
P
dv/ dtPeak Diode Recovery v olt age sl ope5.5V/ns
T
(•) Pulsewidth limited by safeoperating area(1)ISD≤ 60 A, di/dt ≤ 450 A/µs, VDD≤ V
February 1999
Dra in- sour c e Volt age (VGS=0)30V
DS
Dra in- gat e Voltage (RGS=20kΩ)30V
DGR
Gat e-source Volt age± 20V
GS
I
Dra in Cu rr ent ( c ont inuous) at Tc=25oC60A
D
I
Dra in Cu rr ent ( c ont inuous) at Tc=100oC42A
D
(•)D rain Cu rr ent ( p uls ed )240A
Tot al Dissipation at Tc=25oC100W
tot
Der ati ng Fact or0.67W/
St orage Tem pe r at ure-65 to 175
stg
T
Max. Operating J unction Temperature175
j
(BR)DSS,Tj≤TJMAX
o
C
o
C
o
C
1/8
Page 2
STP60NE03L-12
THERMAL DATA
R
thj-case
Rthj-amb
R
thc-sink
T
AVALANCHE CHARACTERISTICS
SymbolParameterMax Valu eUnit
I
AR
E
Ther mal Resistanc e Junct ion-caseMax
Ther mal Resistanc e Junct ion-ambientMax
Ther mal Resistanc e Case-sinkTy p
Maximum L ead Temperature For So ldering Purpos e
l
Avalanche Current, R epetitive or Not-Repetitive
(pulse width limited by T
Single Pul se Avalanche Ener gy
AS
(starting T
=25oC, ID=IAR,VDD=15V)
j
max)
j
1.5
62.5
0.5
300
60A
250mJ
o
C/W
oC/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
=25oC unless otherwisespecified)
(T
case
OFF
SymbolParameterTest Condit ionsMin.Typ.Max.Unit
V
(BR)DSS
Drain-source
ID=250µAVGS=030V
Break dow n Vo lt age
I
DSS
I
GSS
Zero Gate Voltage
Drain Curre nt (V
GS
Gat e- bod y Leakag e
Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRatingTc= 125oC
V
DS
V
=± 20 V
GS
1
10
100nA
±
ON(∗)
SymbolParameterTest Condit ionsMin.Typ.Max.Unit
V
GS(th)
R
DS(on)
I
D(on)
Gate Threshold Volt age VDS=VGSID= 250 µ A11.72.5V
Sta t ic Drain-s our c e On
Resistance
VGS=10V ID=30A
=5VID=30A
V
GS
On State Drain Current VDS>I
D(on)xRDS(on )max
0.0090.012
0.018
60A
VGS=10V
DYNAMIC
SymbolParameterTest Condit ionsMin.Typ.Max.Unit
g
(∗)Forward
fs
Tr ansc on duc tance
C
C
C
Input Capaci t ance
iss
Out put Capac itance
oss
Reverse Transfer
rss
Capacit a nc e
VDS>I
D(on)xRDS(on )maxID
=30 A2030S
VDS=25V f=1MHz VGS= 02200
570
200
µ
µA
Ω
pF
pF
pF
A
2/8
Page 3
STP60NE03L-12
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHING ON
SymbolParameterTest Condit ionsMin.Typ.Max.Unit
t
d(on)
t
Tur n-on Delay Time
Rise Time
r
VDD=15VID=30A
R
=4.7
G
Ω
VGS=5V
40
260
(Resis t iv e Load, see fig. 3)
Q
Q
Q
Tot al Gate Charge
g
Gat e- Source Char g e
gs
Gate-Drain Charge
gd
VDD=24V ID=60A VGS=5V35
18
13
45nC
SWITCHING OFF
SymbolParameterTest Condit ionsMin.Typ.Max.Unit
t
d(off)
Tur n-of f Dela y Tim e
t
Fall T ime
f
VDD=15VID=30A
=4.7 ΩVGS=5V
R
G
75
50
(Resis t iv e Load, see fig. 3)
t
r(Voff)
t
t
Off-volt age Rise Time
Fall T ime
f
Cross-over Tim e
c
VDD=24VID=60A
=4.7 ΩVGS=15V
R
G
(Indu ct iv e Load, see fig . 5)
35
120
175
SOURCEDRAIN DIODE
SymbolParameterTest Condit ionsMin.Typ.Max.Unit
I
SDM
V
I
SD
Q
I
RRM
SD
t
Source-drain Current
(•)
Source-drain Current
60
240
(pulsed)
(∗)ForwardOnVoltage ISD=60A VGS=01.5V
Reverse Recovery
rr
Time
Reverse Recovery
rr
ISD= 60 Adi/dt = 100 A /µs
=15VTj=150oC
V
DD
(see test circuit, fig. 5)
55
0.1
Charge
Reverse Recovery
3.5
Current
ns
ns
nC
nC
ns
ns
ns
ns
ns
A
A
ns
µC
A
(∗) Pulsed: Pulse duration= 300µs, duty cycle 1.5%
(•) Pulse width limited by safeoperating area
SafeOperating AreaThermalImpedance
3/8
Page 4
STP60NE03L-12
OutputCharacteristics
Transconductance
TransferCharacteristics
Static Drain-sourceOn Resistance
Gate Charge vs Gate-sourceVoltage
4/8
CapacitanceVariations
Page 5
STP60NE03L-12
NormalizedGate ThresholdVoltage vs
Temperature
Source-drainDiode Forward Characteristics
NormalizedOn Resistancevs Temperature
5/8
Page 6
STP60NE03L-12
Fig. 1:
UnclampedInductiveLoad TestCircuit
Fig. 3: SwitchingTimes Test Circuits For
ResistiveLoad
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