Page 1
STP4N20
N - CHANNEL 200V - 1.3 Ω - 4A TO-220
POWER MOS TRANSISTOR
TYPE V
DSS
R
DS(on)
I
D
STP4N20 200 V < 1.5 Ω 4A
■ TYPICALR
■ AVALANCHERUGGEDTECHNOLOGY
■ 100%AVALANCHETESTED
■ LOW GATE CHARGE
■ HIGHCURRENT CAPABILITY
■ 150
■ APPLICATIONORIENTED
o
C OPERATINGTEMPERATURE
DS(on)
= 1.3 Ω
CHARACTERIZATION
APPLICATIONS
■ HIGHCURRENT, HIGH SPEEDSWITCHING
■ SOLENOIDAND RELAYDRIVERS
■ DC-DCCONVERTERS & DC-AC INVERTERS
■ TELECOMMUNICATIONPOWER SUPPLIES
■ INDUSTRIAL MOTOR DRIVERS
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
DM
P
T
(•) Pulsewidth limited by safeoperating area
February 1999
Dra in- sour c e Voltage ( VGS= 0) 200 V
DS
Dra in- gate V ol t age (RGS=20kΩ) 200 V
DGR
Gat e-source Voltage
GS
I
Dra in Current (contin uous) at Tc=25oC4A
D
I
Dra in Current (contin uous) at Tc=100oC2.5A
D
20 V
±
(•) Dra in Current (pulsed) 16 A
Tot al Dissipation at Tc=25oC60W
tot
Der ati ng Factor 0.48 W/
St orage Tem pe r at ur e -65 to 150
stg
T
Max. Operat ing Junc tion Tem perature 150
j
o
C
o
C
o
C
1/8
Page 2
STP4N20
THERMAL DATA
R
thj-case
Rthj-amb
R
thc-sink
T
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
Ther mal Resistanc e Junct ion-case Max
Ther mal Resistanc e Junct ion-ambient Max
Ther mal Resistanc e Case-sink Ty p
Maximum L ead T emperat ure For Solder ing Purp os e
l
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
Single Pulse A v alan che Ener gy
AS
(starting T
=25oC, ID=IAR,VDD=50V)
j
max)
j
2.08
62.5
0.5
300
4A
150 mJ
o
C/W
oC/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
=25oC unless otherwisespecified)
(T
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID=250µAVGS= 0 200 V
Break dow n Volt age
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
Gat e- bod y Leakage
Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRating Tc= 125oC
V
DS
V
=± 20 V
GS
1
10
100 nA
±
ON(∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage VDS=VGSID= 250 µA 234V
Sta t ic Drain-sour c e On
VGS=10V ID=30A 1.3 1.5
Resistance
I
D(on)
On State Drain Current VDS>I
D(on)xRDS(on )max
4A
VGS=10V
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
(∗)Forward
fs
Tr ansc on duc tance
C
C
C
Input Capacitanc e
iss
Out put Capacitance
oss
Reverse Transfer
rss
Capacit a nc e
VDS>I
D(on)xRDS(on )maxID
=2 A 0.8 1.3 S
VDS=25V f=1MHz VGS= 0 290
50
9
µ
µA
Ω
pF
pF
pF
A
2/8
Page 3
STP4N20
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
t
Tur n-on Delay Time
Rise T ime
r
VDD= 100 V ID=2A
R
=4.7
G
Ω
VGS=10V
7
6
(Resis t iv e Load, see fig. 3)
Q
Q
Q
Tot al Gate Charge
g
Gat e- Source Char g e
gs
Gate-Drain Charge
gd
VDD= 160 V ID=4A VGS=10V 13
7
4
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
Tur n-of f Delay Time
t
Fall T ime
f
VDD=15V ID=40A
R
G
=4.7
Ω
VGS=10V
105
120
(Resis t iv e Load, see fig. 3)
t
r(Voff)
t
t
Off-volt age Rise Tim e
Fall T ime
f
Cross-over Time
c
V
=160V ID=4A
clamp
R
=4.7
G
Ω
VGS=10V
(Indu ct iv e Load, s e e fig. 5)
6
5
13
SOURCEDRAINDIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed:Pulse duration = 300µs, duty cycle 1.5%
(•) Pulse width limited by safeoperating area
Source-drain Current
(•)
Source-drain Current
4
16
(pulsed)
(∗)ForwardOnVoltage ISD= 160 A VGS=0 1.5 V
Reverse Recovery
rr
Time
Reverse Recovery
rr
ISD= 4 A di/dt = 100 A/µs
=30V
V
DD
(see test circuit, fig. 5)
70
1
Charge
Reverse Recovery
13
Current
ns
ns
nC
nC
nC
ns
ns
ns
ns
ns
A
A
ns
µ
A
C
SafeOperating Area ThermalImpedance
3/8
Page 4
STP4N20
OutputCharacteristics
Transconductance
TransferCharacteristics
Static Drain-sourceOn Resistance
Gate Charge vs Gate-sourceVoltage
4/8
CapacitanceVariations
Page 5
STP4N20
NormalizedGate ThresholdVoltage vs
Temperature
Source-drainDiode Forward Characteristics
NormalizedOn Resistancevs Temperature
5/8
Page 6
STP4N20
Fig. 1:
UnclampedInductiveLoad TestCircuit
Fig. 3: SwitchingTimes Test Circuits For
ResistiveLoad
Fig. 2:
UnclampedInductiveWaveform
Fig. 4: Gate Charge test Circuit
Fig. 5:
Test Circuit For InductiveLoad Switching
And Diode Recovery Times
6/8
Page 7
TO-220 MECHANICALDATA
STP4N20
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
mm inch
E
A
L4
D
F2
F1
G1
H2
G
F
P011C
C
D1
L2
Dia.
L5
L7
L6
L9
7/8
Page 8
STP4N20
Information furnished is believed to beaccurateand reliable.However, STMicroelectronics assumes no responsibilityfor the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under anypatent or patent rights ofSTMicroelectronics. Specificationmentioned in this publicationare
subjecttochange withoutnotice.This publication supersedes andreplaces all informationpreviously supplied.STMicroelectronics products
are not authorized for use as critical components in lifesupportdevices or systems without express written approval of STMicroelectronics.
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1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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