Page 1
STP4N100
STP4N100FI
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR
TYPE V
STP 4N100
STP 4N100FI
■ TYPICAL R
■ AVALANCHE RUGGED TECHNOLOGY
■ 100% AVALANCHE TESTED
■ REPETITIVE AVALANCHE DATA AT 100
■ LOW INPUT CAPACITANCE
■ LOW GATE CHARGE
■ APPLICATION ORIENTED
DS(on)
DSS
1000 V
1000 V
= 3.1 Ω
R
DS(on)
I
D
<3.5Ω
<3.5Ω 4A2.2 A
o
C
CHARACTERIZATION
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITCH MODE POWERSUPPLIES (SMPS)
■ CONSUMER AND INDUSTRIAL LIGHTING
■ DC-AC INVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLY (UPS)
3
2
1
TO-220 ISOWATT220
INTERNAL SCHEMATIC DIAGRAM
3
2
1
ABSOLUTE MAXIMUM RATINGS
Symb o l Paramet er Val u e Unit
STP 4N100 STP4 N100FI
V
V
V
I
DM
P
V
T
(• ) Pulsewidth limited bysafe operating area
December 1996
Drain - s ource Voltage (VGS= 0) 1000 V
DS
Drain- gate Voltage (RGS=20kΩ) 1000 V
DGR
Gate-source Voltage ± 20 V
GS
Drain Current (continuous) at Tc=25oC42 . 2 A
I
D
Drain Current (continuous) at Tc=100oC2 . 5 1 . 4 A
I
D
(•) Drain Current (pulsed) 16 16 A
Total Di ssipation a t Tc=25oC 125 40 W
tot
Derating F actor 1 0.32 W/
Ins ulation Withs t and Voltage (DC) 2000 V
ISO
St or a ge Tem perature -65 t o 150
stg
Max. Operating Jun ction T emperature 150
T
j
o
o
o
C
C
C
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Page 2
STP4N100/FI
THERMAL DATA
TO-220 ISOW ATT 220
R
thj-case
R
thj-amb
R
thc-sink
T
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Uni t
I
AR
E
E
I
AR
Thermal Resistance Junction - cas e M ax 1 3.12
Thermal Resistance Junction- ambient Max
Thermal Resistance Case-sink Typ
Maximum Lead Temperature For So ldering Purpose
l
Avalanc h e Cu rr ent , Repet itive or Not-Rep etitive
(pulse width limited by Tjmax, δ <1%)
Single Pul se Avalanche Ener gy
AS
(starti ng T
Repetitive Avalanc he Energ y
AR
=25oC, ID=IAR,VDD=25V)
j
(pulse width limited by Tjmax, δ <1%)
Avalanc h e Cu rr ent , Repet itive or Not-Rep etitive
(Tc= 100oC, pulse width l imited by Tjmax, δ <1%)
62.5
0.5
300
4A
160 mJ
8.3 mJ
2.5 A
o
C/W
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS (T
=25oC unless otherwisespecified)
case
OFF
Symbol Parameter Test Condition s Min. Typ. Max. Unit
V
(BR)DSS
Drain - s ource
ID=250µAV GS= 0 1000 V
Break d own Volta ge
I
DSS
I
GSS
Zer o G at e V oltage
Drain Current (VGS=0)
Gat e- body Leakage
Current (V
DS
=0)
VDS=MaxRating
VDS= Max Rating x 0.8 Tc=125oC
= ± 20 V ± 10 0 nA
V
GS
25
250
ON (∗)
Symbol Parameter Test Condition s Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Gate Threshold V oltage VDS=VGSID=250µA2 3 4 V
St at ic Drain-s our ce O n
VGS=10V ID=2A 3.1 3.5 Ω
Resistance
I
D(on)
On State Drain Current VDS>I
D(on)xRDS(on)max
4A
VGS=10V
DYNAMIC
Symbol Parameter Test Condition s Min. Typ. Max. Unit
(∗ )F o r w a r d
g
fs
Tr ansconductance
C
C
C
Input Capacitance
iss
Out put Capacitance
oss
Reverse Transfer
rss
Capacitance
VDS>I
D(on)xRDS(on)maxID
=2A 2 4 S
VDS=25V f=1MHz VGS= 0 1230
165
70
1500
200
85
µA
µA
pF
pF
pF
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Page 3
STP4N100/FI
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Condition s Min. Typ. Max. Unit
t
d(on)
(di/dt)
Q
Q
Q
Turn-on T ime
t
Rise Time
r
Turn-on Current S lope VDD=800V ID=4A
on
Total Gate Charge
g
Gat e- Source Charge
gs
Gate-Drain Charge
gd
SWITCHING OFF
Symbol Parameter Test Condition s Min. Typ. Max. Unit
t
r(Voff)
t
Off -voltage Rise Time
t
Fall Time
f
Cross-over Time
c
SOURCE DRAINDIODE
VDD=800V ID=2A
RG=50 Ω VGS=10V
36
30
(see test circuit, figure 3)
180 A/µ s
RG=50 Ω VGS=10V
(see test circuit, figure 5)
VDD= 800 V ID=4A VGS=10V 80
8
40
VDD=800V ID=4A
RG=50 Ω VGS=10V
(see test circuit, figure 5)
100
25
155
45
165
100 nC
125
32
190
ns
ns
nC
nC
ns
ns
ns
Symbol Parameter Test Condition s Min. Typ. Max. Unit
I
I
SDM
SD
Source-drain C urrent
(• )
Source-drain C urrent
4
16
(pulsed)
V
(∗) F or w ar d On Voltage I SD=4A VGS=0 2 V
SD
t
Reverse Recovery
rr
Time
Q
Reverse Recovery
rr
ISD=4A di/dt=100A/µs
VDD= 100 V Tj=150oC
(see test circuit, figure 5)
1200
30
Charge
I
RRM
Reverse Recovery
50
Current
(∗ ) Pulsed:Pulse duration = 300 µ s, dutycycle 1.5 %
(• ) Pulse widthlimited by safeoperating area
Safe Operating Areas For TO-220 Safe Operating Areas For ISOWATT220
A
A
ns
µ C
A
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Page 4
STP4N100/FI
Thermal ImpedeanceFor TO-220
Derating Curve For TO-220
Thermal ImpedanceFor ISOWATT220
Derating Curve For ISOWATT220
Output Characteristics
4/10
Transfer Characteristics
Page 5
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
STP4N100/FI
Temperature
Normalized On Resistance vs Temperature Normalized Gate Threshold Voltage vs
5/10
Page 6
STP4N100/FI
Turn-on Current Slope Turn-off Drain-source Voltage Slope
Cross-over Time Switching Safe Operating Area
Accidental Overload Area Source-drain Diode ForwardCharacteristics
6/10
Page 7
STP4N100/FI
Fig. 1: Unclamped Inductive Load Test Circuits
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 2: Unclamped Inductive Waveforms
Fig. 4: Gate Charge Test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Reverse Recovery Time
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Page 8
STP4N100/FI
TO-220 MECHANICAL DATA
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
E
A
L4
D
F2
F1
G1
H2
G
F
C
D1
L2
Dia.
L5
L7
L6
L9
P011C
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Page 9
ISOWATT220 MECHANICAL DATA
STP4N100/FI
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.4 0.7 0.015 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 0.385 0.417
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
mm inch
E
A
D
B
L3
L6
L7
Ø
F1
F
G1
H
G
F2
123
L2
L4
P011G
9/10
Page 10
STP4N100/FI
Information furnished is believed to be accurate and reliable. However, SGS-THOMSONMicroelectronics assumes no responsability for the
consequences of use of such informationnor for any infringement of patents or other rights of third partieswhich may results fromits use. No
licenseis granted by implication or otherwise under any patent or patentrights of SGS-THOMSONMicroelectronics. Specificationsmentioned
in thispublication are subject to change withoutnotice. Thispublication supersedes andreplacesall information previously supplied.
SGS-THOMSONMicroelectronicsproducts are not authorized for use ascriticalcomponents in lifesupportdevices or systems withoutexpress
writtenapproval of SGS-THOMSON Microelectonics.
1996 SGS-THOMSON Microelectronics -Printed in Italy- AllRightsReserved
Australia- Brazil -Canada -China - France- Germany - HongKong- Italy- Japan- Korea- Malaysia - Malta - Morocco - The Netherlands -
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