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STP36NF03L
N-CHANNEL 30V - 0.015
LOW GATE CHARGE STripFET POWER MOSFET
TYPE V
ST P36NF03L 30 V < 0. 02 Ω 36 A
■ TYPICALR
■ TYPICALQ
■ OPTIMAL R
■ CONDUCTIONLOSSESREDUCED
■ SWITCHINGLOSSESREDUCED
DS(on)
g
DSS
= 0.015 Ω
= 18 nC @ 10V
DS(on)xQg
DESCRIPTION
This applicationspecific Power Mosfet is the third
generation of STMicroelectronics unique ”Single
Feature Size” strip-based process. The resulting transistor shows the best trade-off between
on-resistance and gate charge. When used as
high and low side in buck regulators, it gives the
best performancein termsof both conductionand
switching losses. This is extremely important for
motherboardswhere fast switching and high efficiencyare of paramount importance.
R
DS(on)
TRADE-OFF
I
D
Ω
- 36A TO-220
PRELIMINARY DATA
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ SPECIFICALLYDESIGNED AND
OPTIMISEDFOR HIGH EFFICIENCYCPU
CORE DC/DC CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
DM
P
T
(•) Pulse width limited by safeoperating area
Dra in- sour c e Volt age (VGS=0) 30 V
DS
Dra in- gate V ol t age ( RGS=20kΩ)30V
DGR
Gat e-source Voltage
GS
I
Dra in C u rr ent (c ontinuous) a t Tc=25oC36A
D
I
Dra in C u rr ent (c ontinuous) a t Tc=100oC25A
D
(•) Drain Cu rrent (p ulsed) 144 A
Tot al Dissipation at Tc=25oC75W
tot
Der ati ng Fac t or 0.5 W/
St orage Temperature -65 t o 175
stg
T
Max. O perating Junction T emper at ure 175
j
20 V
±
o
C
o
C
o
C
January 2000
1/6
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STP36NF03L
THERMAL DATA
R
thj-case
R
thj-amb
T
Ther mal Resistanc e Junct ion-case Max
Ther mal Resistanc e Junct ion-ambient Max
Maximum Lead Te m pe ra tur e For So lder ing Purpose
l
2
62.5
300
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
=25oC unless otherwisespecified)
(T
case
OFF
Symbol Parameter Test Condit ions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID=250µAVGS=0 30 V
Break dow n V o lt age
I
DSS
I
GSS
Zero Gate Voltage
Drain Cur re nt ( V
GS
Gat e- bod y L eakage
Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRating Tc=125oC
V
DS
V
= ± 20 V ± 100 nA
GS
1
10
ON(∗)
Symbol Parameter Test Condit ions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
I
D(on)
Gate Threshold Voltage VDS=VGSID= 250 µA12.5V
Sta t ic Drain -s ource On
Resistance
On State Drain Current VDS>I
VGS=10V ID=18A
V
=5V ID=9A
GS
D(on)xRDS(on)ma x
0.015
0.026
0.020
0.035
36 A
VGS=10V
DYNAMIC
Symbol Parameter Test Condit ions Min. Typ. Max. Unit
g
(∗)Forward
fs
Tr ansc on duc tance
C
C
C
Input Capac i t ance
iss
Out put Capacitanc e
oss
Reverse Tr ansfer
rss
Capacit a nc e
VDS>I
D(on)xRDS(on)ma xID
=18 A 20 S
VDS=25V f=1MHz VGS= 0 750
270
60
µA
µ
Ω
Ω
pF
pF
pF
A
2/6
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STP36NF03L
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHINGON
Symbol Parameter Test Condit ions Min. Typ. Max. Unit
t
d(on)
t
Tur n-on Delay Tim e
Rise Ti me
r
VDD=15V ID=18A
R
=4.7
G
Ω
VGS=4.5V
16
200
(Resis t iv e Loa d, s ee fig. 3)
Q
Q
Q
Tot al Gat e Charge
g
Gat e- Source Charge
gs
Gate-Drain Charge
gd
VDD=24V ID=32A VGS=10V 18
3
5
21 nC
SWITCHINGOFF
Symbol Parameter Test Condit ions Min. Typ. Max. Unit
t
d(off)
Tur n-of f Delay Tim e
t
Fall T ime
f
VDD=15V ID=18A
R
=4.7
G
Ω
VGS=4.5V
35
40
(Resis t iv e Loa d, s ee fig. 3)
SOURCEDRAINDIODE
Symbol Parameter Test Condit ions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed:Pulse duration= 300µs, duty cycle 1.5%
(•) Pulse width limited by safe operatingarea
Source-drain Current
(•)
Source-drain Current
36
144
(pulsed)
(∗)ForwardOnVoltage ISD=36 A VGS=0 1.5 V
Reverse Recovery
rr
Time
Reverse Recovery
rr
ISD= 36 A di/dt = 100 A /µs
=15V Tj=150oC
V
DD
(see test circuit, fig. 5)
38
30
Charge
Reverse Recovery
1.6
Current
ns
ns
nC
nC
ns
ns
A
A
ns
nC
A
3/6
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STP36NF03L
Fig. 1:
UnclampedInductiveLoad Test Circuit
Fig. 3: SwitchingTimes Test Circuits For
ResistiveLoad
Fig. 2:
UnclampedInductive Waveform
Fig. 4: Gate Chargetest Circuit
Fig. 5:
Test CircuitFor InductiveLoad Switching
And Diode Recovery Times
4/6
Page 5
TO-220 MECHANICAL DATA
STP36NF03L
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
mm inch
E
A
L4
D
F2
F1
G1
H2
G
F
P011C
C
D1
L2
Dia.
L5
L7
L6
L9
5/6
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STP36NF03L
Information furnishedis believed tobeaccurateand reliable.However, STMicroelectronics assumes no responsibilityforthe consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificationmentioned in this publicationare
subjecttochange without notice.This publication supersedes andreplacesall information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systemswithout express written approval of STMicroelectronics.
The STlogo is a trademark of STMicroelectronics
1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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